Initial import of onewire-to-usb bridge

[onewire] / build / XC8_12F1822 / production / interrupts.p1

Version 3.2 HI-TECH Software Intermediate Code
[s S72 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S72 . TMR1IE TMR2IE CCP1IE SSP1IE TXIE RCIE ADIE TMR1GIE ]
[u S71 `S72 1 ]
[n S71 . . ]
"1274 /opt/microchip/xc8/v1.12/include/pic12f1822.h
[v _PIE1bits `VS71 ~T0 @X0 0 e@145 ]
[s S41 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S41 . TMR1IF TMR2IF CCP1IF SSP1IF TXIF RCIF ADIF TMR1GIF ]
[u S40 `S41 1 ]
[n S40 . . ]
"715
[v _PIR1bits `VS40 ~T0 @X0 0 e@17 ]
"17 user.h
[v _msg_sendnext `(v ~T0 @X0 0 ef ]
"19
[v _msg_recvnext `(v ~T0 @X0 0 ef ]
[; ;pic12f1822.h: 44: extern volatile unsigned char INDF0 @ 0x000;
"46 /opt/microchip/xc8/v1.12/include/pic12f1822.h
[; ;pic12f1822.h: 46: asm("INDF0 equ 00h");
[; <" INDF0 equ 00h ;# ">
[; ;pic12f1822.h: 49: typedef union {
[; ;pic12f1822.h: 50: struct {
[; ;pic12f1822.h: 51: unsigned INDF0 :8;
[; ;pic12f1822.h: 52: };
[; ;pic12f1822.h: 53: } INDF0bits_t;
[; ;pic12f1822.h: 54: extern volatile INDF0bits_t INDF0bits @ 0x000;
[; ;pic12f1822.h: 63: extern volatile unsigned char INDF1 @ 0x001;
"65
[; ;pic12f1822.h: 65: asm("INDF1 equ 01h");
[; <" INDF1 equ 01h ;# ">
[; ;pic12f1822.h: 68: typedef union {
[; ;pic12f1822.h: 69: struct {
[; ;pic12f1822.h: 70: unsigned INDF1 :8;
[; ;pic12f1822.h: 71: };
[; ;pic12f1822.h: 72: } INDF1bits_t;
[; ;pic12f1822.h: 73: extern volatile INDF1bits_t INDF1bits @ 0x001;
[; ;pic12f1822.h: 82: extern volatile unsigned char PCL @ 0x002;
"84
[; ;pic12f1822.h: 84: asm("PCL equ 02h");
[; <" PCL equ 02h ;# ">
[; ;pic12f1822.h: 87: typedef union {
[; ;pic12f1822.h: 88: struct {
[; ;pic12f1822.h: 89: unsigned PCL :8;
[; ;pic12f1822.h: 90: };
[; ;pic12f1822.h: 91: } PCLbits_t;
[; ;pic12f1822.h: 92: extern volatile PCLbits_t PCLbits @ 0x002;
[; ;pic12f1822.h: 101: extern volatile unsigned char STATUS @ 0x003;
"103
[; ;pic12f1822.h: 103: asm("STATUS equ 03h");
[; <" STATUS equ 03h ;# ">
[; ;pic12f1822.h: 106: typedef union {
[; ;pic12f1822.h: 107: struct {
[; ;pic12f1822.h: 108: unsigned C :1;
[; ;pic12f1822.h: 109: unsigned DC :1;
[; ;pic12f1822.h: 110: unsigned Z :1;
[; ;pic12f1822.h: 111: unsigned nPD :1;
[; ;pic12f1822.h: 112: unsigned nTO :1;
[; ;pic12f1822.h: 113: };
[; ;pic12f1822.h: 114: struct {
[; ;pic12f1822.h: 115: unsigned CARRY :1;
[; ;pic12f1822.h: 116: };
[; ;pic12f1822.h: 117: struct {
[; ;pic12f1822.h: 118: unsigned :2;
[; ;pic12f1822.h: 119: unsigned ZERO :1;
[; ;pic12f1822.h: 120: };
[; ;pic12f1822.h: 121: } STATUSbits_t;
[; ;pic12f1822.h: 122: extern volatile STATUSbits_t STATUSbits @ 0x003;
[; ;pic12f1822.h: 161: extern volatile unsigned short FSR0 @ 0x004;
[; ;pic12f1822.h: 164: extern volatile unsigned char FSR0L @ 0x004;
"166
[; ;pic12f1822.h: 166: asm("FSR0L equ 04h");
[; <" FSR0L equ 04h ;# ">
[; ;pic12f1822.h: 169: typedef union {
[; ;pic12f1822.h: 170: struct {
[; ;pic12f1822.h: 171: unsigned FSR0L :8;
[; ;pic12f1822.h: 172: };
[; ;pic12f1822.h: 173: } FSR0Lbits_t;
[; ;pic12f1822.h: 174: extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
[; ;pic12f1822.h: 183: extern volatile unsigned char FSR0H @ 0x005;
"185
[; ;pic12f1822.h: 185: asm("FSR0H equ 05h");
[; <" FSR0H equ 05h ;# ">
[; ;pic12f1822.h: 188: typedef union {
[; ;pic12f1822.h: 189: struct {
[; ;pic12f1822.h: 190: unsigned FSR0H :8;
[; ;pic12f1822.h: 191: };
[; ;pic12f1822.h: 192: } FSR0Hbits_t;
[; ;pic12f1822.h: 193: extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
[; ;pic12f1822.h: 202: extern volatile unsigned short FSR1 @ 0x006;
[; ;pic12f1822.h: 205: extern volatile unsigned char FSR1L @ 0x006;
"207
[; ;pic12f1822.h: 207: asm("FSR1L equ 06h");
[; <" FSR1L equ 06h ;# ">
[; ;pic12f1822.h: 210: typedef union {
[; ;pic12f1822.h: 211: struct {
[; ;pic12f1822.h: 212: unsigned FSR1L :8;
[; ;pic12f1822.h: 213: };
[; ;pic12f1822.h: 214: } FSR1Lbits_t;
[; ;pic12f1822.h: 215: extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
[; ;pic12f1822.h: 224: extern volatile unsigned char FSR1H @ 0x007;
"226
[; ;pic12f1822.h: 226: asm("FSR1H equ 07h");
[; <" FSR1H equ 07h ;# ">
[; ;pic12f1822.h: 229: typedef union {
[; ;pic12f1822.h: 230: struct {
[; ;pic12f1822.h: 231: unsigned FSR1H :8;
[; ;pic12f1822.h: 232: };
[; ;pic12f1822.h: 233: } FSR1Hbits_t;
[; ;pic12f1822.h: 234: extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
[; ;pic12f1822.h: 243: extern volatile unsigned char BSR @ 0x008;
"245
[; ;pic12f1822.h: 245: asm("BSR equ 08h");
[; <" BSR equ 08h ;# ">
[; ;pic12f1822.h: 248: typedef union {
[; ;pic12f1822.h: 249: struct {
[; ;pic12f1822.h: 250: unsigned BSR0 :1;
[; ;pic12f1822.h: 251: unsigned BSR1 :1;
[; ;pic12f1822.h: 252: unsigned BSR2 :1;
[; ;pic12f1822.h: 253: unsigned BSR3 :1;
[; ;pic12f1822.h: 254: unsigned BSR4 :1;
[; ;pic12f1822.h: 255: };
[; ;pic12f1822.h: 256: struct {
[; ;pic12f1822.h: 257: unsigned BSR :5;
[; ;pic12f1822.h: 258: };
[; ;pic12f1822.h: 259: } BSRbits_t;
[; ;pic12f1822.h: 260: extern volatile BSRbits_t BSRbits @ 0x008;
[; ;pic12f1822.h: 294: extern volatile unsigned char WREG @ 0x009;
"296
[; ;pic12f1822.h: 296: asm("WREG equ 09h");
[; <" WREG equ 09h ;# ">
[; ;pic12f1822.h: 299: typedef union {
[; ;pic12f1822.h: 300: struct {
[; ;pic12f1822.h: 301: unsigned WREG0 :8;
[; ;pic12f1822.h: 302: };
[; ;pic12f1822.h: 303: } WREGbits_t;
[; ;pic12f1822.h: 304: extern volatile WREGbits_t WREGbits @ 0x009;
[; ;pic12f1822.h: 313: extern volatile unsigned char PCLATH @ 0x00A;
"315
[; ;pic12f1822.h: 315: asm("PCLATH equ 0Ah");
[; <" PCLATH equ 0Ah ;# ">
[; ;pic12f1822.h: 318: typedef union {
[; ;pic12f1822.h: 319: struct {
[; ;pic12f1822.h: 320: unsigned PCLATH :7;
[; ;pic12f1822.h: 321: };
[; ;pic12f1822.h: 322: } PCLATHbits_t;
[; ;pic12f1822.h: 323: extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
[; ;pic12f1822.h: 332: extern volatile unsigned char INTCON @ 0x00B;
"334
[; ;pic12f1822.h: 334: asm("INTCON equ 0Bh");
[; <" INTCON equ 0Bh ;# ">
[; ;pic12f1822.h: 337: typedef union {
[; ;pic12f1822.h: 338: struct {
[; ;pic12f1822.h: 339: unsigned IOCIF :1;
[; ;pic12f1822.h: 340: unsigned INTF :1;
[; ;pic12f1822.h: 341: unsigned TMR0IF :1;
[; ;pic12f1822.h: 342: unsigned IOCIE :1;
[; ;pic12f1822.h: 343: unsigned INTE :1;
[; ;pic12f1822.h: 344: unsigned TMR0IE :1;
[; ;pic12f1822.h: 345: unsigned PEIE :1;
[; ;pic12f1822.h: 346: unsigned GIE :1;
[; ;pic12f1822.h: 347: };
[; ;pic12f1822.h: 348: struct {
[; ;pic12f1822.h: 349: unsigned :2;
[; ;pic12f1822.h: 350: unsigned T0IF :1;
[; ;pic12f1822.h: 351: unsigned :2;
[; ;pic12f1822.h: 352: unsigned T0IE :1;
[; ;pic12f1822.h: 353: };
[; ;pic12f1822.h: 354: } INTCONbits_t;
[; ;pic12f1822.h: 355: extern volatile INTCONbits_t INTCONbits @ 0x00B;
[; ;pic12f1822.h: 409: extern volatile unsigned char PORTA @ 0x00C;
"411
[; ;pic12f1822.h: 411: asm("PORTA equ 0Ch");
[; <" PORTA equ 0Ch ;# ">
[; ;pic12f1822.h: 414: typedef union {
[; ;pic12f1822.h: 415: struct {
[; ;pic12f1822.h: 416: unsigned RA0 :1;
[; ;pic12f1822.h: 417: unsigned RA1 :1;
[; ;pic12f1822.h: 418: unsigned RA2 :1;
[; ;pic12f1822.h: 419: unsigned RA3 :1;
[; ;pic12f1822.h: 420: unsigned RA4 :1;
[; ;pic12f1822.h: 421: unsigned RA5 :1;
[; ;pic12f1822.h: 422: };
[; ;pic12f1822.h: 423: struct {
[; ;pic12f1822.h: 424: unsigned AN0 :1;
[; ;pic12f1822.h: 425: unsigned AN1 :1;
[; ;pic12f1822.h: 426: unsigned AN2 :1;
[; ;pic12f1822.h: 427: unsigned :1;
[; ;pic12f1822.h: 428: unsigned AN3 :1;
[; ;pic12f1822.h: 429: };
[; ;pic12f1822.h: 430: struct {
[; ;pic12f1822.h: 431: unsigned CPS0 :1;
[; ;pic12f1822.h: 432: unsigned CPS1 :1;
[; ;pic12f1822.h: 433: unsigned CPS2 :1;
[; ;pic12f1822.h: 434: unsigned :1;
[; ;pic12f1822.h: 435: unsigned CPS3 :1;
[; ;pic12f1822.h: 436: };
[; ;pic12f1822.h: 437: struct {
[; ;pic12f1822.h: 438: unsigned C1INP :1;
[; ;pic12f1822.h: 439: unsigned C1IN0N :1;
[; ;pic12f1822.h: 440: unsigned C1OUT :1;
[; ;pic12f1822.h: 441: unsigned :1;
[; ;pic12f1822.h: 442: unsigned C1IN1N :1;
[; ;pic12f1822.h: 443: };
[; ;pic12f1822.h: 444: struct {
[; ;pic12f1822.h: 445: unsigned DACOUT :1;
[; ;pic12f1822.h: 446: unsigned SRI :1;
[; ;pic12f1822.h: 447: unsigned SRQ :1;
[; ;pic12f1822.h: 448: unsigned :2;
[; ;pic12f1822.h: 449: unsigned SRNQ :1;
[; ;pic12f1822.h: 450: };
[; ;pic12f1822.h: 451: struct {
[; ;pic12f1822.h: 452: unsigned :1;
[; ;pic12f1822.h: 453: unsigned SCK :1;
[; ;pic12f1822.h: 454: unsigned T0CKI :1;
[; ;pic12f1822.h: 455: unsigned :1;
[; ;pic12f1822.h: 456: unsigned T1OSO :1;
[; ;pic12f1822.h: 457: unsigned T1CKI :1;
[; ;pic12f1822.h: 458: };
[; ;pic12f1822.h: 459: struct {
[; ;pic12f1822.h: 460: unsigned :1;
[; ;pic12f1822.h: 461: unsigned SCL :1;
[; ;pic12f1822.h: 462: unsigned SDA :1;
[; ;pic12f1822.h: 463: unsigned nMCLR :1;
[; ;pic12f1822.h: 464: unsigned CLKR :1;
[; ;pic12f1822.h: 465: unsigned T1OSI :1;
[; ;pic12f1822.h: 466: };
[; ;pic12f1822.h: 467: struct {
[; ;pic12f1822.h: 468: unsigned MDOUT :1;
[; ;pic12f1822.h: 469: unsigned MDMIN :1;
[; ;pic12f1822.h: 470: unsigned MDCIN1 :1;
[; ;pic12f1822.h: 471: unsigned :1;
[; ;pic12f1822.h: 472: unsigned MDCIN2 :1;
[; ;pic12f1822.h: 473: };
[; ;pic12f1822.h: 474: struct {
[; ;pic12f1822.h: 475: unsigned :2;
[; ;pic12f1822.h: 476: unsigned SDI :1;
[; ;pic12f1822.h: 477: unsigned :1;
[; ;pic12f1822.h: 478: unsigned OSC2 :1;
[; ;pic12f1822.h: 479: unsigned OSC1 :1;
[; ;pic12f1822.h: 480: };
[; ;pic12f1822.h: 481: struct {
[; ;pic12f1822.h: 482: unsigned :2;
[; ;pic12f1822.h: 483: unsigned FLT0 :1;
[; ;pic12f1822.h: 484: unsigned :1;
[; ;pic12f1822.h: 485: unsigned CLKOUT :1;
[; ;pic12f1822.h: 486: unsigned CLKIN :1;
[; ;pic12f1822.h: 487: };
[; ;pic12f1822.h: 488: } PORTAbits_t;
[; ;pic12f1822.h: 489: extern volatile PORTAbits_t PORTAbits @ 0x00C;
[; ;pic12f1822.h: 698: extern volatile unsigned char PIR1 @ 0x011;
"700
[; ;pic12f1822.h: 700: asm("PIR1 equ 011h");
[; <" PIR1 equ 011h ;# ">
[; ;pic12f1822.h: 703: typedef union {
[; ;pic12f1822.h: 704: struct {
[; ;pic12f1822.h: 705: unsigned TMR1IF :1;
[; ;pic12f1822.h: 706: unsigned TMR2IF :1;
[; ;pic12f1822.h: 707: unsigned CCP1IF :1;
[; ;pic12f1822.h: 708: unsigned SSP1IF :1;
[; ;pic12f1822.h: 709: unsigned TXIF :1;
[; ;pic12f1822.h: 710: unsigned RCIF :1;
[; ;pic12f1822.h: 711: unsigned ADIF :1;
[; ;pic12f1822.h: 712: unsigned TMR1GIF :1;
[; ;pic12f1822.h: 713: };
[; ;pic12f1822.h: 714: } PIR1bits_t;
[; ;pic12f1822.h: 715: extern volatile PIR1bits_t PIR1bits @ 0x011;
[; ;pic12f1822.h: 759: extern volatile unsigned char PIR2 @ 0x012;
"761
[; ;pic12f1822.h: 761: asm("PIR2 equ 012h");
[; <" PIR2 equ 012h ;# ">
[; ;pic12f1822.h: 764: typedef union {
[; ;pic12f1822.h: 765: struct {
[; ;pic12f1822.h: 766: unsigned :3;
[; ;pic12f1822.h: 767: unsigned BCL1IF :1;
[; ;pic12f1822.h: 768: unsigned EEIF :1;
[; ;pic12f1822.h: 769: unsigned C1IF :1;
[; ;pic12f1822.h: 770: unsigned :1;
[; ;pic12f1822.h: 771: unsigned OSFIF :1;
[; ;pic12f1822.h: 772: };
[; ;pic12f1822.h: 773: } PIR2bits_t;
[; ;pic12f1822.h: 774: extern volatile PIR2bits_t PIR2bits @ 0x012;
[; ;pic12f1822.h: 798: extern volatile unsigned char TMR0 @ 0x015;
"800
[; ;pic12f1822.h: 800: asm("TMR0 equ 015h");
[; <" TMR0 equ 015h ;# ">
[; ;pic12f1822.h: 803: typedef union {
[; ;pic12f1822.h: 804: struct {
[; ;pic12f1822.h: 805: unsigned TMR0 :8;
[; ;pic12f1822.h: 806: };
[; ;pic12f1822.h: 807: } TMR0bits_t;
[; ;pic12f1822.h: 808: extern volatile TMR0bits_t TMR0bits @ 0x015;
[; ;pic12f1822.h: 817: extern volatile unsigned short TMR1 @ 0x016;
"819
[; ;pic12f1822.h: 819: asm("TMR1 equ 016h");
[; <" TMR1 equ 016h ;# ">
[; ;pic12f1822.h: 823: extern volatile unsigned char TMR1L @ 0x016;
"825
[; ;pic12f1822.h: 825: asm("TMR1L equ 016h");
[; <" TMR1L equ 016h ;# ">
[; ;pic12f1822.h: 828: typedef union {
[; ;pic12f1822.h: 829: struct {
[; ;pic12f1822.h: 830: unsigned TMR1L :8;
[; ;pic12f1822.h: 831: };
[; ;pic12f1822.h: 832: } TMR1Lbits_t;
[; ;pic12f1822.h: 833: extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
[; ;pic12f1822.h: 842: extern volatile unsigned char TMR1H @ 0x017;
"844
[; ;pic12f1822.h: 844: asm("TMR1H equ 017h");
[; <" TMR1H equ 017h ;# ">
[; ;pic12f1822.h: 847: typedef union {
[; ;pic12f1822.h: 848: struct {
[; ;pic12f1822.h: 849: unsigned TMR1H :8;
[; ;pic12f1822.h: 850: };
[; ;pic12f1822.h: 851: } TMR1Hbits_t;
[; ;pic12f1822.h: 852: extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
[; ;pic12f1822.h: 861: extern volatile unsigned char T1CON @ 0x018;
"863
[; ;pic12f1822.h: 863: asm("T1CON equ 018h");
[; <" T1CON equ 018h ;# ">
[; ;pic12f1822.h: 866: typedef union {
[; ;pic12f1822.h: 867: struct {
[; ;pic12f1822.h: 868: unsigned TMR1ON :1;
[; ;pic12f1822.h: 869: unsigned :1;
[; ;pic12f1822.h: 870: unsigned nT1SYNC :1;
[; ;pic12f1822.h: 871: unsigned T1OSCEN :1;
[; ;pic12f1822.h: 872: unsigned T1CKPS0 :1;
[; ;pic12f1822.h: 873: unsigned T1CKPS1 :1;
[; ;pic12f1822.h: 874: unsigned TMR1CS0 :1;
[; ;pic12f1822.h: 875: unsigned TMR1CS1 :1;
[; ;pic12f1822.h: 876: };
[; ;pic12f1822.h: 877: struct {
[; ;pic12f1822.h: 878: unsigned :4;
[; ;pic12f1822.h: 879: unsigned T1CKPS :2;
[; ;pic12f1822.h: 880: unsigned TMR1CS :2;
[; ;pic12f1822.h: 881: };
[; ;pic12f1822.h: 882: } T1CONbits_t;
[; ;pic12f1822.h: 883: extern volatile T1CONbits_t T1CONbits @ 0x018;
[; ;pic12f1822.h: 932: extern volatile unsigned char T1GCON @ 0x019;
"934
[; ;pic12f1822.h: 934: asm("T1GCON equ 019h");
[; <" T1GCON equ 019h ;# ">
[; ;pic12f1822.h: 937: typedef union {
[; ;pic12f1822.h: 938: struct {
[; ;pic12f1822.h: 939: unsigned T1GSS0 :1;
[; ;pic12f1822.h: 940: unsigned T1GSS1 :1;
[; ;pic12f1822.h: 941: unsigned T1GVAL :1;
[; ;pic12f1822.h: 942: unsigned T1GGO_nDONE :1;
[; ;pic12f1822.h: 943: unsigned T1GSPM :1;
[; ;pic12f1822.h: 944: unsigned T1GTM :1;
[; ;pic12f1822.h: 945: unsigned T1GPOL :1;
[; ;pic12f1822.h: 946: unsigned TMR1GE :1;
[; ;pic12f1822.h: 947: };
[; ;pic12f1822.h: 948: struct {
[; ;pic12f1822.h: 949: unsigned T1GSS :2;
[; ;pic12f1822.h: 950: unsigned :1;
[; ;pic12f1822.h: 951: unsigned T1GGO :1;
[; ;pic12f1822.h: 952: };
[; ;pic12f1822.h: 953: } T1GCONbits_t;
[; ;pic12f1822.h: 954: extern volatile T1GCONbits_t T1GCONbits @ 0x019;
[; ;pic12f1822.h: 1008: extern volatile unsigned char TMR2 @ 0x01A;
"1010
[; ;pic12f1822.h: 1010: asm("TMR2 equ 01Ah");
[; <" TMR2 equ 01Ah ;# ">
[; ;pic12f1822.h: 1013: typedef union {
[; ;pic12f1822.h: 1014: struct {
[; ;pic12f1822.h: 1015: unsigned TMR2 :8;
[; ;pic12f1822.h: 1016: };
[; ;pic12f1822.h: 1017: } TMR2bits_t;
[; ;pic12f1822.h: 1018: extern volatile TMR2bits_t TMR2bits @ 0x01A;
[; ;pic12f1822.h: 1027: extern volatile unsigned char PR2 @ 0x01B;
"1029
[; ;pic12f1822.h: 1029: asm("PR2 equ 01Bh");
[; <" PR2 equ 01Bh ;# ">
[; ;pic12f1822.h: 1032: typedef union {
[; ;pic12f1822.h: 1033: struct {
[; ;pic12f1822.h: 1034: unsigned PR2 :8;
[; ;pic12f1822.h: 1035: };
[; ;pic12f1822.h: 1036: } PR2bits_t;
[; ;pic12f1822.h: 1037: extern volatile PR2bits_t PR2bits @ 0x01B;
[; ;pic12f1822.h: 1046: extern volatile unsigned char T2CON @ 0x01C;
"1048
[; ;pic12f1822.h: 1048: asm("T2CON equ 01Ch");
[; <" T2CON equ 01Ch ;# ">
[; ;pic12f1822.h: 1051: typedef union {
[; ;pic12f1822.h: 1052: struct {
[; ;pic12f1822.h: 1053: unsigned T2CKPS0 :1;
[; ;pic12f1822.h: 1054: unsigned T2CKPS1 :1;
[; ;pic12f1822.h: 1055: unsigned TMR2ON :1;
[; ;pic12f1822.h: 1056: unsigned T2OUTPS0 :1;
[; ;pic12f1822.h: 1057: unsigned T2OUTPS1 :1;
[; ;pic12f1822.h: 1058: unsigned T2OUTPS2 :1;
[; ;pic12f1822.h: 1059: unsigned T2OUTPS3 :1;
[; ;pic12f1822.h: 1060: };
[; ;pic12f1822.h: 1061: struct {
[; ;pic12f1822.h: 1062: unsigned T2CKPS :2;
[; ;pic12f1822.h: 1063: unsigned :1;
[; ;pic12f1822.h: 1064: unsigned T2OUTPS :4;
[; ;pic12f1822.h: 1065: };
[; ;pic12f1822.h: 1066: } T2CONbits_t;
[; ;pic12f1822.h: 1067: extern volatile T2CONbits_t T2CONbits @ 0x01C;
[; ;pic12f1822.h: 1116: extern volatile unsigned char CPSCON0 @ 0x01E;
"1118
[; ;pic12f1822.h: 1118: asm("CPSCON0 equ 01Eh");
[; <" CPSCON0 equ 01Eh ;# ">
[; ;pic12f1822.h: 1121: typedef union {
[; ;pic12f1822.h: 1122: struct {
[; ;pic12f1822.h: 1123: unsigned T0XCS :1;
[; ;pic12f1822.h: 1124: unsigned CPSOUT :1;
[; ;pic12f1822.h: 1125: unsigned CPSRNG0 :1;
[; ;pic12f1822.h: 1126: unsigned CPSRNG1 :1;
[; ;pic12f1822.h: 1127: unsigned :2;
[; ;pic12f1822.h: 1128: unsigned CPSRM :1;
[; ;pic12f1822.h: 1129: unsigned CPSON :1;
[; ;pic12f1822.h: 1130: };
[; ;pic12f1822.h: 1131: struct {
[; ;pic12f1822.h: 1132: unsigned :2;
[; ;pic12f1822.h: 1133: unsigned CPSRNG :2;
[; ;pic12f1822.h: 1134: };
[; ;pic12f1822.h: 1135: } CPSCON0bits_t;
[; ;pic12f1822.h: 1136: extern volatile CPSCON0bits_t CPSCON0bits @ 0x01E;
[; ;pic12f1822.h: 1175: extern volatile unsigned char CPSCON1 @ 0x01F;
"1177
[; ;pic12f1822.h: 1177: asm("CPSCON1 equ 01Fh");
[; <" CPSCON1 equ 01Fh ;# ">
[; ;pic12f1822.h: 1180: typedef union {
[; ;pic12f1822.h: 1181: struct {
[; ;pic12f1822.h: 1182: unsigned CPSCH0 :1;
[; ;pic12f1822.h: 1183: unsigned CPSCH1 :1;
[; ;pic12f1822.h: 1184: };
[; ;pic12f1822.h: 1185: struct {
[; ;pic12f1822.h: 1186: unsigned CPSCH :2;
[; ;pic12f1822.h: 1187: };
[; ;pic12f1822.h: 1188: } CPSCON1bits_t;
[; ;pic12f1822.h: 1189: extern volatile CPSCON1bits_t CPSCON1bits @ 0x01F;
[; ;pic12f1822.h: 1208: extern volatile unsigned char TRISA @ 0x08C;
"1210
[; ;pic12f1822.h: 1210: asm("TRISA equ 08Ch");
[; <" TRISA equ 08Ch ;# ">
[; ;pic12f1822.h: 1213: typedef union {
[; ;pic12f1822.h: 1214: struct {
[; ;pic12f1822.h: 1215: unsigned TRISA0 :1;
[; ;pic12f1822.h: 1216: unsigned TRISA1 :1;
[; ;pic12f1822.h: 1217: unsigned TRISA2 :1;
[; ;pic12f1822.h: 1218: unsigned TRISA3 :1;
[; ;pic12f1822.h: 1219: unsigned TRISA4 :1;
[; ;pic12f1822.h: 1220: unsigned TRISA5 :1;
[; ;pic12f1822.h: 1221: };
[; ;pic12f1822.h: 1222: } TRISAbits_t;
[; ;pic12f1822.h: 1223: extern volatile TRISAbits_t TRISAbits @ 0x08C;
[; ;pic12f1822.h: 1257: extern volatile unsigned char PIE1 @ 0x091;
"1259
[; ;pic12f1822.h: 1259: asm("PIE1 equ 091h");
[; <" PIE1 equ 091h ;# ">
[; ;pic12f1822.h: 1262: typedef union {
[; ;pic12f1822.h: 1263: struct {
[; ;pic12f1822.h: 1264: unsigned TMR1IE :1;
[; ;pic12f1822.h: 1265: unsigned TMR2IE :1;
[; ;pic12f1822.h: 1266: unsigned CCP1IE :1;
[; ;pic12f1822.h: 1267: unsigned SSP1IE :1;
[; ;pic12f1822.h: 1268: unsigned TXIE :1;
[; ;pic12f1822.h: 1269: unsigned RCIE :1;
[; ;pic12f1822.h: 1270: unsigned ADIE :1;
[; ;pic12f1822.h: 1271: unsigned TMR1GIE :1;
[; ;pic12f1822.h: 1272: };
[; ;pic12f1822.h: 1273: } PIE1bits_t;
[; ;pic12f1822.h: 1274: extern volatile PIE1bits_t PIE1bits @ 0x091;
[; ;pic12f1822.h: 1318: extern volatile unsigned char PIE2 @ 0x092;
"1320
[; ;pic12f1822.h: 1320: asm("PIE2 equ 092h");
[; <" PIE2 equ 092h ;# ">
[; ;pic12f1822.h: 1323: typedef union {
[; ;pic12f1822.h: 1324: struct {
[; ;pic12f1822.h: 1325: unsigned :3;
[; ;pic12f1822.h: 1326: unsigned BCL1IE :1;
[; ;pic12f1822.h: 1327: unsigned EEIE :1;
[; ;pic12f1822.h: 1328: unsigned C1IE :1;
[; ;pic12f1822.h: 1329: unsigned :1;
[; ;pic12f1822.h: 1330: unsigned OSFIE :1;
[; ;pic12f1822.h: 1331: };
[; ;pic12f1822.h: 1332: } PIE2bits_t;
[; ;pic12f1822.h: 1333: extern volatile PIE2bits_t PIE2bits @ 0x092;
[; ;pic12f1822.h: 1357: extern volatile unsigned char OPTION_REG @ 0x095;
"1359
[; ;pic12f1822.h: 1359: asm("OPTION_REG equ 095h");
[; <" OPTION_REG equ 095h ;# ">
[; ;pic12f1822.h: 1362: typedef union {
[; ;pic12f1822.h: 1363: struct {
[; ;pic12f1822.h: 1364: unsigned PS0 :1;
[; ;pic12f1822.h: 1365: unsigned PS1 :1;
[; ;pic12f1822.h: 1366: unsigned PS2 :1;
[; ;pic12f1822.h: 1367: unsigned PSA :1;
[; ;pic12f1822.h: 1368: unsigned TMR0SE :1;
[; ;pic12f1822.h: 1369: unsigned TMR0CS :1;
[; ;pic12f1822.h: 1370: unsigned INTEDG :1;
[; ;pic12f1822.h: 1371: unsigned nWPUEN :1;
[; ;pic12f1822.h: 1372: };
[; ;pic12f1822.h: 1373: struct {
[; ;pic12f1822.h: 1374: unsigned PS :3;
[; ;pic12f1822.h: 1375: unsigned :1;
[; ;pic12f1822.h: 1376: unsigned T0SE :1;
[; ;pic12f1822.h: 1377: unsigned T0CS :1;
[; ;pic12f1822.h: 1378: };
[; ;pic12f1822.h: 1379: } OPTION_REGbits_t;
[; ;pic12f1822.h: 1380: extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
[; ;pic12f1822.h: 1439: extern volatile unsigned char PCON @ 0x096;
"1441
[; ;pic12f1822.h: 1441: asm("PCON equ 096h");
[; <" PCON equ 096h ;# ">
[; ;pic12f1822.h: 1444: typedef union {
[; ;pic12f1822.h: 1445: struct {
[; ;pic12f1822.h: 1446: unsigned nBOR :1;
[; ;pic12f1822.h: 1447: unsigned nPOR :1;
[; ;pic12f1822.h: 1448: unsigned nRI :1;
[; ;pic12f1822.h: 1449: unsigned nRMCLR :1;
[; ;pic12f1822.h: 1450: unsigned :2;
[; ;pic12f1822.h: 1451: unsigned STKUNF :1;
[; ;pic12f1822.h: 1452: unsigned STKOVF :1;
[; ;pic12f1822.h: 1453: };
[; ;pic12f1822.h: 1454: } PCONbits_t;
[; ;pic12f1822.h: 1455: extern volatile PCONbits_t PCONbits @ 0x096;
[; ;pic12f1822.h: 1489: extern volatile unsigned char WDTCON @ 0x097;
"1491
[; ;pic12f1822.h: 1491: asm("WDTCON equ 097h");
[; <" WDTCON equ 097h ;# ">
[; ;pic12f1822.h: 1494: typedef union {
[; ;pic12f1822.h: 1495: struct {
[; ;pic12f1822.h: 1496: unsigned SWDTEN :1;
[; ;pic12f1822.h: 1497: unsigned WDTPS0 :1;
[; ;pic12f1822.h: 1498: unsigned WDTPS1 :1;
[; ;pic12f1822.h: 1499: unsigned WDTPS2 :1;
[; ;pic12f1822.h: 1500: unsigned WDTPS3 :1;
[; ;pic12f1822.h: 1501: unsigned WDTPS4 :1;
[; ;pic12f1822.h: 1502: };
[; ;pic12f1822.h: 1503: struct {
[; ;pic12f1822.h: 1504: unsigned :1;
[; ;pic12f1822.h: 1505: unsigned WDTPS :5;
[; ;pic12f1822.h: 1506: };
[; ;pic12f1822.h: 1507: } WDTCONbits_t;
[; ;pic12f1822.h: 1508: extern volatile WDTCONbits_t WDTCONbits @ 0x097;
[; ;pic12f1822.h: 1547: extern volatile unsigned char OSCTUNE @ 0x098;
"1549
[; ;pic12f1822.h: 1549: asm("OSCTUNE equ 098h");
[; <" OSCTUNE equ 098h ;# ">
[; ;pic12f1822.h: 1552: typedef union {
[; ;pic12f1822.h: 1553: struct {
[; ;pic12f1822.h: 1554: unsigned TUN0 :1;
[; ;pic12f1822.h: 1555: unsigned TUN1 :1;
[; ;pic12f1822.h: 1556: unsigned TUN2 :1;
[; ;pic12f1822.h: 1557: unsigned TUN3 :1;
[; ;pic12f1822.h: 1558: unsigned TUN4 :1;
[; ;pic12f1822.h: 1559: unsigned TUN5 :1;
[; ;pic12f1822.h: 1560: };
[; ;pic12f1822.h: 1561: struct {
[; ;pic12f1822.h: 1562: unsigned TUN :6;
[; ;pic12f1822.h: 1563: };
[; ;pic12f1822.h: 1564: } OSCTUNEbits_t;
[; ;pic12f1822.h: 1565: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
[; ;pic12f1822.h: 1604: extern volatile unsigned char OSCCON @ 0x099;
"1606
[; ;pic12f1822.h: 1606: asm("OSCCON equ 099h");
[; <" OSCCON equ 099h ;# ">
[; ;pic12f1822.h: 1609: typedef union {
[; ;pic12f1822.h: 1610: struct {
[; ;pic12f1822.h: 1611: unsigned SCS0 :1;
[; ;pic12f1822.h: 1612: unsigned SCS1 :1;
[; ;pic12f1822.h: 1613: unsigned :1;
[; ;pic12f1822.h: 1614: unsigned IRCF0 :1;
[; ;pic12f1822.h: 1615: unsigned IRCF1 :1;
[; ;pic12f1822.h: 1616: unsigned IRCF2 :1;
[; ;pic12f1822.h: 1617: unsigned IRCF3 :1;
[; ;pic12f1822.h: 1618: unsigned SPLLEN :1;
[; ;pic12f1822.h: 1619: };
[; ;pic12f1822.h: 1620: struct {
[; ;pic12f1822.h: 1621: unsigned SCS :2;
[; ;pic12f1822.h: 1622: unsigned :1;
[; ;pic12f1822.h: 1623: unsigned IRCF :4;
[; ;pic12f1822.h: 1624: };
[; ;pic12f1822.h: 1625: } OSCCONbits_t;
[; ;pic12f1822.h: 1626: extern volatile OSCCONbits_t OSCCONbits @ 0x099;
[; ;pic12f1822.h: 1675: extern volatile unsigned char OSCSTAT @ 0x09A;
"1677
[; ;pic12f1822.h: 1677: asm("OSCSTAT equ 09Ah");
[; <" OSCSTAT equ 09Ah ;# ">
[; ;pic12f1822.h: 1680: typedef union {
[; ;pic12f1822.h: 1681: struct {
[; ;pic12f1822.h: 1682: unsigned HFIOFS :1;
[; ;pic12f1822.h: 1683: unsigned LFIOFR :1;
[; ;pic12f1822.h: 1684: unsigned MFIOFR :1;
[; ;pic12f1822.h: 1685: unsigned HFIOFL :1;
[; ;pic12f1822.h: 1686: unsigned HFIOFR :1;
[; ;pic12f1822.h: 1687: unsigned OSTS :1;
[; ;pic12f1822.h: 1688: unsigned PLLR :1;
[; ;pic12f1822.h: 1689: unsigned T1OSCR :1;
[; ;pic12f1822.h: 1690: };
[; ;pic12f1822.h: 1691: } OSCSTATbits_t;
[; ;pic12f1822.h: 1692: extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
[; ;pic12f1822.h: 1736: extern volatile unsigned short ADRES @ 0x09B;
"1738
[; ;pic12f1822.h: 1738: asm("ADRES equ 09Bh");
[; <" ADRES equ 09Bh ;# ">
[; ;pic12f1822.h: 1742: extern volatile unsigned char ADRESL @ 0x09B;
"1744
[; ;pic12f1822.h: 1744: asm("ADRESL equ 09Bh");
[; <" ADRESL equ 09Bh ;# ">
[; ;pic12f1822.h: 1747: typedef union {
[; ;pic12f1822.h: 1748: struct {
[; ;pic12f1822.h: 1749: unsigned ADRESL :8;
[; ;pic12f1822.h: 1750: };
[; ;pic12f1822.h: 1751: } ADRESLbits_t;
[; ;pic12f1822.h: 1752: extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
[; ;pic12f1822.h: 1761: extern volatile unsigned char ADRESH @ 0x09C;
"1763
[; ;pic12f1822.h: 1763: asm("ADRESH equ 09Ch");
[; <" ADRESH equ 09Ch ;# ">
[; ;pic12f1822.h: 1766: typedef union {
[; ;pic12f1822.h: 1767: struct {
[; ;pic12f1822.h: 1768: unsigned ADRESH :8;
[; ;pic12f1822.h: 1769: };
[; ;pic12f1822.h: 1770: } ADRESHbits_t;
[; ;pic12f1822.h: 1771: extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
[; ;pic12f1822.h: 1780: extern volatile unsigned char ADCON0 @ 0x09D;
"1782
[; ;pic12f1822.h: 1782: asm("ADCON0 equ 09Dh");
[; <" ADCON0 equ 09Dh ;# ">
[; ;pic12f1822.h: 1785: typedef union {
[; ;pic12f1822.h: 1786: struct {
[; ;pic12f1822.h: 1787: unsigned ADON :1;
[; ;pic12f1822.h: 1788: unsigned GO_nDONE :1;
[; ;pic12f1822.h: 1789: unsigned CHS0 :1;
[; ;pic12f1822.h: 1790: unsigned CHS1 :1;
[; ;pic12f1822.h: 1791: unsigned CHS2 :1;
[; ;pic12f1822.h: 1792: unsigned CHS3 :1;
[; ;pic12f1822.h: 1793: unsigned CHS4 :1;
[; ;pic12f1822.h: 1794: };
[; ;pic12f1822.h: 1795: struct {
[; ;pic12f1822.h: 1796: unsigned :1;
[; ;pic12f1822.h: 1797: unsigned ADGO :1;
[; ;pic12f1822.h: 1798: unsigned CHS :5;
[; ;pic12f1822.h: 1799: };
[; ;pic12f1822.h: 1800: struct {
[; ;pic12f1822.h: 1801: unsigned :1;
[; ;pic12f1822.h: 1802: unsigned GO :1;
[; ;pic12f1822.h: 1803: };
[; ;pic12f1822.h: 1804: struct {
[; ;pic12f1822.h: 1805: unsigned :1;
[; ;pic12f1822.h: 1806: unsigned nDONE :1;
[; ;pic12f1822.h: 1807: };
[; ;pic12f1822.h: 1808: } ADCON0bits_t;
[; ;pic12f1822.h: 1809: extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
[; ;pic12f1822.h: 1868: extern volatile unsigned char ADCON1 @ 0x09E;
"1870
[; ;pic12f1822.h: 1870: asm("ADCON1 equ 09Eh");
[; <" ADCON1 equ 09Eh ;# ">
[; ;pic12f1822.h: 1873: typedef union {
[; ;pic12f1822.h: 1874: struct {
[; ;pic12f1822.h: 1875: unsigned ADPREF0 :1;
[; ;pic12f1822.h: 1876: unsigned ADPREF1 :1;
[; ;pic12f1822.h: 1877: unsigned :2;
[; ;pic12f1822.h: 1878: unsigned ADCS0 :1;
[; ;pic12f1822.h: 1879: unsigned ADCS1 :1;
[; ;pic12f1822.h: 1880: unsigned ADCS2 :1;
[; ;pic12f1822.h: 1881: unsigned ADFM :1;
[; ;pic12f1822.h: 1882: };
[; ;pic12f1822.h: 1883: struct {
[; ;pic12f1822.h: 1884: unsigned ADPREF :2;
[; ;pic12f1822.h: 1885: unsigned :2;
[; ;pic12f1822.h: 1886: unsigned ADCS :3;
[; ;pic12f1822.h: 1887: };
[; ;pic12f1822.h: 1888: } ADCON1bits_t;
[; ;pic12f1822.h: 1889: extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
[; ;pic12f1822.h: 1933: extern volatile unsigned char LATA @ 0x10C;
"1935
[; ;pic12f1822.h: 1935: asm("LATA equ 010Ch");
[; <" LATA equ 010Ch ;# ">
[; ;pic12f1822.h: 1938: typedef union {
[; ;pic12f1822.h: 1939: struct {
[; ;pic12f1822.h: 1940: unsigned LATA0 :1;
[; ;pic12f1822.h: 1941: unsigned LATA1 :1;
[; ;pic12f1822.h: 1942: unsigned LATA2 :1;
[; ;pic12f1822.h: 1943: unsigned :1;
[; ;pic12f1822.h: 1944: unsigned LATA4 :1;
[; ;pic12f1822.h: 1945: unsigned LATA5 :1;
[; ;pic12f1822.h: 1946: };
[; ;pic12f1822.h: 1947: } LATAbits_t;
[; ;pic12f1822.h: 1948: extern volatile LATAbits_t LATAbits @ 0x10C;
[; ;pic12f1822.h: 1977: extern volatile unsigned char CM1CON0 @ 0x111;
"1979
[; ;pic12f1822.h: 1979: asm("CM1CON0 equ 0111h");
[; <" CM1CON0 equ 0111h ;# ">
[; ;pic12f1822.h: 1982: typedef union {
[; ;pic12f1822.h: 1983: struct {
[; ;pic12f1822.h: 1984: unsigned C1SYNC :1;
[; ;pic12f1822.h: 1985: unsigned C1HYS :1;
[; ;pic12f1822.h: 1986: unsigned C1SP :1;
[; ;pic12f1822.h: 1987: unsigned :1;
[; ;pic12f1822.h: 1988: unsigned C1POL :1;
[; ;pic12f1822.h: 1989: unsigned C1OE :1;
[; ;pic12f1822.h: 1990: unsigned C1OUT :1;
[; ;pic12f1822.h: 1991: unsigned C1ON :1;
[; ;pic12f1822.h: 1992: };
[; ;pic12f1822.h: 1993: } CM1CON0bits_t;
[; ;pic12f1822.h: 1994: extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
[; ;pic12f1822.h: 2033: extern volatile unsigned char CM1CON1 @ 0x112;
"2035
[; ;pic12f1822.h: 2035: asm("CM1CON1 equ 0112h");
[; <" CM1CON1 equ 0112h ;# ">
[; ;pic12f1822.h: 2038: typedef union {
[; ;pic12f1822.h: 2039: struct {
[; ;pic12f1822.h: 2040: unsigned C1NCH0 :1;
[; ;pic12f1822.h: 2041: unsigned :3;
[; ;pic12f1822.h: 2042: unsigned C1PCH0 :1;
[; ;pic12f1822.h: 2043: unsigned C1PCH1 :1;
[; ;pic12f1822.h: 2044: unsigned C1INTN :1;
[; ;pic12f1822.h: 2045: unsigned C1INTP :1;
[; ;pic12f1822.h: 2046: };
[; ;pic12f1822.h: 2047: struct {
[; ;pic12f1822.h: 2048: unsigned :4;
[; ;pic12f1822.h: 2049: unsigned C1PCH :2;
[; ;pic12f1822.h: 2050: };
[; ;pic12f1822.h: 2051: } CM1CON1bits_t;
[; ;pic12f1822.h: 2052: extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
[; ;pic12f1822.h: 2086: extern volatile unsigned char CMOUT @ 0x115;
"2088
[; ;pic12f1822.h: 2088: asm("CMOUT equ 0115h");
[; <" CMOUT equ 0115h ;# ">
[; ;pic12f1822.h: 2091: typedef union {
[; ;pic12f1822.h: 2092: struct {
[; ;pic12f1822.h: 2093: unsigned MC1OUT :1;
[; ;pic12f1822.h: 2094: };
[; ;pic12f1822.h: 2095: } CMOUTbits_t;
[; ;pic12f1822.h: 2096: extern volatile CMOUTbits_t CMOUTbits @ 0x115;
[; ;pic12f1822.h: 2105: extern volatile unsigned char BORCON @ 0x116;
"2107
[; ;pic12f1822.h: 2107: asm("BORCON equ 0116h");
[; <" BORCON equ 0116h ;# ">
[; ;pic12f1822.h: 2110: typedef union {
[; ;pic12f1822.h: 2111: struct {
[; ;pic12f1822.h: 2112: unsigned BORRDY :1;
[; ;pic12f1822.h: 2113: unsigned :6;
[; ;pic12f1822.h: 2114: unsigned SBOREN :1;
[; ;pic12f1822.h: 2115: };
[; ;pic12f1822.h: 2116: } BORCONbits_t;
[; ;pic12f1822.h: 2117: extern volatile BORCONbits_t BORCONbits @ 0x116;
[; ;pic12f1822.h: 2131: extern volatile unsigned char FVRCON @ 0x117;
"2133
[; ;pic12f1822.h: 2133: asm("FVRCON equ 0117h");
[; <" FVRCON equ 0117h ;# ">
[; ;pic12f1822.h: 2136: typedef union {
[; ;pic12f1822.h: 2137: struct {
[; ;pic12f1822.h: 2138: unsigned ADFVR0 :1;
[; ;pic12f1822.h: 2139: unsigned ADFVR1 :1;
[; ;pic12f1822.h: 2140: unsigned CDAFVR0 :1;
[; ;pic12f1822.h: 2141: unsigned CDAFVR1 :1;
[; ;pic12f1822.h: 2142: unsigned TSRNG :1;
[; ;pic12f1822.h: 2143: unsigned TSEN :1;
[; ;pic12f1822.h: 2144: unsigned FVRRDY :1;
[; ;pic12f1822.h: 2145: unsigned FVREN :1;
[; ;pic12f1822.h: 2146: };
[; ;pic12f1822.h: 2147: struct {
[; ;pic12f1822.h: 2148: unsigned ADFVR :2;
[; ;pic12f1822.h: 2149: unsigned CDAFVR :2;
[; ;pic12f1822.h: 2150: };
[; ;pic12f1822.h: 2151: } FVRCONbits_t;
[; ;pic12f1822.h: 2152: extern volatile FVRCONbits_t FVRCONbits @ 0x117;
[; ;pic12f1822.h: 2206: extern volatile unsigned char DACCON0 @ 0x118;
"2208
[; ;pic12f1822.h: 2208: asm("DACCON0 equ 0118h");
[; <" DACCON0 equ 0118h ;# ">
[; ;pic12f1822.h: 2211: typedef union {
[; ;pic12f1822.h: 2212: struct {
[; ;pic12f1822.h: 2213: unsigned :2;
[; ;pic12f1822.h: 2214: unsigned DACPSS0 :1;
[; ;pic12f1822.h: 2215: unsigned DACPSS1 :1;
[; ;pic12f1822.h: 2216: unsigned :1;
[; ;pic12f1822.h: 2217: unsigned DACOE :1;
[; ;pic12f1822.h: 2218: unsigned DACLPS :1;
[; ;pic12f1822.h: 2219: unsigned DACEN :1;
[; ;pic12f1822.h: 2220: };
[; ;pic12f1822.h: 2221: struct {
[; ;pic12f1822.h: 2222: unsigned :2;
[; ;pic12f1822.h: 2223: unsigned DACPSS :2;
[; ;pic12f1822.h: 2224: };
[; ;pic12f1822.h: 2225: } DACCON0bits_t;
[; ;pic12f1822.h: 2226: extern volatile DACCON0bits_t DACCON0bits @ 0x118;
[; ;pic12f1822.h: 2260: extern volatile unsigned char DACCON1 @ 0x119;
"2262
[; ;pic12f1822.h: 2262: asm("DACCON1 equ 0119h");
[; <" DACCON1 equ 0119h ;# ">
[; ;pic12f1822.h: 2265: typedef union {
[; ;pic12f1822.h: 2266: struct {
[; ;pic12f1822.h: 2267: unsigned DACR0 :1;
[; ;pic12f1822.h: 2268: unsigned DACR1 :1;
[; ;pic12f1822.h: 2269: unsigned DACR2 :1;
[; ;pic12f1822.h: 2270: unsigned DACR3 :1;
[; ;pic12f1822.h: 2271: unsigned DACR4 :1;
[; ;pic12f1822.h: 2272: };
[; ;pic12f1822.h: 2273: struct {
[; ;pic12f1822.h: 2274: unsigned DACR :5;
[; ;pic12f1822.h: 2275: };
[; ;pic12f1822.h: 2276: } DACCON1bits_t;
[; ;pic12f1822.h: 2277: extern volatile DACCON1bits_t DACCON1bits @ 0x119;
[; ;pic12f1822.h: 2311: extern volatile unsigned char SRCON0 @ 0x11A;
"2313
[; ;pic12f1822.h: 2313: asm("SRCON0 equ 011Ah");
[; <" SRCON0 equ 011Ah ;# ">
[; ;pic12f1822.h: 2316: typedef union {
[; ;pic12f1822.h: 2317: struct {
[; ;pic12f1822.h: 2318: unsigned SRPR :1;
[; ;pic12f1822.h: 2319: unsigned SRPS :1;
[; ;pic12f1822.h: 2320: unsigned SRNQEN :1;
[; ;pic12f1822.h: 2321: unsigned SRQEN :1;
[; ;pic12f1822.h: 2322: unsigned SRCLK0 :1;
[; ;pic12f1822.h: 2323: unsigned SRCLK1 :1;
[; ;pic12f1822.h: 2324: unsigned SRCLK2 :1;
[; ;pic12f1822.h: 2325: unsigned SRLEN :1;
[; ;pic12f1822.h: 2326: };
[; ;pic12f1822.h: 2327: struct {
[; ;pic12f1822.h: 2328: unsigned :4;
[; ;pic12f1822.h: 2329: unsigned SRCLK :3;
[; ;pic12f1822.h: 2330: };
[; ;pic12f1822.h: 2331: } SRCON0bits_t;
[; ;pic12f1822.h: 2332: extern volatile SRCON0bits_t SRCON0bits @ 0x11A;
[; ;pic12f1822.h: 2381: extern volatile unsigned char SRCON1 @ 0x11B;
"2383
[; ;pic12f1822.h: 2383: asm("SRCON1 equ 011Bh");
[; <" SRCON1 equ 011Bh ;# ">
[; ;pic12f1822.h: 2386: typedef union {
[; ;pic12f1822.h: 2387: struct {
[; ;pic12f1822.h: 2388: unsigned SRRC1E :1;
[; ;pic12f1822.h: 2389: unsigned :1;
[; ;pic12f1822.h: 2390: unsigned SRRCKE :1;
[; ;pic12f1822.h: 2391: unsigned SRRPE :1;
[; ;pic12f1822.h: 2392: unsigned SRSC1E :1;
[; ;pic12f1822.h: 2393: unsigned :1;
[; ;pic12f1822.h: 2394: unsigned SRSCKE :1;
[; ;pic12f1822.h: 2395: unsigned SRSPE :1;
[; ;pic12f1822.h: 2396: };
[; ;pic12f1822.h: 2397: } SRCON1bits_t;
[; ;pic12f1822.h: 2398: extern volatile SRCON1bits_t SRCON1bits @ 0x11B;
[; ;pic12f1822.h: 2432: extern volatile unsigned char APFCON @ 0x11D;
"2434
[; ;pic12f1822.h: 2434: asm("APFCON equ 011Dh");
[; <" APFCON equ 011Dh ;# ">
[; ;pic12f1822.h: 2437: extern volatile unsigned char APFCON0 @ 0x11D;
"2439
[; ;pic12f1822.h: 2439: asm("APFCON0 equ 011Dh");
[; <" APFCON0 equ 011Dh ;# ">
[; ;pic12f1822.h: 2442: typedef union {
[; ;pic12f1822.h: 2443: struct {
[; ;pic12f1822.h: 2444: unsigned CCP1SEL :1;
[; ;pic12f1822.h: 2445: unsigned P1BSEL :1;
[; ;pic12f1822.h: 2446: unsigned TXCKSEL :1;
[; ;pic12f1822.h: 2447: unsigned T1GSEL :1;
[; ;pic12f1822.h: 2448: unsigned :1;
[; ;pic12f1822.h: 2449: unsigned SSSEL :1;
[; ;pic12f1822.h: 2450: unsigned SDOSEL :1;
[; ;pic12f1822.h: 2451: unsigned RXDTSEL :1;
[; ;pic12f1822.h: 2452: };
[; ;pic12f1822.h: 2453: struct {
[; ;pic12f1822.h: 2454: unsigned :5;
[; ;pic12f1822.h: 2455: unsigned SS1SEL :1;
[; ;pic12f1822.h: 2456: unsigned SDO1SEL :1;
[; ;pic12f1822.h: 2457: };
[; ;pic12f1822.h: 2458: } APFCONbits_t;
[; ;pic12f1822.h: 2459: extern volatile APFCONbits_t APFCONbits @ 0x11D;
[; ;pic12f1822.h: 2507: typedef union {
[; ;pic12f1822.h: 2508: struct {
[; ;pic12f1822.h: 2509: unsigned CCP1SEL :1;
[; ;pic12f1822.h: 2510: unsigned P1BSEL :1;
[; ;pic12f1822.h: 2511: unsigned TXCKSEL :1;
[; ;pic12f1822.h: 2512: unsigned T1GSEL :1;
[; ;pic12f1822.h: 2513: unsigned :1;
[; ;pic12f1822.h: 2514: unsigned SSSEL :1;
[; ;pic12f1822.h: 2515: unsigned SDOSEL :1;
[; ;pic12f1822.h: 2516: unsigned RXDTSEL :1;
[; ;pic12f1822.h: 2517: };
[; ;pic12f1822.h: 2518: struct {
[; ;pic12f1822.h: 2519: unsigned :5;
[; ;pic12f1822.h: 2520: unsigned SS1SEL :1;
[; ;pic12f1822.h: 2521: unsigned SDO1SEL :1;
[; ;pic12f1822.h: 2522: };
[; ;pic12f1822.h: 2523: } APFCON0bits_t;
[; ;pic12f1822.h: 2524: extern volatile APFCON0bits_t APFCON0bits @ 0x11D;
[; ;pic12f1822.h: 2573: extern volatile unsigned char ANSELA @ 0x18C;
"2575
[; ;pic12f1822.h: 2575: asm("ANSELA equ 018Ch");
[; <" ANSELA equ 018Ch ;# ">
[; ;pic12f1822.h: 2578: typedef union {
[; ;pic12f1822.h: 2579: struct {
[; ;pic12f1822.h: 2580: unsigned ANSA0 :1;
[; ;pic12f1822.h: 2581: unsigned ANSA1 :1;
[; ;pic12f1822.h: 2582: unsigned ANSA2 :1;
[; ;pic12f1822.h: 2583: unsigned :1;
[; ;pic12f1822.h: 2584: unsigned ANSA4 :1;
[; ;pic12f1822.h: 2585: };
[; ;pic12f1822.h: 2586: struct {
[; ;pic12f1822.h: 2587: unsigned ANSELA :5;
[; ;pic12f1822.h: 2588: };
[; ;pic12f1822.h: 2589: } ANSELAbits_t;
[; ;pic12f1822.h: 2590: extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
[; ;pic12f1822.h: 2619: extern volatile unsigned short EEADR @ 0x191;
"2621
[; ;pic12f1822.h: 2621: asm("EEADR equ 0191h");
[; <" EEADR equ 0191h ;# ">
[; ;pic12f1822.h: 2625: extern volatile unsigned char EEADRL @ 0x191;
"2627
[; ;pic12f1822.h: 2627: asm("EEADRL equ 0191h");
[; <" EEADRL equ 0191h ;# ">
[; ;pic12f1822.h: 2630: typedef union {
[; ;pic12f1822.h: 2631: struct {
[; ;pic12f1822.h: 2632: unsigned EEADRL :8;
[; ;pic12f1822.h: 2633: };
[; ;pic12f1822.h: 2634: } EEADRLbits_t;
[; ;pic12f1822.h: 2635: extern volatile EEADRLbits_t EEADRLbits @ 0x191;
[; ;pic12f1822.h: 2644: extern volatile unsigned char EEADRH @ 0x192;
"2646
[; ;pic12f1822.h: 2646: asm("EEADRH equ 0192h");
[; <" EEADRH equ 0192h ;# ">
[; ;pic12f1822.h: 2649: typedef union {
[; ;pic12f1822.h: 2650: struct {
[; ;pic12f1822.h: 2651: unsigned EEADRH :7;
[; ;pic12f1822.h: 2652: };
[; ;pic12f1822.h: 2653: } EEADRHbits_t;
[; ;pic12f1822.h: 2654: extern volatile EEADRHbits_t EEADRHbits @ 0x192;
[; ;pic12f1822.h: 2663: extern volatile unsigned short EEDAT @ 0x193;
"2665
[; ;pic12f1822.h: 2665: asm("EEDAT equ 0193h");
[; <" EEDAT equ 0193h ;# ">
[; ;pic12f1822.h: 2669: extern volatile unsigned char EEDATL @ 0x193;
"2671
[; ;pic12f1822.h: 2671: asm("EEDATL equ 0193h");
[; <" EEDATL equ 0193h ;# ">
[; ;pic12f1822.h: 2674: extern volatile unsigned char EEDATA @ 0x193;
"2676
[; ;pic12f1822.h: 2676: asm("EEDATA equ 0193h");
[; <" EEDATA equ 0193h ;# ">
[; ;pic12f1822.h: 2679: typedef union {
[; ;pic12f1822.h: 2680: struct {
[; ;pic12f1822.h: 2681: unsigned EEDATL :8;
[; ;pic12f1822.h: 2682: };
[; ;pic12f1822.h: 2683: } EEDATLbits_t;
[; ;pic12f1822.h: 2684: extern volatile EEDATLbits_t EEDATLbits @ 0x193;
[; ;pic12f1822.h: 2692: typedef union {
[; ;pic12f1822.h: 2693: struct {
[; ;pic12f1822.h: 2694: unsigned EEDATL :8;
[; ;pic12f1822.h: 2695: };
[; ;pic12f1822.h: 2696: } EEDATAbits_t;
[; ;pic12f1822.h: 2697: extern volatile EEDATAbits_t EEDATAbits @ 0x193;
[; ;pic12f1822.h: 2706: extern volatile unsigned char EEDATH @ 0x194;
"2708
[; ;pic12f1822.h: 2708: asm("EEDATH equ 0194h");
[; <" EEDATH equ 0194h ;# ">
[; ;pic12f1822.h: 2711: typedef union {
[; ;pic12f1822.h: 2712: struct {
[; ;pic12f1822.h: 2713: unsigned EEDATH :6;
[; ;pic12f1822.h: 2714: };
[; ;pic12f1822.h: 2715: } EEDATHbits_t;
[; ;pic12f1822.h: 2716: extern volatile EEDATHbits_t EEDATHbits @ 0x194;
[; ;pic12f1822.h: 2725: extern volatile unsigned char EECON1 @ 0x195;
"2727
[; ;pic12f1822.h: 2727: asm("EECON1 equ 0195h");
[; <" EECON1 equ 0195h ;# ">
[; ;pic12f1822.h: 2730: typedef union {
[; ;pic12f1822.h: 2731: struct {
[; ;pic12f1822.h: 2732: unsigned RD :1;
[; ;pic12f1822.h: 2733: unsigned WR :1;
[; ;pic12f1822.h: 2734: unsigned WREN :1;
[; ;pic12f1822.h: 2735: unsigned WRERR :1;
[; ;pic12f1822.h: 2736: unsigned FREE :1;
[; ;pic12f1822.h: 2737: unsigned LWLO :1;
[; ;pic12f1822.h: 2738: unsigned CFGS :1;
[; ;pic12f1822.h: 2739: unsigned EEPGD :1;
[; ;pic12f1822.h: 2740: };
[; ;pic12f1822.h: 2741: } EECON1bits_t;
[; ;pic12f1822.h: 2742: extern volatile EECON1bits_t EECON1bits @ 0x195;
[; ;pic12f1822.h: 2786: extern volatile unsigned char EECON2 @ 0x196;
"2788
[; ;pic12f1822.h: 2788: asm("EECON2 equ 0196h");
[; <" EECON2 equ 0196h ;# ">
[; ;pic12f1822.h: 2791: typedef union {
[; ;pic12f1822.h: 2792: struct {
[; ;pic12f1822.h: 2793: unsigned EECON2 :8;
[; ;pic12f1822.h: 2794: };
[; ;pic12f1822.h: 2795: } EECON2bits_t;
[; ;pic12f1822.h: 2796: extern volatile EECON2bits_t EECON2bits @ 0x196;
[; ;pic12f1822.h: 2805: extern volatile unsigned char RCREG @ 0x199;
"2807
[; ;pic12f1822.h: 2807: asm("RCREG equ 0199h");
[; <" RCREG equ 0199h ;# ">
[; ;pic12f1822.h: 2810: typedef union {
[; ;pic12f1822.h: 2811: struct {
[; ;pic12f1822.h: 2812: unsigned RCREG :8;
[; ;pic12f1822.h: 2813: };
[; ;pic12f1822.h: 2814: } RCREGbits_t;
[; ;pic12f1822.h: 2815: extern volatile RCREGbits_t RCREGbits @ 0x199;
[; ;pic12f1822.h: 2824: extern volatile unsigned char TXREG @ 0x19A;
"2826
[; ;pic12f1822.h: 2826: asm("TXREG equ 019Ah");
[; <" TXREG equ 019Ah ;# ">
[; ;pic12f1822.h: 2829: typedef union {
[; ;pic12f1822.h: 2830: struct {
[; ;pic12f1822.h: 2831: unsigned TXREG :8;
[; ;pic12f1822.h: 2832: };
[; ;pic12f1822.h: 2833: } TXREGbits_t;
[; ;pic12f1822.h: 2834: extern volatile TXREGbits_t TXREGbits @ 0x19A;
[; ;pic12f1822.h: 2843: extern volatile unsigned char SPBRGL @ 0x19B;
"2845
[; ;pic12f1822.h: 2845: asm("SPBRGL equ 019Bh");
[; <" SPBRGL equ 019Bh ;# ">
[; ;pic12f1822.h: 2848: extern volatile unsigned char SPBRG @ 0x19B;
"2850
[; ;pic12f1822.h: 2850: asm("SPBRG equ 019Bh");
[; <" SPBRG equ 019Bh ;# ">
[; ;pic12f1822.h: 2853: typedef union {
[; ;pic12f1822.h: 2854: struct {
[; ;pic12f1822.h: 2855: unsigned SPBRGL :8;
[; ;pic12f1822.h: 2856: };
[; ;pic12f1822.h: 2857: } SPBRGLbits_t;
[; ;pic12f1822.h: 2858: extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
[; ;pic12f1822.h: 2866: typedef union {
[; ;pic12f1822.h: 2867: struct {
[; ;pic12f1822.h: 2868: unsigned SPBRGL :8;
[; ;pic12f1822.h: 2869: };
[; ;pic12f1822.h: 2870: } SPBRGbits_t;
[; ;pic12f1822.h: 2871: extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
[; ;pic12f1822.h: 2880: extern volatile unsigned char SPBRGH @ 0x19C;
"2882
[; ;pic12f1822.h: 2882: asm("SPBRGH equ 019Ch");
[; <" SPBRGH equ 019Ch ;# ">
[; ;pic12f1822.h: 2885: typedef union {
[; ;pic12f1822.h: 2886: struct {
[; ;pic12f1822.h: 2887: unsigned SPBRGH :8;
[; ;pic12f1822.h: 2888: };
[; ;pic12f1822.h: 2889: } SPBRGHbits_t;
[; ;pic12f1822.h: 2890: extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
[; ;pic12f1822.h: 2899: extern volatile unsigned char RCSTA @ 0x19D;
"2901
[; ;pic12f1822.h: 2901: asm("RCSTA equ 019Dh");
[; <" RCSTA equ 019Dh ;# ">
[; ;pic12f1822.h: 2904: typedef union {
[; ;pic12f1822.h: 2905: struct {
[; ;pic12f1822.h: 2906: unsigned RX9D :1;
[; ;pic12f1822.h: 2907: unsigned OERR :1;
[; ;pic12f1822.h: 2908: unsigned FERR :1;
[; ;pic12f1822.h: 2909: unsigned ADDEN :1;
[; ;pic12f1822.h: 2910: unsigned CREN :1;
[; ;pic12f1822.h: 2911: unsigned SREN :1;
[; ;pic12f1822.h: 2912: unsigned RX9 :1;
[; ;pic12f1822.h: 2913: unsigned SPEN :1;
[; ;pic12f1822.h: 2914: };
[; ;pic12f1822.h: 2915: } RCSTAbits_t;
[; ;pic12f1822.h: 2916: extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
[; ;pic12f1822.h: 2960: extern volatile unsigned char TXSTA @ 0x19E;
"2962
[; ;pic12f1822.h: 2962: asm("TXSTA equ 019Eh");
[; <" TXSTA equ 019Eh ;# ">
[; ;pic12f1822.h: 2965: typedef union {
[; ;pic12f1822.h: 2966: struct {
[; ;pic12f1822.h: 2967: unsigned TX9D :1;
[; ;pic12f1822.h: 2968: unsigned TRMT :1;
[; ;pic12f1822.h: 2969: unsigned BRGH :1;
[; ;pic12f1822.h: 2970: unsigned SENDB :1;
[; ;pic12f1822.h: 2971: unsigned SYNC :1;
[; ;pic12f1822.h: 2972: unsigned TXEN :1;
[; ;pic12f1822.h: 2973: unsigned TX9 :1;
[; ;pic12f1822.h: 2974: unsigned CSRC :1;
[; ;pic12f1822.h: 2975: };
[; ;pic12f1822.h: 2976: } TXSTAbits_t;
[; ;pic12f1822.h: 2977: extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
[; ;pic12f1822.h: 3021: extern volatile unsigned char BAUDCON @ 0x19F;
"3023
[; ;pic12f1822.h: 3023: asm("BAUDCON equ 019Fh");
[; <" BAUDCON equ 019Fh ;# ">
[; ;pic12f1822.h: 3026: typedef union {
[; ;pic12f1822.h: 3027: struct {
[; ;pic12f1822.h: 3028: unsigned ABDEN :1;
[; ;pic12f1822.h: 3029: unsigned WUE :1;
[; ;pic12f1822.h: 3030: unsigned :1;
[; ;pic12f1822.h: 3031: unsigned BRG16 :1;
[; ;pic12f1822.h: 3032: unsigned SCKP :1;
[; ;pic12f1822.h: 3033: unsigned :1;
[; ;pic12f1822.h: 3034: unsigned RCIDL :1;
[; ;pic12f1822.h: 3035: unsigned ABDOVF :1;
[; ;pic12f1822.h: 3036: };
[; ;pic12f1822.h: 3037: } BAUDCONbits_t;
[; ;pic12f1822.h: 3038: extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
[; ;pic12f1822.h: 3072: extern volatile unsigned char WPUA @ 0x20C;
"3074
[; ;pic12f1822.h: 3074: asm("WPUA equ 020Ch");
[; <" WPUA equ 020Ch ;# ">
[; ;pic12f1822.h: 3077: typedef union {
[; ;pic12f1822.h: 3078: struct {
[; ;pic12f1822.h: 3079: unsigned WPUA0 :1;
[; ;pic12f1822.h: 3080: unsigned WPUA1 :1;
[; ;pic12f1822.h: 3081: unsigned WPUA2 :1;
[; ;pic12f1822.h: 3082: unsigned WPUA3 :1;
[; ;pic12f1822.h: 3083: unsigned WPUA4 :1;
[; ;pic12f1822.h: 3084: unsigned WPUA5 :1;
[; ;pic12f1822.h: 3085: };
[; ;pic12f1822.h: 3086: struct {
[; ;pic12f1822.h: 3087: unsigned WPUA :6;
[; ;pic12f1822.h: 3088: };
[; ;pic12f1822.h: 3089: } WPUAbits_t;
[; ;pic12f1822.h: 3090: extern volatile WPUAbits_t WPUAbits @ 0x20C;
[; ;pic12f1822.h: 3129: extern volatile unsigned char SSP1BUF @ 0x211;
"3131
[; ;pic12f1822.h: 3131: asm("SSP1BUF equ 0211h");
[; <" SSP1BUF equ 0211h ;# ">
[; ;pic12f1822.h: 3134: extern volatile unsigned char SSPBUF @ 0x211;
"3136
[; ;pic12f1822.h: 3136: asm("SSPBUF equ 0211h");
[; <" SSPBUF equ 0211h ;# ">
[; ;pic12f1822.h: 3139: typedef union {
[; ;pic12f1822.h: 3140: struct {
[; ;pic12f1822.h: 3141: unsigned SSPBUF :8;
[; ;pic12f1822.h: 3142: };
[; ;pic12f1822.h: 3143: } SSP1BUFbits_t;
[; ;pic12f1822.h: 3144: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
[; ;pic12f1822.h: 3152: typedef union {
[; ;pic12f1822.h: 3153: struct {
[; ;pic12f1822.h: 3154: unsigned SSPBUF :8;
[; ;pic12f1822.h: 3155: };
[; ;pic12f1822.h: 3156: } SSPBUFbits_t;
[; ;pic12f1822.h: 3157: extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
[; ;pic12f1822.h: 3166: extern volatile unsigned char SSP1ADD @ 0x212;
"3168
[; ;pic12f1822.h: 3168: asm("SSP1ADD equ 0212h");
[; <" SSP1ADD equ 0212h ;# ">
[; ;pic12f1822.h: 3171: extern volatile unsigned char SSPADD @ 0x212;
"3173
[; ;pic12f1822.h: 3173: asm("SSPADD equ 0212h");
[; <" SSPADD equ 0212h ;# ">
[; ;pic12f1822.h: 3176: typedef union {
[; ;pic12f1822.h: 3177: struct {
[; ;pic12f1822.h: 3178: unsigned SSPADD :8;
[; ;pic12f1822.h: 3179: };
[; ;pic12f1822.h: 3180: } SSP1ADDbits_t;
[; ;pic12f1822.h: 3181: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
[; ;pic12f1822.h: 3189: typedef union {
[; ;pic12f1822.h: 3190: struct {
[; ;pic12f1822.h: 3191: unsigned SSPADD :8;
[; ;pic12f1822.h: 3192: };
[; ;pic12f1822.h: 3193: } SSPADDbits_t;
[; ;pic12f1822.h: 3194: extern volatile SSPADDbits_t SSPADDbits @ 0x212;
[; ;pic12f1822.h: 3203: extern volatile unsigned char SSP1MSK @ 0x213;
"3205
[; ;pic12f1822.h: 3205: asm("SSP1MSK equ 0213h");
[; <" SSP1MSK equ 0213h ;# ">
[; ;pic12f1822.h: 3208: extern volatile unsigned char SSPMSK @ 0x213;
"3210
[; ;pic12f1822.h: 3210: asm("SSPMSK equ 0213h");
[; <" SSPMSK equ 0213h ;# ">
[; ;pic12f1822.h: 3213: typedef union {
[; ;pic12f1822.h: 3214: struct {
[; ;pic12f1822.h: 3215: unsigned SSPMSK :8;
[; ;pic12f1822.h: 3216: };
[; ;pic12f1822.h: 3217: } SSP1MSKbits_t;
[; ;pic12f1822.h: 3218: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
[; ;pic12f1822.h: 3226: typedef union {
[; ;pic12f1822.h: 3227: struct {
[; ;pic12f1822.h: 3228: unsigned SSPMSK :8;
[; ;pic12f1822.h: 3229: };
[; ;pic12f1822.h: 3230: } SSPMSKbits_t;
[; ;pic12f1822.h: 3231: extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
[; ;pic12f1822.h: 3240: extern volatile unsigned char SSP1STAT @ 0x214;
"3242
[; ;pic12f1822.h: 3242: asm("SSP1STAT equ 0214h");
[; <" SSP1STAT equ 0214h ;# ">
[; ;pic12f1822.h: 3245: extern volatile unsigned char SSPSTAT @ 0x214;
"3247
[; ;pic12f1822.h: 3247: asm("SSPSTAT equ 0214h");
[; <" SSPSTAT equ 0214h ;# ">
[; ;pic12f1822.h: 3250: typedef union {
[; ;pic12f1822.h: 3251: struct {
[; ;pic12f1822.h: 3252: unsigned BF :1;
[; ;pic12f1822.h: 3253: unsigned UA :1;
[; ;pic12f1822.h: 3254: unsigned R_nW :1;
[; ;pic12f1822.h: 3255: unsigned S :1;
[; ;pic12f1822.h: 3256: unsigned P :1;
[; ;pic12f1822.h: 3257: unsigned D_nA :1;
[; ;pic12f1822.h: 3258: unsigned CKE :1;
[; ;pic12f1822.h: 3259: unsigned SMP :1;
[; ;pic12f1822.h: 3260: };
[; ;pic12f1822.h: 3261: } SSP1STATbits_t;
[; ;pic12f1822.h: 3262: extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
[; ;pic12f1822.h: 3305: typedef union {
[; ;pic12f1822.h: 3306: struct {
[; ;pic12f1822.h: 3307: unsigned BF :1;
[; ;pic12f1822.h: 3308: unsigned UA :1;
[; ;pic12f1822.h: 3309: unsigned R_nW :1;
[; ;pic12f1822.h: 3310: unsigned S :1;
[; ;pic12f1822.h: 3311: unsigned P :1;
[; ;pic12f1822.h: 3312: unsigned D_nA :1;
[; ;pic12f1822.h: 3313: unsigned CKE :1;
[; ;pic12f1822.h: 3314: unsigned SMP :1;
[; ;pic12f1822.h: 3315: };
[; ;pic12f1822.h: 3316: } SSPSTATbits_t;
[; ;pic12f1822.h: 3317: extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
[; ;pic12f1822.h: 3361: extern volatile unsigned char SSP1CON1 @ 0x215;
"3363
[; ;pic12f1822.h: 3363: asm("SSP1CON1 equ 0215h");
[; <" SSP1CON1 equ 0215h ;# ">
[; ;pic12f1822.h: 3366: extern volatile unsigned char SSPCON1 @ 0x215;
"3368
[; ;pic12f1822.h: 3368: asm("SSPCON1 equ 0215h");
[; <" SSPCON1 equ 0215h ;# ">
[; ;pic12f1822.h: 3370: extern volatile unsigned char SSPCON @ 0x215;
"3372
[; ;pic12f1822.h: 3372: asm("SSPCON equ 0215h");
[; <" SSPCON equ 0215h ;# ">
[; ;pic12f1822.h: 3375: typedef union {
[; ;pic12f1822.h: 3376: struct {
[; ;pic12f1822.h: 3377: unsigned SSPM0 :1;
[; ;pic12f1822.h: 3378: unsigned SSPM1 :1;
[; ;pic12f1822.h: 3379: unsigned SSPM2 :1;
[; ;pic12f1822.h: 3380: unsigned SSPM3 :1;
[; ;pic12f1822.h: 3381: unsigned CKP :1;
[; ;pic12f1822.h: 3382: unsigned SSPEN :1;
[; ;pic12f1822.h: 3383: unsigned SSPOV :1;
[; ;pic12f1822.h: 3384: unsigned WCOL :1;
[; ;pic12f1822.h: 3385: };
[; ;pic12f1822.h: 3386: struct {
[; ;pic12f1822.h: 3387: unsigned SSPM :4;
[; ;pic12f1822.h: 3388: };
[; ;pic12f1822.h: 3389: } SSP1CON1bits_t;
[; ;pic12f1822.h: 3390: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
[; ;pic12f1822.h: 3438: typedef union {
[; ;pic12f1822.h: 3439: struct {
[; ;pic12f1822.h: 3440: unsigned SSPM0 :1;
[; ;pic12f1822.h: 3441: unsigned SSPM1 :1;
[; ;pic12f1822.h: 3442: unsigned SSPM2 :1;
[; ;pic12f1822.h: 3443: unsigned SSPM3 :1;
[; ;pic12f1822.h: 3444: unsigned CKP :1;
[; ;pic12f1822.h: 3445: unsigned SSPEN :1;
[; ;pic12f1822.h: 3446: unsigned SSPOV :1;
[; ;pic12f1822.h: 3447: unsigned WCOL :1;
[; ;pic12f1822.h: 3448: };
[; ;pic12f1822.h: 3449: struct {
[; ;pic12f1822.h: 3450: unsigned SSPM :4;
[; ;pic12f1822.h: 3451: };
[; ;pic12f1822.h: 3452: } SSPCON1bits_t;
[; ;pic12f1822.h: 3453: extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
[; ;pic12f1822.h: 3500: typedef union {
[; ;pic12f1822.h: 3501: struct {
[; ;pic12f1822.h: 3502: unsigned SSPM0 :1;
[; ;pic12f1822.h: 3503: unsigned SSPM1 :1;
[; ;pic12f1822.h: 3504: unsigned SSPM2 :1;
[; ;pic12f1822.h: 3505: unsigned SSPM3 :1;
[; ;pic12f1822.h: 3506: unsigned CKP :1;
[; ;pic12f1822.h: 3507: unsigned SSPEN :1;
[; ;pic12f1822.h: 3508: unsigned SSPOV :1;
[; ;pic12f1822.h: 3509: unsigned WCOL :1;
[; ;pic12f1822.h: 3510: };
[; ;pic12f1822.h: 3511: struct {
[; ;pic12f1822.h: 3512: unsigned SSPM :4;
[; ;pic12f1822.h: 3513: };
[; ;pic12f1822.h: 3514: } SSPCONbits_t;
[; ;pic12f1822.h: 3515: extern volatile SSPCONbits_t SSPCONbits @ 0x215;
[; ;pic12f1822.h: 3564: extern volatile unsigned char SSP1CON2 @ 0x216;
"3566
[; ;pic12f1822.h: 3566: asm("SSP1CON2 equ 0216h");
[; <" SSP1CON2 equ 0216h ;# ">
[; ;pic12f1822.h: 3569: extern volatile unsigned char SSPCON2 @ 0x216;
"3571
[; ;pic12f1822.h: 3571: asm("SSPCON2 equ 0216h");
[; <" SSPCON2 equ 0216h ;# ">
[; ;pic12f1822.h: 3574: typedef union {
[; ;pic12f1822.h: 3575: struct {
[; ;pic12f1822.h: 3576: unsigned SEN :1;
[; ;pic12f1822.h: 3577: unsigned RSEN :1;
[; ;pic12f1822.h: 3578: unsigned PEN :1;
[; ;pic12f1822.h: 3579: unsigned RCEN :1;
[; ;pic12f1822.h: 3580: unsigned ACKEN :1;
[; ;pic12f1822.h: 3581: unsigned ACKDT :1;
[; ;pic12f1822.h: 3582: unsigned ACKSTAT :1;
[; ;pic12f1822.h: 3583: unsigned GCEN :1;
[; ;pic12f1822.h: 3584: };
[; ;pic12f1822.h: 3585: } SSP1CON2bits_t;
[; ;pic12f1822.h: 3586: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
[; ;pic12f1822.h: 3629: typedef union {
[; ;pic12f1822.h: 3630: struct {
[; ;pic12f1822.h: 3631: unsigned SEN :1;
[; ;pic12f1822.h: 3632: unsigned RSEN :1;
[; ;pic12f1822.h: 3633: unsigned PEN :1;
[; ;pic12f1822.h: 3634: unsigned RCEN :1;
[; ;pic12f1822.h: 3635: unsigned ACKEN :1;
[; ;pic12f1822.h: 3636: unsigned ACKDT :1;
[; ;pic12f1822.h: 3637: unsigned ACKSTAT :1;
[; ;pic12f1822.h: 3638: unsigned GCEN :1;
[; ;pic12f1822.h: 3639: };
[; ;pic12f1822.h: 3640: } SSPCON2bits_t;
[; ;pic12f1822.h: 3641: extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
[; ;pic12f1822.h: 3685: extern volatile unsigned char SSP1CON3 @ 0x217;
"3687
[; ;pic12f1822.h: 3687: asm("SSP1CON3 equ 0217h");
[; <" SSP1CON3 equ 0217h ;# ">
[; ;pic12f1822.h: 3690: extern volatile unsigned char SSPCON3 @ 0x217;
"3692
[; ;pic12f1822.h: 3692: asm("SSPCON3 equ 0217h");
[; <" SSPCON3 equ 0217h ;# ">
[; ;pic12f1822.h: 3695: typedef union {
[; ;pic12f1822.h: 3696: struct {
[; ;pic12f1822.h: 3697: unsigned DHEN :1;
[; ;pic12f1822.h: 3698: unsigned AHEN :1;
[; ;pic12f1822.h: 3699: unsigned SBCDE :1;
[; ;pic12f1822.h: 3700: unsigned SDAHT :1;
[; ;pic12f1822.h: 3701: unsigned BOEN :1;
[; ;pic12f1822.h: 3702: unsigned SCIE :1;
[; ;pic12f1822.h: 3703: unsigned PCIE :1;
[; ;pic12f1822.h: 3704: unsigned ACKTIM :1;
[; ;pic12f1822.h: 3705: };
[; ;pic12f1822.h: 3706: } SSP1CON3bits_t;
[; ;pic12f1822.h: 3707: extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
[; ;pic12f1822.h: 3750: typedef union {
[; ;pic12f1822.h: 3751: struct {
[; ;pic12f1822.h: 3752: unsigned DHEN :1;
[; ;pic12f1822.h: 3753: unsigned AHEN :1;
[; ;pic12f1822.h: 3754: unsigned SBCDE :1;
[; ;pic12f1822.h: 3755: unsigned SDAHT :1;
[; ;pic12f1822.h: 3756: unsigned BOEN :1;
[; ;pic12f1822.h: 3757: unsigned SCIE :1;
[; ;pic12f1822.h: 3758: unsigned PCIE :1;
[; ;pic12f1822.h: 3759: unsigned ACKTIM :1;
[; ;pic12f1822.h: 3760: };
[; ;pic12f1822.h: 3761: } SSPCON3bits_t;
[; ;pic12f1822.h: 3762: extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
[; ;pic12f1822.h: 3806: extern volatile unsigned char CCPR1L @ 0x291;
"3808
[; ;pic12f1822.h: 3808: asm("CCPR1L equ 0291h");
[; <" CCPR1L equ 0291h ;# ">
[; ;pic12f1822.h: 3811: typedef union {
[; ;pic12f1822.h: 3812: struct {
[; ;pic12f1822.h: 3813: unsigned CCPR1L :8;
[; ;pic12f1822.h: 3814: };
[; ;pic12f1822.h: 3815: } CCPR1Lbits_t;
[; ;pic12f1822.h: 3816: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
[; ;pic12f1822.h: 3825: extern volatile unsigned char CCPR1H @ 0x292;
"3827
[; ;pic12f1822.h: 3827: asm("CCPR1H equ 0292h");
[; <" CCPR1H equ 0292h ;# ">
[; ;pic12f1822.h: 3830: typedef union {
[; ;pic12f1822.h: 3831: struct {
[; ;pic12f1822.h: 3832: unsigned CCPR1H :8;
[; ;pic12f1822.h: 3833: };
[; ;pic12f1822.h: 3834: } CCPR1Hbits_t;
[; ;pic12f1822.h: 3835: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
[; ;pic12f1822.h: 3844: extern volatile unsigned char CCP1CON @ 0x293;
"3846
[; ;pic12f1822.h: 3846: asm("CCP1CON equ 0293h");
[; <" CCP1CON equ 0293h ;# ">
[; ;pic12f1822.h: 3849: typedef union {
[; ;pic12f1822.h: 3850: struct {
[; ;pic12f1822.h: 3851: unsigned CCP1M0 :1;
[; ;pic12f1822.h: 3852: unsigned CCP1M1 :1;
[; ;pic12f1822.h: 3853: unsigned CCP1M2 :1;
[; ;pic12f1822.h: 3854: unsigned CCP1M3 :1;
[; ;pic12f1822.h: 3855: unsigned DC1B0 :1;
[; ;pic12f1822.h: 3856: unsigned DC1B1 :1;
[; ;pic12f1822.h: 3857: unsigned P1M0 :1;
[; ;pic12f1822.h: 3858: unsigned P1M1 :1;
[; ;pic12f1822.h: 3859: };
[; ;pic12f1822.h: 3860: struct {
[; ;pic12f1822.h: 3861: unsigned CCP1M :4;
[; ;pic12f1822.h: 3862: unsigned DC1B :2;
[; ;pic12f1822.h: 3863: unsigned P1M :2;
[; ;pic12f1822.h: 3864: };
[; ;pic12f1822.h: 3865: } CCP1CONbits_t;
[; ;pic12f1822.h: 3866: extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
[; ;pic12f1822.h: 3925: extern volatile unsigned char PWM1CON @ 0x294;
"3927
[; ;pic12f1822.h: 3927: asm("PWM1CON equ 0294h");
[; <" PWM1CON equ 0294h ;# ">
[; ;pic12f1822.h: 3930: typedef union {
[; ;pic12f1822.h: 3931: struct {
[; ;pic12f1822.h: 3932: unsigned P1DC0 :1;
[; ;pic12f1822.h: 3933: unsigned P1DC1 :1;
[; ;pic12f1822.h: 3934: unsigned P1DC2 :1;
[; ;pic12f1822.h: 3935: unsigned P1DC3 :1;
[; ;pic12f1822.h: 3936: unsigned P1DC4 :1;
[; ;pic12f1822.h: 3937: unsigned P1DC5 :1;
[; ;pic12f1822.h: 3938: unsigned P1DC6 :1;
[; ;pic12f1822.h: 3939: unsigned P1RSEN :1;
[; ;pic12f1822.h: 3940: };
[; ;pic12f1822.h: 3941: struct {
[; ;pic12f1822.h: 3942: unsigned P1DC :7;
[; ;pic12f1822.h: 3943: };
[; ;pic12f1822.h: 3944: } PWM1CONbits_t;
[; ;pic12f1822.h: 3945: extern volatile PWM1CONbits_t PWM1CONbits @ 0x294;
[; ;pic12f1822.h: 3994: extern volatile unsigned char CCP1AS @ 0x295;
"3996
[; ;pic12f1822.h: 3996: asm("CCP1AS equ 0295h");
[; <" CCP1AS equ 0295h ;# ">
[; ;pic12f1822.h: 3999: extern volatile unsigned char ECCP1AS @ 0x295;
"4001
[; ;pic12f1822.h: 4001: asm("ECCP1AS equ 0295h");
[; <" ECCP1AS equ 0295h ;# ">
[; ;pic12f1822.h: 4004: typedef union {
[; ;pic12f1822.h: 4005: struct {
[; ;pic12f1822.h: 4006: unsigned PSS1BD0 :1;
[; ;pic12f1822.h: 4007: unsigned PSS1BD1 :1;
[; ;pic12f1822.h: 4008: unsigned PSS1AC0 :1;
[; ;pic12f1822.h: 4009: unsigned PSS1AC1 :1;
[; ;pic12f1822.h: 4010: unsigned CCP1AS0 :1;
[; ;pic12f1822.h: 4011: unsigned CCP1AS1 :1;
[; ;pic12f1822.h: 4012: unsigned CCP1AS2 :1;
[; ;pic12f1822.h: 4013: unsigned CCP1ASE :1;
[; ;pic12f1822.h: 4014: };
[; ;pic12f1822.h: 4015: struct {
[; ;pic12f1822.h: 4016: unsigned PSS1BD :2;
[; ;pic12f1822.h: 4017: unsigned PSS1AC :2;
[; ;pic12f1822.h: 4018: unsigned CCP1AS :3;
[; ;pic12f1822.h: 4019: };
[; ;pic12f1822.h: 4020: } CCP1ASbits_t;
[; ;pic12f1822.h: 4021: extern volatile CCP1ASbits_t CCP1ASbits @ 0x295;
[; ;pic12f1822.h: 4079: typedef union {
[; ;pic12f1822.h: 4080: struct {
[; ;pic12f1822.h: 4081: unsigned PSS1BD0 :1;
[; ;pic12f1822.h: 4082: unsigned PSS1BD1 :1;
[; ;pic12f1822.h: 4083: unsigned PSS1AC0 :1;
[; ;pic12f1822.h: 4084: unsigned PSS1AC1 :1;
[; ;pic12f1822.h: 4085: unsigned CCP1AS0 :1;
[; ;pic12f1822.h: 4086: unsigned CCP1AS1 :1;
[; ;pic12f1822.h: 4087: unsigned CCP1AS2 :1;
[; ;pic12f1822.h: 4088: unsigned CCP1ASE :1;
[; ;pic12f1822.h: 4089: };
[; ;pic12f1822.h: 4090: struct {
[; ;pic12f1822.h: 4091: unsigned PSS1BD :2;
[; ;pic12f1822.h: 4092: unsigned PSS1AC :2;
[; ;pic12f1822.h: 4093: unsigned CCP1AS :3;
[; ;pic12f1822.h: 4094: };
[; ;pic12f1822.h: 4095: } ECCP1ASbits_t;
[; ;pic12f1822.h: 4096: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0x295;
[; ;pic12f1822.h: 4155: extern volatile unsigned char PSTR1CON @ 0x296;
"4157
[; ;pic12f1822.h: 4157: asm("PSTR1CON equ 0296h");
[; <" PSTR1CON equ 0296h ;# ">
[; ;pic12f1822.h: 4160: typedef union {
[; ;pic12f1822.h: 4161: struct {
[; ;pic12f1822.h: 4162: unsigned STR1A :1;
[; ;pic12f1822.h: 4163: unsigned STR1B :1;
[; ;pic12f1822.h: 4164: unsigned STR1C :1;
[; ;pic12f1822.h: 4165: unsigned STR1D :1;
[; ;pic12f1822.h: 4166: unsigned STR1SYNC :1;
[; ;pic12f1822.h: 4167: };
[; ;pic12f1822.h: 4168: } PSTR1CONbits_t;
[; ;pic12f1822.h: 4169: extern volatile PSTR1CONbits_t PSTR1CONbits @ 0x296;
[; ;pic12f1822.h: 4198: extern volatile unsigned char IOCAP @ 0x391;
"4200
[; ;pic12f1822.h: 4200: asm("IOCAP equ 0391h");
[; <" IOCAP equ 0391h ;# ">
[; ;pic12f1822.h: 4203: typedef union {
[; ;pic12f1822.h: 4204: struct {
[; ;pic12f1822.h: 4205: unsigned IOCAP0 :1;
[; ;pic12f1822.h: 4206: unsigned IOCAP1 :1;
[; ;pic12f1822.h: 4207: unsigned IOCAP2 :1;
[; ;pic12f1822.h: 4208: unsigned IOCAP3 :1;
[; ;pic12f1822.h: 4209: unsigned IOCAP4 :1;
[; ;pic12f1822.h: 4210: unsigned IOCAP5 :1;
[; ;pic12f1822.h: 4211: };
[; ;pic12f1822.h: 4212: struct {
[; ;pic12f1822.h: 4213: unsigned IOCAP :6;
[; ;pic12f1822.h: 4214: };
[; ;pic12f1822.h: 4215: } IOCAPbits_t;
[; ;pic12f1822.h: 4216: extern volatile IOCAPbits_t IOCAPbits @ 0x391;
[; ;pic12f1822.h: 4255: extern volatile unsigned char IOCAN @ 0x392;
"4257
[; ;pic12f1822.h: 4257: asm("IOCAN equ 0392h");
[; <" IOCAN equ 0392h ;# ">
[; ;pic12f1822.h: 4260: typedef union {
[; ;pic12f1822.h: 4261: struct {
[; ;pic12f1822.h: 4262: unsigned IOCAN0 :1;
[; ;pic12f1822.h: 4263: unsigned IOCAN1 :1;
[; ;pic12f1822.h: 4264: unsigned IOCAN2 :1;
[; ;pic12f1822.h: 4265: unsigned IOCAN3 :1;
[; ;pic12f1822.h: 4266: unsigned IOCAN4 :1;
[; ;pic12f1822.h: 4267: unsigned IOCAN5 :1;
[; ;pic12f1822.h: 4268: };
[; ;pic12f1822.h: 4269: struct {
[; ;pic12f1822.h: 4270: unsigned IOCAN :6;
[; ;pic12f1822.h: 4271: };
[; ;pic12f1822.h: 4272: } IOCANbits_t;
[; ;pic12f1822.h: 4273: extern volatile IOCANbits_t IOCANbits @ 0x392;
[; ;pic12f1822.h: 4312: extern volatile unsigned char IOCAF @ 0x393;
"4314
[; ;pic12f1822.h: 4314: asm("IOCAF equ 0393h");
[; <" IOCAF equ 0393h ;# ">
[; ;pic12f1822.h: 4317: typedef union {
[; ;pic12f1822.h: 4318: struct {
[; ;pic12f1822.h: 4319: unsigned IOCAF0 :1;
[; ;pic12f1822.h: 4320: unsigned IOCAF1 :1;
[; ;pic12f1822.h: 4321: unsigned IOCAF2 :1;
[; ;pic12f1822.h: 4322: unsigned IOCAF3 :1;
[; ;pic12f1822.h: 4323: unsigned IOCAF4 :1;
[; ;pic12f1822.h: 4324: unsigned IOCAF5 :1;
[; ;pic12f1822.h: 4325: };
[; ;pic12f1822.h: 4326: struct {
[; ;pic12f1822.h: 4327: unsigned IOCAF :6;
[; ;pic12f1822.h: 4328: };
[; ;pic12f1822.h: 4329: } IOCAFbits_t;
[; ;pic12f1822.h: 4330: extern volatile IOCAFbits_t IOCAFbits @ 0x393;
[; ;pic12f1822.h: 4369: extern volatile unsigned char CLKRCON @ 0x39A;
"4371
[; ;pic12f1822.h: 4371: asm("CLKRCON equ 039Ah");
[; <" CLKRCON equ 039Ah ;# ">
[; ;pic12f1822.h: 4374: typedef union {
[; ;pic12f1822.h: 4375: struct {
[; ;pic12f1822.h: 4376: unsigned CLKRDIV0 :1;
[; ;pic12f1822.h: 4377: unsigned CLKRDIV1 :1;
[; ;pic12f1822.h: 4378: unsigned CLKRDIV2 :1;
[; ;pic12f1822.h: 4379: unsigned CLKRDC0 :1;
[; ;pic12f1822.h: 4380: unsigned CLKRDC1 :1;
[; ;pic12f1822.h: 4381: unsigned CLKRSLR :1;
[; ;pic12f1822.h: 4382: unsigned CLKROE :1;
[; ;pic12f1822.h: 4383: unsigned CLKREN :1;
[; ;pic12f1822.h: 4384: };
[; ;pic12f1822.h: 4385: struct {
[; ;pic12f1822.h: 4386: unsigned CLKRDIV :3;
[; ;pic12f1822.h: 4387: unsigned CLKRDC :2;
[; ;pic12f1822.h: 4388: };
[; ;pic12f1822.h: 4389: } CLKRCONbits_t;
[; ;pic12f1822.h: 4390: extern volatile CLKRCONbits_t CLKRCONbits @ 0x39A;
[; ;pic12f1822.h: 4444: extern volatile unsigned char MDCON @ 0x39C;
"4446
[; ;pic12f1822.h: 4446: asm("MDCON equ 039Ch");
[; <" MDCON equ 039Ch ;# ">
[; ;pic12f1822.h: 4449: typedef union {
[; ;pic12f1822.h: 4450: struct {
[; ;pic12f1822.h: 4451: unsigned MDBIT :1;
[; ;pic12f1822.h: 4452: unsigned :2;
[; ;pic12f1822.h: 4453: unsigned MDOUT :1;
[; ;pic12f1822.h: 4454: unsigned MDOPOL :1;
[; ;pic12f1822.h: 4455: unsigned MDSLR :1;
[; ;pic12f1822.h: 4456: unsigned MDOE :1;
[; ;pic12f1822.h: 4457: unsigned MDEN :1;
[; ;pic12f1822.h: 4458: };
[; ;pic12f1822.h: 4459: } MDCONbits_t;
[; ;pic12f1822.h: 4460: extern volatile MDCONbits_t MDCONbits @ 0x39C;
[; ;pic12f1822.h: 4494: extern volatile unsigned char MDSRC @ 0x39D;
"4496
[; ;pic12f1822.h: 4496: asm("MDSRC equ 039Dh");
[; <" MDSRC equ 039Dh ;# ">
[; ;pic12f1822.h: 4499: typedef union {
[; ;pic12f1822.h: 4500: struct {
[; ;pic12f1822.h: 4501: unsigned MDMS0 :1;
[; ;pic12f1822.h: 4502: unsigned MDMS1 :1;
[; ;pic12f1822.h: 4503: unsigned MDMS2 :1;
[; ;pic12f1822.h: 4504: unsigned MDMS3 :1;
[; ;pic12f1822.h: 4505: unsigned :3;
[; ;pic12f1822.h: 4506: unsigned MDMSODIS :1;
[; ;pic12f1822.h: 4507: };
[; ;pic12f1822.h: 4508: struct {
[; ;pic12f1822.h: 4509: unsigned MDMS :4;
[; ;pic12f1822.h: 4510: };
[; ;pic12f1822.h: 4511: } MDSRCbits_t;
[; ;pic12f1822.h: 4512: extern volatile MDSRCbits_t MDSRCbits @ 0x39D;
[; ;pic12f1822.h: 4546: extern volatile unsigned char MDCARL @ 0x39E;
"4548
[; ;pic12f1822.h: 4548: asm("MDCARL equ 039Eh");
[; <" MDCARL equ 039Eh ;# ">
[; ;pic12f1822.h: 4551: typedef union {
[; ;pic12f1822.h: 4552: struct {
[; ;pic12f1822.h: 4553: unsigned MDCL0 :1;
[; ;pic12f1822.h: 4554: unsigned MDCL1 :1;
[; ;pic12f1822.h: 4555: unsigned MDCL2 :1;
[; ;pic12f1822.h: 4556: unsigned MDCL3 :1;
[; ;pic12f1822.h: 4557: unsigned :1;
[; ;pic12f1822.h: 4558: unsigned MDCLSYNC :1;
[; ;pic12f1822.h: 4559: unsigned MDCLPOL :1;
[; ;pic12f1822.h: 4560: unsigned MDCLODIS :1;
[; ;pic12f1822.h: 4561: };
[; ;pic12f1822.h: 4562: struct {
[; ;pic12f1822.h: 4563: unsigned MDCL :4;
[; ;pic12f1822.h: 4564: };
[; ;pic12f1822.h: 4565: } MDCARLbits_t;
[; ;pic12f1822.h: 4566: extern volatile MDCARLbits_t MDCARLbits @ 0x39E;
[; ;pic12f1822.h: 4610: extern volatile unsigned char MDCARH @ 0x39F;
"4612
[; ;pic12f1822.h: 4612: asm("MDCARH equ 039Fh");
[; <" MDCARH equ 039Fh ;# ">
[; ;pic12f1822.h: 4615: typedef union {
[; ;pic12f1822.h: 4616: struct {
[; ;pic12f1822.h: 4617: unsigned MDCH0 :1;
[; ;pic12f1822.h: 4618: unsigned MDCH1 :1;
[; ;pic12f1822.h: 4619: unsigned MDCH2 :1;
[; ;pic12f1822.h: 4620: unsigned MDCH3 :1;
[; ;pic12f1822.h: 4621: unsigned :1;
[; ;pic12f1822.h: 4622: unsigned MDCHSYNC :1;
[; ;pic12f1822.h: 4623: unsigned MDCHPOL :1;
[; ;pic12f1822.h: 4624: unsigned MDCHODIS :1;
[; ;pic12f1822.h: 4625: };
[; ;pic12f1822.h: 4626: struct {
[; ;pic12f1822.h: 4627: unsigned MDCH :4;
[; ;pic12f1822.h: 4628: };
[; ;pic12f1822.h: 4629: } MDCARHbits_t;
[; ;pic12f1822.h: 4630: extern volatile MDCARHbits_t MDCARHbits @ 0x39F;
[; ;pic12f1822.h: 4674: extern volatile unsigned char STATUS_SHAD @ 0xFE4;
"4676
[; ;pic12f1822.h: 4676: asm("STATUS_SHAD equ 0FE4h");
[; <" STATUS_SHAD equ 0FE4h ;# ">
[; ;pic12f1822.h: 4679: typedef union {
[; ;pic12f1822.h: 4680: struct {
[; ;pic12f1822.h: 4681: unsigned C_SHAD :1;
[; ;pic12f1822.h: 4682: unsigned DC_SHAD :1;
[; ;pic12f1822.h: 4683: unsigned Z_SHAD :1;
[; ;pic12f1822.h: 4684: };
[; ;pic12f1822.h: 4685: } STATUS_SHADbits_t;
[; ;pic12f1822.h: 4686: extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
[; ;pic12f1822.h: 4705: extern volatile unsigned char WREG_SHAD @ 0xFE5;
"4707
[; ;pic12f1822.h: 4707: asm("WREG_SHAD equ 0FE5h");
[; <" WREG_SHAD equ 0FE5h ;# ">
[; ;pic12f1822.h: 4710: typedef union {
[; ;pic12f1822.h: 4711: struct {
[; ;pic12f1822.h: 4712: unsigned WREG_SHAD :8;
[; ;pic12f1822.h: 4713: };
[; ;pic12f1822.h: 4714: } WREG_SHADbits_t;
[; ;pic12f1822.h: 4715: extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
[; ;pic12f1822.h: 4724: extern volatile unsigned char BSR_SHAD @ 0xFE6;
"4726
[; ;pic12f1822.h: 4726: asm("BSR_SHAD equ 0FE6h");
[; <" BSR_SHAD equ 0FE6h ;# ">
[; ;pic12f1822.h: 4729: typedef union {
[; ;pic12f1822.h: 4730: struct {
[; ;pic12f1822.h: 4731: unsigned BSR_SHAD :5;
[; ;pic12f1822.h: 4732: };
[; ;pic12f1822.h: 4733: } BSR_SHADbits_t;
[; ;pic12f1822.h: 4734: extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
[; ;pic12f1822.h: 4743: extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
"4745
[; ;pic12f1822.h: 4745: asm("PCLATH_SHAD equ 0FE7h");
[; <" PCLATH_SHAD equ 0FE7h ;# ">
[; ;pic12f1822.h: 4748: typedef union {
[; ;pic12f1822.h: 4749: struct {
[; ;pic12f1822.h: 4750: unsigned PCLATH_SHAD :7;
[; ;pic12f1822.h: 4751: };
[; ;pic12f1822.h: 4752: } PCLATH_SHADbits_t;
[; ;pic12f1822.h: 4753: extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
[; ;pic12f1822.h: 4762: extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
"4764
[; ;pic12f1822.h: 4764: asm("FSR0L_SHAD equ 0FE8h");
[; <" FSR0L_SHAD equ 0FE8h ;# ">
[; ;pic12f1822.h: 4767: typedef union {
[; ;pic12f1822.h: 4768: struct {
[; ;pic12f1822.h: 4769: unsigned FSR0L_SHAD :8;
[; ;pic12f1822.h: 4770: };
[; ;pic12f1822.h: 4771: } FSR0L_SHADbits_t;
[; ;pic12f1822.h: 4772: extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
[; ;pic12f1822.h: 4781: extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
"4783
[; ;pic12f1822.h: 4783: asm("FSR0H_SHAD equ 0FE9h");
[; <" FSR0H_SHAD equ 0FE9h ;# ">
[; ;pic12f1822.h: 4786: typedef union {
[; ;pic12f1822.h: 4787: struct {
[; ;pic12f1822.h: 4788: unsigned FSR0H_SHAD :8;
[; ;pic12f1822.h: 4789: };
[; ;pic12f1822.h: 4790: } FSR0H_SHADbits_t;
[; ;pic12f1822.h: 4791: extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
[; ;pic12f1822.h: 4800: extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
"4802
[; ;pic12f1822.h: 4802: asm("FSR1L_SHAD equ 0FEAh");
[; <" FSR1L_SHAD equ 0FEAh ;# ">
[; ;pic12f1822.h: 4805: typedef union {
[; ;pic12f1822.h: 4806: struct {
[; ;pic12f1822.h: 4807: unsigned FSR1L_SHAD :8;
[; ;pic12f1822.h: 4808: };
[; ;pic12f1822.h: 4809: } FSR1L_SHADbits_t;
[; ;pic12f1822.h: 4810: extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
[; ;pic12f1822.h: 4819: extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
"4821
[; ;pic12f1822.h: 4821: asm("FSR1H_SHAD equ 0FEBh");
[; <" FSR1H_SHAD equ 0FEBh ;# ">
[; ;pic12f1822.h: 4824: typedef union {
[; ;pic12f1822.h: 4825: struct {
[; ;pic12f1822.h: 4826: unsigned FSR1H_SHAD :8;
[; ;pic12f1822.h: 4827: };
[; ;pic12f1822.h: 4828: } FSR1H_SHADbits_t;
[; ;pic12f1822.h: 4829: extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
[; ;pic12f1822.h: 4838: extern volatile unsigned char STKPTR @ 0xFED;
"4840
[; ;pic12f1822.h: 4840: asm("STKPTR equ 0FEDh");
[; <" STKPTR equ 0FEDh ;# ">
[; ;pic12f1822.h: 4843: typedef union {
[; ;pic12f1822.h: 4844: struct {
[; ;pic12f1822.h: 4845: unsigned STKPTR :5;
[; ;pic12f1822.h: 4846: };
[; ;pic12f1822.h: 4847: } STKPTRbits_t;
[; ;pic12f1822.h: 4848: extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
[; ;pic12f1822.h: 4857: extern volatile unsigned char TOSL @ 0xFEE;
"4859
[; ;pic12f1822.h: 4859: asm("TOSL equ 0FEEh");
[; <" TOSL equ 0FEEh ;# ">
[; ;pic12f1822.h: 4862: typedef union {
[; ;pic12f1822.h: 4863: struct {
[; ;pic12f1822.h: 4864: unsigned TOSL :8;
[; ;pic12f1822.h: 4865: };
[; ;pic12f1822.h: 4866: } TOSLbits_t;
[; ;pic12f1822.h: 4867: extern volatile TOSLbits_t TOSLbits @ 0xFEE;
[; ;pic12f1822.h: 4876: extern volatile unsigned char TOSH @ 0xFEF;
"4878
[; ;pic12f1822.h: 4878: asm("TOSH equ 0FEFh");
[; <" TOSH equ 0FEFh ;# ">
[; ;pic12f1822.h: 4881: typedef union {
[; ;pic12f1822.h: 4882: struct {
[; ;pic12f1822.h: 4883: unsigned TOSH :7;
[; ;pic12f1822.h: 4884: };
[; ;pic12f1822.h: 4885: } TOSHbits_t;
[; ;pic12f1822.h: 4886: extern volatile TOSHbits_t TOSHbits @ 0xFEF;
[; ;pic12f1822.h: 4901: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
[; ;pic12f1822.h: 4903: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
[; ;pic12f1822.h: 4905: extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
[; ;pic12f1822.h: 4907: extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
[; ;pic12f1822.h: 4909: extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
[; ;pic12f1822.h: 4911: extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
[; ;pic12f1822.h: 4913: extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 4;
[; ;pic12f1822.h: 4915: extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 5;
[; ;pic12f1822.h: 4917: extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
[; ;pic12f1822.h: 4919: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
[; ;pic12f1822.h: 4921: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
[; ;pic12f1822.h: 4923: extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
[; ;pic12f1822.h: 4925: extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
[; ;pic12f1822.h: 4927: extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic12f1822.h: 4929: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
[; ;pic12f1822.h: 4931: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
[; ;pic12f1822.h: 4933: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
[; ;pic12f1822.h: 4935: extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
[; ;pic12f1822.h: 4937: extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
[; ;pic12f1822.h: 4939: extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
[; ;pic12f1822.h: 4941: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic12f1822.h: 4943: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic12f1822.h: 4945: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 4947: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 4949: extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
[; ;pic12f1822.h: 4951: extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
[; ;pic12f1822.h: 4953: extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
[; ;pic12f1822.h: 4955: extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
[; ;pic12f1822.h: 4957: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
[; ;pic12f1822.h: 4959: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
[; ;pic12f1822.h: 4961: extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
[; ;pic12f1822.h: 4963: extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
[; ;pic12f1822.h: 4965: extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
[; ;pic12f1822.h: 4967: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
[; ;pic12f1822.h: 4969: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
[; ;pic12f1822.h: 4971: extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
[; ;pic12f1822.h: 4973: extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
[; ;pic12f1822.h: 4975: extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
[; ;pic12f1822.h: 4977: extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
[; ;pic12f1822.h: 4979: extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
[; ;pic12f1822.h: 4981: extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
[; ;pic12f1822.h: 4983: extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
[; ;pic12f1822.h: 4985: extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
[; ;pic12f1822.h: 4987: extern volatile __bit C1IN0N @ (((unsigned) &PORTA)*8) + 1;
[; ;pic12f1822.h: 4989: extern volatile __bit C1IN1N @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 4991: extern volatile __bit C1INP @ (((unsigned) &PORTA)*8) + 0;
[; ;pic12f1822.h: 4993: extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
[; ;pic12f1822.h: 4995: extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
[; ;pic12f1822.h: 4997: extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
[; ;pic12f1822.h: 4999: extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
[; ;pic12f1822.h: 5001: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
[; ;pic12f1822.h: 5003: extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
[; ;pic12f1822.h: 5005: extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
[; ;pic12f1822.h: 5007: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
[; ;pic12f1822.h: 5009: extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
[; ;pic12f1822.h: 5011: extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
[; ;pic12f1822.h: 5013: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
[; ;pic12f1822.h: 5015: extern volatile __bit CCP1AS0 @ (((unsigned) &CCP1AS)*8) + 4;
[; ;pic12f1822.h: 5017: extern volatile __bit CCP1AS1 @ (((unsigned) &CCP1AS)*8) + 5;
[; ;pic12f1822.h: 5019: extern volatile __bit CCP1AS2 @ (((unsigned) &CCP1AS)*8) + 6;
[; ;pic12f1822.h: 5021: extern volatile __bit CCP1ASE @ (((unsigned) &CCP1AS)*8) + 7;
[; ;pic12f1822.h: 5023: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
[; ;pic12f1822.h: 5025: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
[; ;pic12f1822.h: 5027: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
[; ;pic12f1822.h: 5029: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
[; ;pic12f1822.h: 5031: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
[; ;pic12f1822.h: 5033: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
[; ;pic12f1822.h: 5035: extern volatile __bit CCP1SEL @ (((unsigned) &APFCON)*8) + 0;
[; ;pic12f1822.h: 5037: extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
[; ;pic12f1822.h: 5039: extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
[; ;pic12f1822.h: 5041: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;
[; ;pic12f1822.h: 5043: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic12f1822.h: 5045: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
[; ;pic12f1822.h: 5047: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
[; ;pic12f1822.h: 5049: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
[; ;pic12f1822.h: 5051: extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
[; ;pic12f1822.h: 5053: extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
[; ;pic12f1822.h: 5055: extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
[; ;pic12f1822.h: 5057: extern volatile __bit CLKIN @ (((unsigned) &PORTA)*8) + 5;
[; ;pic12f1822.h: 5059: extern volatile __bit CLKOUT @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 5061: extern volatile __bit CLKR @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 5063: extern volatile __bit CLKRDC0 @ (((unsigned) &CLKRCON)*8) + 3;
[; ;pic12f1822.h: 5065: extern volatile __bit CLKRDC1 @ (((unsigned) &CLKRCON)*8) + 4;
[; ;pic12f1822.h: 5067: extern volatile __bit CLKRDIV0 @ (((unsigned) &CLKRCON)*8) + 0;
[; ;pic12f1822.h: 5069: extern volatile __bit CLKRDIV1 @ (((unsigned) &CLKRCON)*8) + 1;
[; ;pic12f1822.h: 5071: extern volatile __bit CLKRDIV2 @ (((unsigned) &CLKRCON)*8) + 2;
[; ;pic12f1822.h: 5073: extern volatile __bit CLKREN @ (((unsigned) &CLKRCON)*8) + 7;
[; ;pic12f1822.h: 5075: extern volatile __bit CLKROE @ (((unsigned) &CLKRCON)*8) + 6;
[; ;pic12f1822.h: 5077: extern volatile __bit CLKRSLR @ (((unsigned) &CLKRCON)*8) + 5;
[; ;pic12f1822.h: 5079: extern volatile __bit CPS0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic12f1822.h: 5081: extern volatile __bit CPS1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic12f1822.h: 5083: extern volatile __bit CPS2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 5085: extern volatile __bit CPS3 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 5087: extern volatile __bit CPSCH0 @ (((unsigned) &CPSCON1)*8) + 0;
[; ;pic12f1822.h: 5089: extern volatile __bit CPSCH1 @ (((unsigned) &CPSCON1)*8) + 1;
[; ;pic12f1822.h: 5091: extern volatile __bit CPSON @ (((unsigned) &CPSCON0)*8) + 7;
[; ;pic12f1822.h: 5093: extern volatile __bit CPSOUT @ (((unsigned) &CPSCON0)*8) + 1;
[; ;pic12f1822.h: 5095: extern volatile __bit CPSRM @ (((unsigned) &CPSCON0)*8) + 6;
[; ;pic12f1822.h: 5097: extern volatile __bit CPSRNG0 @ (((unsigned) &CPSCON0)*8) + 2;
[; ;pic12f1822.h: 5099: extern volatile __bit CPSRNG1 @ (((unsigned) &CPSCON0)*8) + 3;
[; ;pic12f1822.h: 5101: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
[; ;pic12f1822.h: 5103: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
[; ;pic12f1822.h: 5105: extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
[; ;pic12f1822.h: 5107: extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
[; ;pic12f1822.h: 5109: extern volatile __bit DACLPS @ (((unsigned) &DACCON0)*8) + 6;
[; ;pic12f1822.h: 5111: extern volatile __bit DACOE @ (((unsigned) &DACCON0)*8) + 5;
[; ;pic12f1822.h: 5113: extern volatile __bit DACOUT @ (((unsigned) &PORTA)*8) + 0;
[; ;pic12f1822.h: 5115: extern volatile __bit DACPSS0 @ (((unsigned) &DACCON0)*8) + 2;
[; ;pic12f1822.h: 5117: extern volatile __bit DACPSS1 @ (((unsigned) &DACCON0)*8) + 3;
[; ;pic12f1822.h: 5119: extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
[; ;pic12f1822.h: 5121: extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
[; ;pic12f1822.h: 5123: extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
[; ;pic12f1822.h: 5125: extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
[; ;pic12f1822.h: 5127: extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
[; ;pic12f1822.h: 5129: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
[; ;pic12f1822.h: 5131: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic12f1822.h: 5133: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic12f1822.h: 5135: extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
[; ;pic12f1822.h: 5137: extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
[; ;pic12f1822.h: 5139: extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic12f1822.h: 5141: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;
[; ;pic12f1822.h: 5143: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;
[; ;pic12f1822.h: 5145: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
[; ;pic12f1822.h: 5147: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
[; ;pic12f1822.h: 5149: extern volatile __bit FLT0 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 5151: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
[; ;pic12f1822.h: 5153: extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
[; ;pic12f1822.h: 5155: extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
[; ;pic12f1822.h: 5157: extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
[; ;pic12f1822.h: 5159: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
[; ;pic12f1822.h: 5161: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic12f1822.h: 5163: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic12f1822.h: 5165: extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
[; ;pic12f1822.h: 5167: extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
[; ;pic12f1822.h: 5169: extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
[; ;pic12f1822.h: 5171: extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
[; ;pic12f1822.h: 5173: extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
[; ;pic12f1822.h: 5175: extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
[; ;pic12f1822.h: 5177: extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
[; ;pic12f1822.h: 5179: extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
[; ;pic12f1822.h: 5181: extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
[; ;pic12f1822.h: 5183: extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
[; ;pic12f1822.h: 5185: extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
[; ;pic12f1822.h: 5187: extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
[; ;pic12f1822.h: 5189: extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
[; ;pic12f1822.h: 5191: extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
[; ;pic12f1822.h: 5193: extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
[; ;pic12f1822.h: 5195: extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
[; ;pic12f1822.h: 5197: extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
[; ;pic12f1822.h: 5199: extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
[; ;pic12f1822.h: 5201: extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
[; ;pic12f1822.h: 5203: extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
[; ;pic12f1822.h: 5205: extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
[; ;pic12f1822.h: 5207: extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
[; ;pic12f1822.h: 5209: extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
[; ;pic12f1822.h: 5211: extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
[; ;pic12f1822.h: 5213: extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
[; ;pic12f1822.h: 5215: extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
[; ;pic12f1822.h: 5217: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
[; ;pic12f1822.h: 5219: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
[; ;pic12f1822.h: 5221: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
[; ;pic12f1822.h: 5223: extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
[; ;pic12f1822.h: 5225: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic12f1822.h: 5227: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic12f1822.h: 5229: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic12f1822.h: 5231: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
[; ;pic12f1822.h: 5233: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic12f1822.h: 5235: extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
[; ;pic12f1822.h: 5237: extern volatile __bit LWLO @ (((unsigned) &EECON1)*8) + 5;
[; ;pic12f1822.h: 5239: extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
[; ;pic12f1822.h: 5241: extern volatile __bit MDBIT @ (((unsigned) &MDCON)*8) + 0;
[; ;pic12f1822.h: 5243: extern volatile __bit MDCH0 @ (((unsigned) &MDCARH)*8) + 0;
[; ;pic12f1822.h: 5245: extern volatile __bit MDCH1 @ (((unsigned) &MDCARH)*8) + 1;
[; ;pic12f1822.h: 5247: extern volatile __bit MDCH2 @ (((unsigned) &MDCARH)*8) + 2;
[; ;pic12f1822.h: 5249: extern volatile __bit MDCH3 @ (((unsigned) &MDCARH)*8) + 3;
[; ;pic12f1822.h: 5251: extern volatile __bit MDCHODIS @ (((unsigned) &MDCARH)*8) + 7;
[; ;pic12f1822.h: 5253: extern volatile __bit MDCHPOL @ (((unsigned) &MDCARH)*8) + 6;
[; ;pic12f1822.h: 5255: extern volatile __bit MDCHSYNC @ (((unsigned) &MDCARH)*8) + 5;
[; ;pic12f1822.h: 5257: extern volatile __bit MDCIN1 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 5259: extern volatile __bit MDCIN2 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 5261: extern volatile __bit MDCL0 @ (((unsigned) &MDCARL)*8) + 0;
[; ;pic12f1822.h: 5263: extern volatile __bit MDCL1 @ (((unsigned) &MDCARL)*8) + 1;
[; ;pic12f1822.h: 5265: extern volatile __bit MDCL2 @ (((unsigned) &MDCARL)*8) + 2;
[; ;pic12f1822.h: 5267: extern volatile __bit MDCL3 @ (((unsigned) &MDCARL)*8) + 3;
[; ;pic12f1822.h: 5269: extern volatile __bit MDCLODIS @ (((unsigned) &MDCARL)*8) + 7;
[; ;pic12f1822.h: 5271: extern volatile __bit MDCLPOL @ (((unsigned) &MDCARL)*8) + 6;
[; ;pic12f1822.h: 5273: extern volatile __bit MDCLSYNC @ (((unsigned) &MDCARL)*8) + 5;
[; ;pic12f1822.h: 5275: extern volatile __bit MDEN @ (((unsigned) &MDCON)*8) + 7;
[; ;pic12f1822.h: 5277: extern volatile __bit MDMIN @ (((unsigned) &PORTA)*8) + 1;
[; ;pic12f1822.h: 5279: extern volatile __bit MDMS0 @ (((unsigned) &MDSRC)*8) + 0;
[; ;pic12f1822.h: 5281: extern volatile __bit MDMS1 @ (((unsigned) &MDSRC)*8) + 1;
[; ;pic12f1822.h: 5283: extern volatile __bit MDMS2 @ (((unsigned) &MDSRC)*8) + 2;
[; ;pic12f1822.h: 5285: extern volatile __bit MDMS3 @ (((unsigned) &MDSRC)*8) + 3;
[; ;pic12f1822.h: 5287: extern volatile __bit MDMSODIS @ (((unsigned) &MDSRC)*8) + 7;
[; ;pic12f1822.h: 5289: extern volatile __bit MDOE @ (((unsigned) &MDCON)*8) + 6;
[; ;pic12f1822.h: 5291: extern volatile __bit MDOPOL @ (((unsigned) &MDCON)*8) + 4;
[; ;pic12f1822.h: 5293: extern volatile __bit MDSLR @ (((unsigned) &MDCON)*8) + 5;
[; ;pic12f1822.h: 5295: extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
[; ;pic12f1822.h: 5297: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
[; ;pic12f1822.h: 5299: extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic12f1822.h: 5301: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 5303: extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
[; ;pic12f1822.h: 5305: extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
[; ;pic12f1822.h: 5307: extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
[; ;pic12f1822.h: 5309: extern volatile __bit P1BSEL @ (((unsigned) &APFCON)*8) + 1;
[; ;pic12f1822.h: 5311: extern volatile __bit P1DC0 @ (((unsigned) &PWM1CON)*8) + 0;
[; ;pic12f1822.h: 5313: extern volatile __bit P1DC1 @ (((unsigned) &PWM1CON)*8) + 1;
[; ;pic12f1822.h: 5315: extern volatile __bit P1DC2 @ (((unsigned) &PWM1CON)*8) + 2;
[; ;pic12f1822.h: 5317: extern volatile __bit P1DC3 @ (((unsigned) &PWM1CON)*8) + 3;
[; ;pic12f1822.h: 5319: extern volatile __bit P1DC4 @ (((unsigned) &PWM1CON)*8) + 4;
[; ;pic12f1822.h: 5321: extern volatile __bit P1DC5 @ (((unsigned) &PWM1CON)*8) + 5;
[; ;pic12f1822.h: 5323: extern volatile __bit P1DC6 @ (((unsigned) &PWM1CON)*8) + 6;
[; ;pic12f1822.h: 5325: extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
[; ;pic12f1822.h: 5327: extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
[; ;pic12f1822.h: 5329: extern volatile __bit P1RSEN @ (((unsigned) &PWM1CON)*8) + 7;
[; ;pic12f1822.h: 5331: extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
[; ;pic12f1822.h: 5333: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
[; ;pic12f1822.h: 5335: extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
[; ;pic12f1822.h: 5337: extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
[; ;pic12f1822.h: 5339: extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
[; ;pic12f1822.h: 5341: extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
[; ;pic12f1822.h: 5343: extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
[; ;pic12f1822.h: 5345: extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
[; ;pic12f1822.h: 5347: extern volatile __bit PSS1AC0 @ (((unsigned) &CCP1AS)*8) + 2;
[; ;pic12f1822.h: 5349: extern volatile __bit PSS1AC1 @ (((unsigned) &CCP1AS)*8) + 3;
[; ;pic12f1822.h: 5351: extern volatile __bit PSS1BD0 @ (((unsigned) &CCP1AS)*8) + 0;
[; ;pic12f1822.h: 5353: extern volatile __bit PSS1BD1 @ (((unsigned) &CCP1AS)*8) + 1;
[; ;pic12f1822.h: 5355: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic12f1822.h: 5357: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic12f1822.h: 5359: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 5361: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic12f1822.h: 5363: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 5365: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic12f1822.h: 5367: extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
[; ;pic12f1822.h: 5369: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
[; ;pic12f1822.h: 5371: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic12f1822.h: 5373: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic12f1822.h: 5375: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;
[; ;pic12f1822.h: 5377: extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
[; ;pic12f1822.h: 5379: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
[; ;pic12f1822.h: 5381: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
[; ;pic12f1822.h: 5383: extern volatile __bit RXDTSEL @ (((unsigned) &APFCON)*8) + 7;
[; ;pic12f1822.h: 5385: extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic12f1822.h: 5387: extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
[; ;pic12f1822.h: 5389: extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
[; ;pic12f1822.h: 5391: extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
[; ;pic12f1822.h: 5393: extern volatile __bit SCK @ (((unsigned) &PORTA)*8) + 1;
[; ;pic12f1822.h: 5395: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
[; ;pic12f1822.h: 5397: extern volatile __bit SCL @ (((unsigned) &PORTA)*8) + 1;
[; ;pic12f1822.h: 5399: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
[; ;pic12f1822.h: 5401: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
[; ;pic12f1822.h: 5403: extern volatile __bit SDA @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 5405: extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
[; ;pic12f1822.h: 5407: extern volatile __bit SDI @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 5409: extern volatile __bit SDO1SEL @ (((unsigned) &APFCON)*8) + 6;
[; ;pic12f1822.h: 5411: extern volatile __bit SDOSEL @ (((unsigned) &APFCON)*8) + 6;
[; ;pic12f1822.h: 5413: extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
[; ;pic12f1822.h: 5415: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
[; ;pic12f1822.h: 5417: extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
[; ;pic12f1822.h: 5419: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
[; ;pic12f1822.h: 5421: extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
[; ;pic12f1822.h: 5423: extern volatile __bit SRCLK0 @ (((unsigned) &SRCON0)*8) + 4;
[; ;pic12f1822.h: 5425: extern volatile __bit SRCLK1 @ (((unsigned) &SRCON0)*8) + 5;
[; ;pic12f1822.h: 5427: extern volatile __bit SRCLK2 @ (((unsigned) &SRCON0)*8) + 6;
[; ;pic12f1822.h: 5429: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
[; ;pic12f1822.h: 5431: extern volatile __bit SRI @ (((unsigned) &PORTA)*8) + 1;
[; ;pic12f1822.h: 5433: extern volatile __bit SRLEN @ (((unsigned) &SRCON0)*8) + 7;
[; ;pic12f1822.h: 5435: extern volatile __bit SRNQ @ (((unsigned) &PORTA)*8) + 5;
[; ;pic12f1822.h: 5437: extern volatile __bit SRNQEN @ (((unsigned) &SRCON0)*8) + 2;
[; ;pic12f1822.h: 5439: extern volatile __bit SRPR @ (((unsigned) &SRCON0)*8) + 0;
[; ;pic12f1822.h: 5441: extern volatile __bit SRPS @ (((unsigned) &SRCON0)*8) + 1;
[; ;pic12f1822.h: 5443: extern volatile __bit SRQ @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 5445: extern volatile __bit SRQEN @ (((unsigned) &SRCON0)*8) + 3;
[; ;pic12f1822.h: 5447: extern volatile __bit SRRC1E @ (((unsigned) &SRCON1)*8) + 0;
[; ;pic12f1822.h: 5449: extern volatile __bit SRRCKE @ (((unsigned) &SRCON1)*8) + 2;
[; ;pic12f1822.h: 5451: extern volatile __bit SRRPE @ (((unsigned) &SRCON1)*8) + 3;
[; ;pic12f1822.h: 5453: extern volatile __bit SRSC1E @ (((unsigned) &SRCON1)*8) + 4;
[; ;pic12f1822.h: 5455: extern volatile __bit SRSCKE @ (((unsigned) &SRCON1)*8) + 6;
[; ;pic12f1822.h: 5457: extern volatile __bit SRSPE @ (((unsigned) &SRCON1)*8) + 7;
[; ;pic12f1822.h: 5459: extern volatile __bit SS1SEL @ (((unsigned) &APFCON)*8) + 5;
[; ;pic12f1822.h: 5461: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
[; ;pic12f1822.h: 5463: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
[; ;pic12f1822.h: 5465: extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
[; ;pic12f1822.h: 5467: extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
[; ;pic12f1822.h: 5469: extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
[; ;pic12f1822.h: 5471: extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
[; ;pic12f1822.h: 5473: extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
[; ;pic12f1822.h: 5475: extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
[; ;pic12f1822.h: 5477: extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 5;
[; ;pic12f1822.h: 5479: extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
[; ;pic12f1822.h: 5481: extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
[; ;pic12f1822.h: 5483: extern volatile __bit STR1A @ (((unsigned) &PSTR1CON)*8) + 0;
[; ;pic12f1822.h: 5485: extern volatile __bit STR1B @ (((unsigned) &PSTR1CON)*8) + 1;
[; ;pic12f1822.h: 5487: extern volatile __bit STR1C @ (((unsigned) &PSTR1CON)*8) + 2;
[; ;pic12f1822.h: 5489: extern volatile __bit STR1D @ (((unsigned) &PSTR1CON)*8) + 3;
[; ;pic12f1822.h: 5491: extern volatile __bit STR1SYNC @ (((unsigned) &PSTR1CON)*8) + 4;
[; ;pic12f1822.h: 5493: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic12f1822.h: 5495: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
[; ;pic12f1822.h: 5497: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 2;
[; ;pic12f1822.h: 5499: extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
[; ;pic12f1822.h: 5501: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic12f1822.h: 5503: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic12f1822.h: 5505: extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
[; ;pic12f1822.h: 5507: extern volatile __bit T0XCS @ (((unsigned) &CPSCON0)*8) + 0;
[; ;pic12f1822.h: 5509: extern volatile __bit T1CKI @ (((unsigned) &PORTA)*8) + 5;
[; ;pic12f1822.h: 5511: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
[; ;pic12f1822.h: 5513: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
[; ;pic12f1822.h: 5515: extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic12f1822.h: 5517: extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic12f1822.h: 5519: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
[; ;pic12f1822.h: 5521: extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
[; ;pic12f1822.h: 5523: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
[; ;pic12f1822.h: 5525: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
[; ;pic12f1822.h: 5527: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
[; ;pic12f1822.h: 5529: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
[; ;pic12f1822.h: 5531: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
[; ;pic12f1822.h: 5533: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic12f1822.h: 5535: extern volatile __bit T1OSCR @ (((unsigned) &OSCSTAT)*8) + 7;
[; ;pic12f1822.h: 5537: extern volatile __bit T1OSI @ (((unsigned) &PORTA)*8) + 5;
[; ;pic12f1822.h: 5539: extern volatile __bit T1OSO @ (((unsigned) &PORTA)*8) + 4;
[; ;pic12f1822.h: 5541: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
[; ;pic12f1822.h: 5543: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
[; ;pic12f1822.h: 5545: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
[; ;pic12f1822.h: 5547: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
[; ;pic12f1822.h: 5549: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
[; ;pic12f1822.h: 5551: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
[; ;pic12f1822.h: 5553: extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
[; ;pic12f1822.h: 5555: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic12f1822.h: 5557: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic12f1822.h: 5559: extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
[; ;pic12f1822.h: 5561: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
[; ;pic12f1822.h: 5563: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic12f1822.h: 5565: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
[; ;pic12f1822.h: 5567: extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
[; ;pic12f1822.h: 5569: extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
[; ;pic12f1822.h: 5571: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
[; ;pic12f1822.h: 5573: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
[; ;pic12f1822.h: 5575: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
[; ;pic12f1822.h: 5577: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
[; ;pic12f1822.h: 5579: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
[; ;pic12f1822.h: 5581: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
[; ;pic12f1822.h: 5583: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
[; ;pic12f1822.h: 5585: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
[; ;pic12f1822.h: 5587: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
[; ;pic12f1822.h: 5589: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
[; ;pic12f1822.h: 5591: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
[; ;pic12f1822.h: 5593: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
[; ;pic12f1822.h: 5595: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
[; ;pic12f1822.h: 5597: extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
[; ;pic12f1822.h: 5599: extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
[; ;pic12f1822.h: 5601: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
[; ;pic12f1822.h: 5603: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
[; ;pic12f1822.h: 5605: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
[; ;pic12f1822.h: 5607: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
[; ;pic12f1822.h: 5609: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
[; ;pic12f1822.h: 5611: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
[; ;pic12f1822.h: 5613: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic12f1822.h: 5615: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
[; ;pic12f1822.h: 5617: extern volatile __bit TXCKSEL @ (((unsigned) &APFCON)*8) + 2;
[; ;pic12f1822.h: 5619: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
[; ;pic12f1822.h: 5621: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic12f1822.h: 5623: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic12f1822.h: 5625: extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
[; ;pic12f1822.h: 5627: extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
[; ;pic12f1822.h: 5629: extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
[; ;pic12f1822.h: 5631: extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
[; ;pic12f1822.h: 5633: extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
[; ;pic12f1822.h: 5635: extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
[; ;pic12f1822.h: 5637: extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
[; ;pic12f1822.h: 5639: extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
[; ;pic12f1822.h: 5641: extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
[; ;pic12f1822.h: 5643: extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
[; ;pic12f1822.h: 5645: extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
[; ;pic12f1822.h: 5647: extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
[; ;pic12f1822.h: 5649: extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
[; ;pic12f1822.h: 5651: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
[; ;pic12f1822.h: 5653: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
[; ;pic12f1822.h: 5655: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
[; ;pic12f1822.h: 5657: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
[; ;pic12f1822.h: 5659: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
[; ;pic12f1822.h: 5661: extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
[; ;pic12f1822.h: 5663: extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
[; ;pic12f1822.h: 5665: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic12f1822.h: 5667: extern volatile __bit nMCLR @ (((unsigned) &PORTA)*8) + 3;
[; ;pic12f1822.h: 5669: extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
[; ;pic12f1822.h: 5671: extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
[; ;pic12f1822.h: 5673: extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
[; ;pic12f1822.h: 5675: extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
[; ;pic12f1822.h: 5677: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic12f1822.h: 5679: extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
[; ;pic12f1822.h: 5681: extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
[; ;pic.h: 28: extern void _nop(void);
[; ;pic.h: 77: extern unsigned int flash_read(unsigned short addr);
[; ;eeprom_routines.h: 41: extern void eeprom_write(unsigned char addr, unsigned char value);
[; ;eeprom_routines.h: 42: extern unsigned char eeprom_read(unsigned char addr);
[; ;eeprom_routines.h: 43: extern void eecpymem(volatile unsigned char *to, __eeprom unsigned char *from, unsigned char size);
[; ;eeprom_routines.h: 44: extern void memcpyee(__eeprom unsigned char *to, const unsigned char *from, unsigned char size);
[; ;pic.h: 151: extern void _delay(unsigned long);
[; ;stdint.h: 13: typedef signed char int8_t;
[; ;stdint.h: 20: typedef signed int int16_t;
[; ;stdint.h: 28: typedef signed short long int int24_t;
[; ;stdint.h: 36: typedef signed long int int32_t;
[; ;stdint.h: 43: typedef unsigned char uint8_t;
[; ;stdint.h: 49: typedef unsigned int uint16_t;
[; ;stdint.h: 56: typedef unsigned short long int uint24_t;
[; ;stdint.h: 63: typedef unsigned long int uint32_t;
[; ;stdint.h: 71: typedef signed char int_least8_t;
[; ;stdint.h: 78: typedef signed int int_least16_t;
[; ;stdint.h: 90: typedef signed short long int int_least24_t;
[; ;stdint.h: 98: typedef signed long int int_least32_t;
[; ;stdint.h: 105: typedef unsigned char uint_least8_t;
[; ;stdint.h: 111: typedef unsigned int uint_least16_t;
[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;
[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;
[; ;stdint.h: 137: typedef signed char int_fast8_t;
[; ;stdint.h: 144: typedef signed int int_fast16_t;
[; ;stdint.h: 156: typedef signed short long int int_fast24_t;
[; ;stdint.h: 164: typedef signed long int int_fast32_t;
[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;
[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;
[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;
[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;
[; ;stdint.h: 200: typedef int32_t intmax_t;
[; ;stdint.h: 205: typedef uint32_t uintmax_t;
[; ;stdint.h: 210: typedef int16_t intptr_t;
[; ;stdint.h: 215: typedef uint16_t uintptr_t;
[; ;stdbool.h: 12: typedef unsigned char bool;
[; ;user.h: 13: void InitApp(void);
[; ;user.h: 14: bool msg_empty(void);
[; ;user.h: 15: void msg_write(const char *msg);
[; ;user.h: 16: void msg_writebyte(const char msg);
[; ;user.h: 17: void msg_sendnext(void);
[; ;user.h: 18: void tohex(char val[3], char i);
[; ;user.h: 19: void msg_recvnext(void);
[; ;user.h: 20: bool msg_recvready(void);
[; ;user.h: 21: char msg_recv(void);
[; ;user.h: 22: void putch(char);
[; ;user.h: 24: void int_disable(void);
[; ;user.h: 25: void int_enable(void);
"25 interrupts.c
[v F2213 `(v ~T0 @X0 1 tf ]
[v _isr `IF2213 ~T0 @X0 1 e ]
{
[; ;interrupts.c: 24: void interrupt isr(void)
[; ;interrupts.c: 25: {
[e :U _isr ]
[f ]
[; ;interrupts.c: 31: if (PIE1bits.TXIE && PIR1bits.TXIF)
"31
[e $ ! && != -> . . _PIE1bits 0 4 `i -> -> -> 0 `i `Vuc `i != -> . . _PIR1bits 0 4 `i -> -> -> 0 `i `Vuc `i 267  ]
[; ;interrupts.c: 32: msg_sendnext();
"32
[e ( _msg_sendnext ..  ]
[e :U 267 ]
[; ;interrupts.c: 34: if (PIE1bits.RCIE && PIR1bits.RCIF)
"34
[e $ ! && != -> . . _PIE1bits 0 5 `i -> -> -> 0 `i `Vuc `i != -> . . _PIR1bits 0 5 `i -> -> -> 0 `i `Vuc `i 268  ]
[; ;interrupts.c: 35: msg_recvnext();
"35
[e ( _msg_recvnext ..  ]
[e :U 268 ]
[; ;interrupts.c: 57: }
"57
[e :UE 266 ]
}