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Initial import of onewire-to-usb bridge
[onewire] / build / XC8_12F1822 / production / system.p1
CommitLineData
bba33fe1
JM		 1Version 3.2 HI-TECH Software Intermediate Code
2[s S87 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
3[n S87 . SCS0 SCS1 . IRCF0 IRCF1 IRCF2 IRCF3 SPLLEN ]
4[s S88 :2 `uc 1 :1 `uc 1 :4 `uc 1 ]
5[n S88 . SCS . IRCF ]
6[u S86 `S87 1 `S88 1 ]
7[n S86 . . . ]
8"1626 /opt/microchip/xc8/v1.12/include/pic12f1822.h
9[v _OSCCONbits `VS86 ~T0 @X0 0 e@153 ]
10[; ;pic12f1822.h: 44: extern volatile unsigned char INDF0 @ 0x000;
11"46 /opt/microchip/xc8/v1.12/include/pic12f1822.h
12[; ;pic12f1822.h: 46: asm("INDF0 equ 00h");
13[; <" INDF0 equ 00h ;# ">
14[; ;pic12f1822.h: 49: typedef union {
15[; ;pic12f1822.h: 50: struct {
16[; ;pic12f1822.h: 51: unsigned INDF0 :8;
17[; ;pic12f1822.h: 52: };
18[; ;pic12f1822.h: 53: } INDF0bits_t;
19[; ;pic12f1822.h: 54: extern volatile INDF0bits_t INDF0bits @ 0x000;
20[; ;pic12f1822.h: 63: extern volatile unsigned char INDF1 @ 0x001;
21"65
22[; ;pic12f1822.h: 65: asm("INDF1 equ 01h");
23[; <" INDF1 equ 01h ;# ">
24[; ;pic12f1822.h: 68: typedef union {
25[; ;pic12f1822.h: 69: struct {
26[; ;pic12f1822.h: 70: unsigned INDF1 :8;
27[; ;pic12f1822.h: 71: };
28[; ;pic12f1822.h: 72: } INDF1bits_t;
29[; ;pic12f1822.h: 73: extern volatile INDF1bits_t INDF1bits @ 0x001;
30[; ;pic12f1822.h: 82: extern volatile unsigned char PCL @ 0x002;
31"84
32[; ;pic12f1822.h: 84: asm("PCL equ 02h");
33[; <" PCL equ 02h ;# ">
34[; ;pic12f1822.h: 87: typedef union {
35[; ;pic12f1822.h: 88: struct {
36[; ;pic12f1822.h: 89: unsigned PCL :8;
37[; ;pic12f1822.h: 90: };
38[; ;pic12f1822.h: 91: } PCLbits_t;
39[; ;pic12f1822.h: 92: extern volatile PCLbits_t PCLbits @ 0x002;
40[; ;pic12f1822.h: 101: extern volatile unsigned char STATUS @ 0x003;
41"103
42[; ;pic12f1822.h: 103: asm("STATUS equ 03h");
43[; <" STATUS equ 03h ;# ">
44[; ;pic12f1822.h: 106: typedef union {
45[; ;pic12f1822.h: 107: struct {
46[; ;pic12f1822.h: 108: unsigned C :1;
47[; ;pic12f1822.h: 109: unsigned DC :1;
48[; ;pic12f1822.h: 110: unsigned Z :1;
49[; ;pic12f1822.h: 111: unsigned nPD :1;
50[; ;pic12f1822.h: 112: unsigned nTO :1;
51[; ;pic12f1822.h: 113: };
52[; ;pic12f1822.h: 114: struct {
53[; ;pic12f1822.h: 115: unsigned CARRY :1;
54[; ;pic12f1822.h: 116: };
55[; ;pic12f1822.h: 117: struct {
56[; ;pic12f1822.h: 118: unsigned :2;
57[; ;pic12f1822.h: 119: unsigned ZERO :1;
58[; ;pic12f1822.h: 120: };
59[; ;pic12f1822.h: 121: } STATUSbits_t;
60[; ;pic12f1822.h: 122: extern volatile STATUSbits_t STATUSbits @ 0x003;
61[; ;pic12f1822.h: 161: extern volatile unsigned short FSR0 @ 0x004;
62[; ;pic12f1822.h: 164: extern volatile unsigned char FSR0L @ 0x004;
63"166
64[; ;pic12f1822.h: 166: asm("FSR0L equ 04h");
65[; <" FSR0L equ 04h ;# ">
66[; ;pic12f1822.h: 169: typedef union {
67[; ;pic12f1822.h: 170: struct {
68[; ;pic12f1822.h: 171: unsigned FSR0L :8;
69[; ;pic12f1822.h: 172: };
70[; ;pic12f1822.h: 173: } FSR0Lbits_t;
71[; ;pic12f1822.h: 174: extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
72[; ;pic12f1822.h: 183: extern volatile unsigned char FSR0H @ 0x005;
73"185
74[; ;pic12f1822.h: 185: asm("FSR0H equ 05h");
75[; <" FSR0H equ 05h ;# ">
76[; ;pic12f1822.h: 188: typedef union {
77[; ;pic12f1822.h: 189: struct {
78[; ;pic12f1822.h: 190: unsigned FSR0H :8;
79[; ;pic12f1822.h: 191: };
80[; ;pic12f1822.h: 192: } FSR0Hbits_t;
81[; ;pic12f1822.h: 193: extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
82[; ;pic12f1822.h: 202: extern volatile unsigned short FSR1 @ 0x006;
83[; ;pic12f1822.h: 205: extern volatile unsigned char FSR1L @ 0x006;
84"207
85[; ;pic12f1822.h: 207: asm("FSR1L equ 06h");
86[; <" FSR1L equ 06h ;# ">
87[; ;pic12f1822.h: 210: typedef union {
88[; ;pic12f1822.h: 211: struct {
89[; ;pic12f1822.h: 212: unsigned FSR1L :8;
90[; ;pic12f1822.h: 213: };
91[; ;pic12f1822.h: 214: } FSR1Lbits_t;
92[; ;pic12f1822.h: 215: extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
93[; ;pic12f1822.h: 224: extern volatile unsigned char FSR1H @ 0x007;
94"226
95[; ;pic12f1822.h: 226: asm("FSR1H equ 07h");
96[; <" FSR1H equ 07h ;# ">
97[; ;pic12f1822.h: 229: typedef union {
98[; ;pic12f1822.h: 230: struct {
99[; ;pic12f1822.h: 231: unsigned FSR1H :8;
100[; ;pic12f1822.h: 232: };
101[; ;pic12f1822.h: 233: } FSR1Hbits_t;
102[; ;pic12f1822.h: 234: extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
103[; ;pic12f1822.h: 243: extern volatile unsigned char BSR @ 0x008;
104"245
105[; ;pic12f1822.h: 245: asm("BSR equ 08h");
106[; <" BSR equ 08h ;# ">
107[; ;pic12f1822.h: 248: typedef union {
108[; ;pic12f1822.h: 249: struct {
109[; ;pic12f1822.h: 250: unsigned BSR0 :1;
110[; ;pic12f1822.h: 251: unsigned BSR1 :1;
111[; ;pic12f1822.h: 252: unsigned BSR2 :1;
112[; ;pic12f1822.h: 253: unsigned BSR3 :1;
113[; ;pic12f1822.h: 254: unsigned BSR4 :1;
114[; ;pic12f1822.h: 255: };
115[; ;pic12f1822.h: 256: struct {
116[; ;pic12f1822.h: 257: unsigned BSR :5;
117[; ;pic12f1822.h: 258: };
118[; ;pic12f1822.h: 259: } BSRbits_t;
119[; ;pic12f1822.h: 260: extern volatile BSRbits_t BSRbits @ 0x008;
120[; ;pic12f1822.h: 294: extern volatile unsigned char WREG @ 0x009;
121"296
122[; ;pic12f1822.h: 296: asm("WREG equ 09h");
123[; <" WREG equ 09h ;# ">
124[; ;pic12f1822.h: 299: typedef union {
125[; ;pic12f1822.h: 300: struct {
126[; ;pic12f1822.h: 301: unsigned WREG0 :8;
127[; ;pic12f1822.h: 302: };
128[; ;pic12f1822.h: 303: } WREGbits_t;
129[; ;pic12f1822.h: 304: extern volatile WREGbits_t WREGbits @ 0x009;
130[; ;pic12f1822.h: 313: extern volatile unsigned char PCLATH @ 0x00A;
131"315
132[; ;pic12f1822.h: 315: asm("PCLATH equ 0Ah");
133[; <" PCLATH equ 0Ah ;# ">
134[; ;pic12f1822.h: 318: typedef union {
135[; ;pic12f1822.h: 319: struct {
136[; ;pic12f1822.h: 320: unsigned PCLATH :7;
137[; ;pic12f1822.h: 321: };
138[; ;pic12f1822.h: 322: } PCLATHbits_t;
139[; ;pic12f1822.h: 323: extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
140[; ;pic12f1822.h: 332: extern volatile unsigned char INTCON @ 0x00B;
141"334
142[; ;pic12f1822.h: 334: asm("INTCON equ 0Bh");
143[; <" INTCON equ 0Bh ;# ">
144[; ;pic12f1822.h: 337: typedef union {
145[; ;pic12f1822.h: 338: struct {
146[; ;pic12f1822.h: 339: unsigned IOCIF :1;
147[; ;pic12f1822.h: 340: unsigned INTF :1;
148[; ;pic12f1822.h: 341: unsigned TMR0IF :1;
149[; ;pic12f1822.h: 342: unsigned IOCIE :1;
150[; ;pic12f1822.h: 343: unsigned INTE :1;
151[; ;pic12f1822.h: 344: unsigned TMR0IE :1;
152[; ;pic12f1822.h: 345: unsigned PEIE :1;
153[; ;pic12f1822.h: 346: unsigned GIE :1;
154[; ;pic12f1822.h: 347: };
155[; ;pic12f1822.h: 348: struct {
156[; ;pic12f1822.h: 349: unsigned :2;
157[; ;pic12f1822.h: 350: unsigned T0IF :1;
158[; ;pic12f1822.h: 351: unsigned :2;
159[; ;pic12f1822.h: 352: unsigned T0IE :1;
160[; ;pic12f1822.h: 353: };
161[; ;pic12f1822.h: 354: } INTCONbits_t;
162[; ;pic12f1822.h: 355: extern volatile INTCONbits_t INTCONbits @ 0x00B;
163[; ;pic12f1822.h: 409: extern volatile unsigned char PORTA @ 0x00C;
164"411
165[; ;pic12f1822.h: 411: asm("PORTA equ 0Ch");
166[; <" PORTA equ 0Ch ;# ">
167[; ;pic12f1822.h: 414: typedef union {
168[; ;pic12f1822.h: 415: struct {
169[; ;pic12f1822.h: 416: unsigned RA0 :1;
170[; ;pic12f1822.h: 417: unsigned RA1 :1;
171[; ;pic12f1822.h: 418: unsigned RA2 :1;
172[; ;pic12f1822.h: 419: unsigned RA3 :1;
173[; ;pic12f1822.h: 420: unsigned RA4 :1;
174[; ;pic12f1822.h: 421: unsigned RA5 :1;
175[; ;pic12f1822.h: 422: };
176[; ;pic12f1822.h: 423: struct {
177[; ;pic12f1822.h: 424: unsigned AN0 :1;
178[; ;pic12f1822.h: 425: unsigned AN1 :1;
179[; ;pic12f1822.h: 426: unsigned AN2 :1;
180[; ;pic12f1822.h: 427: unsigned :1;
181[; ;pic12f1822.h: 428: unsigned AN3 :1;
182[; ;pic12f1822.h: 429: };
183[; ;pic12f1822.h: 430: struct {
184[; ;pic12f1822.h: 431: unsigned CPS0 :1;
185[; ;pic12f1822.h: 432: unsigned CPS1 :1;
186[; ;pic12f1822.h: 433: unsigned CPS2 :1;
187[; ;pic12f1822.h: 434: unsigned :1;
188[; ;pic12f1822.h: 435: unsigned CPS3 :1;
189[; ;pic12f1822.h: 436: };
190[; ;pic12f1822.h: 437: struct {
191[; ;pic12f1822.h: 438: unsigned C1INP :1;
192[; ;pic12f1822.h: 439: unsigned C1IN0N :1;
193[; ;pic12f1822.h: 440: unsigned C1OUT :1;
194[; ;pic12f1822.h: 441: unsigned :1;
195[; ;pic12f1822.h: 442: unsigned C1IN1N :1;
196[; ;pic12f1822.h: 443: };
197[; ;pic12f1822.h: 444: struct {
198[; ;pic12f1822.h: 445: unsigned DACOUT :1;
199[; ;pic12f1822.h: 446: unsigned SRI :1;
200[; ;pic12f1822.h: 447: unsigned SRQ :1;
201[; ;pic12f1822.h: 448: unsigned :2;
202[; ;pic12f1822.h: 449: unsigned SRNQ :1;
203[; ;pic12f1822.h: 450: };
204[; ;pic12f1822.h: 451: struct {
205[; ;pic12f1822.h: 452: unsigned :1;
206[; ;pic12f1822.h: 453: unsigned SCK :1;
207[; ;pic12f1822.h: 454: unsigned T0CKI :1;
208[; ;pic12f1822.h: 455: unsigned :1;
209[; ;pic12f1822.h: 456: unsigned T1OSO :1;
210[; ;pic12f1822.h: 457: unsigned T1CKI :1;
211[; ;pic12f1822.h: 458: };
212[; ;pic12f1822.h: 459: struct {
213[; ;pic12f1822.h: 460: unsigned :1;
214[; ;pic12f1822.h: 461: unsigned SCL :1;
215[; ;pic12f1822.h: 462: unsigned SDA :1;
216[; ;pic12f1822.h: 463: unsigned nMCLR :1;
217[; ;pic12f1822.h: 464: unsigned CLKR :1;
218[; ;pic12f1822.h: 465: unsigned T1OSI :1;
219[; ;pic12f1822.h: 466: };
220[; ;pic12f1822.h: 467: struct {
221[; ;pic12f1822.h: 468: unsigned MDOUT :1;
222[; ;pic12f1822.h: 469: unsigned MDMIN :1;
223[; ;pic12f1822.h: 470: unsigned MDCIN1 :1;
224[; ;pic12f1822.h: 471: unsigned :1;
225[; ;pic12f1822.h: 472: unsigned MDCIN2 :1;
226[; ;pic12f1822.h: 473: };
227[; ;pic12f1822.h: 474: struct {
228[; ;pic12f1822.h: 475: unsigned :2;
229[; ;pic12f1822.h: 476: unsigned SDI :1;
230[; ;pic12f1822.h: 477: unsigned :1;
231[; ;pic12f1822.h: 478: unsigned OSC2 :1;
232[; ;pic12f1822.h: 479: unsigned OSC1 :1;
233[; ;pic12f1822.h: 480: };
234[; ;pic12f1822.h: 481: struct {
235[; ;pic12f1822.h: 482: unsigned :2;
236[; ;pic12f1822.h: 483: unsigned FLT0 :1;
237[; ;pic12f1822.h: 484: unsigned :1;
238[; ;pic12f1822.h: 485: unsigned CLKOUT :1;
239[; ;pic12f1822.h: 486: unsigned CLKIN :1;
240[; ;pic12f1822.h: 487: };
241[; ;pic12f1822.h: 488: } PORTAbits_t;
242[; ;pic12f1822.h: 489: extern volatile PORTAbits_t PORTAbits @ 0x00C;
243[; ;pic12f1822.h: 698: extern volatile unsigned char PIR1 @ 0x011;
244"700
245[; ;pic12f1822.h: 700: asm("PIR1 equ 011h");
246[; <" PIR1 equ 011h ;# ">
247[; ;pic12f1822.h: 703: typedef union {
248[; ;pic12f1822.h: 704: struct {
249[; ;pic12f1822.h: 705: unsigned TMR1IF :1;
250[; ;pic12f1822.h: 706: unsigned TMR2IF :1;
251[; ;pic12f1822.h: 707: unsigned CCP1IF :1;
252[; ;pic12f1822.h: 708: unsigned SSP1IF :1;
253[; ;pic12f1822.h: 709: unsigned TXIF :1;
254[; ;pic12f1822.h: 710: unsigned RCIF :1;
255[; ;pic12f1822.h: 711: unsigned ADIF :1;
256[; ;pic12f1822.h: 712: unsigned TMR1GIF :1;
257[; ;pic12f1822.h: 713: };
258[; ;pic12f1822.h: 714: } PIR1bits_t;
259[; ;pic12f1822.h: 715: extern volatile PIR1bits_t PIR1bits @ 0x011;
260[; ;pic12f1822.h: 759: extern volatile unsigned char PIR2 @ 0x012;
261"761
262[; ;pic12f1822.h: 761: asm("PIR2 equ 012h");
263[; <" PIR2 equ 012h ;# ">
264[; ;pic12f1822.h: 764: typedef union {
265[; ;pic12f1822.h: 765: struct {
266[; ;pic12f1822.h: 766: unsigned :3;
267[; ;pic12f1822.h: 767: unsigned BCL1IF :1;
268[; ;pic12f1822.h: 768: unsigned EEIF :1;
269[; ;pic12f1822.h: 769: unsigned C1IF :1;
270[; ;pic12f1822.h: 770: unsigned :1;
271[; ;pic12f1822.h: 771: unsigned OSFIF :1;
272[; ;pic12f1822.h: 772: };
273[; ;pic12f1822.h: 773: } PIR2bits_t;
274[; ;pic12f1822.h: 774: extern volatile PIR2bits_t PIR2bits @ 0x012;
275[; ;pic12f1822.h: 798: extern volatile unsigned char TMR0 @ 0x015;
276"800
277[; ;pic12f1822.h: 800: asm("TMR0 equ 015h");
278[; <" TMR0 equ 015h ;# ">
279[; ;pic12f1822.h: 803: typedef union {
280[; ;pic12f1822.h: 804: struct {
281[; ;pic12f1822.h: 805: unsigned TMR0 :8;
282[; ;pic12f1822.h: 806: };
283[; ;pic12f1822.h: 807: } TMR0bits_t;
284[; ;pic12f1822.h: 808: extern volatile TMR0bits_t TMR0bits @ 0x015;
285[; ;pic12f1822.h: 817: extern volatile unsigned short TMR1 @ 0x016;
286"819
287[; ;pic12f1822.h: 819: asm("TMR1 equ 016h");
288[; <" TMR1 equ 016h ;# ">
289[; ;pic12f1822.h: 823: extern volatile unsigned char TMR1L @ 0x016;
290"825
291[; ;pic12f1822.h: 825: asm("TMR1L equ 016h");
292[; <" TMR1L equ 016h ;# ">
293[; ;pic12f1822.h: 828: typedef union {
294[; ;pic12f1822.h: 829: struct {
295[; ;pic12f1822.h: 830: unsigned TMR1L :8;
296[; ;pic12f1822.h: 831: };
297[; ;pic12f1822.h: 832: } TMR1Lbits_t;
298[; ;pic12f1822.h: 833: extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
299[; ;pic12f1822.h: 842: extern volatile unsigned char TMR1H @ 0x017;
300"844
301[; ;pic12f1822.h: 844: asm("TMR1H equ 017h");
302[; <" TMR1H equ 017h ;# ">
303[; ;pic12f1822.h: 847: typedef union {
304[; ;pic12f1822.h: 848: struct {
305[; ;pic12f1822.h: 849: unsigned TMR1H :8;
306[; ;pic12f1822.h: 850: };
307[; ;pic12f1822.h: 851: } TMR1Hbits_t;
308[; ;pic12f1822.h: 852: extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
309[; ;pic12f1822.h: 861: extern volatile unsigned char T1CON @ 0x018;
310"863
311[; ;pic12f1822.h: 863: asm("T1CON equ 018h");
312[; <" T1CON equ 018h ;# ">
313[; ;pic12f1822.h: 866: typedef union {
314[; ;pic12f1822.h: 867: struct {
315[; ;pic12f1822.h: 868: unsigned TMR1ON :1;
316[; ;pic12f1822.h: 869: unsigned :1;
317[; ;pic12f1822.h: 870: unsigned nT1SYNC :1;
318[; ;pic12f1822.h: 871: unsigned T1OSCEN :1;
319[; ;pic12f1822.h: 872: unsigned T1CKPS0 :1;
320[; ;pic12f1822.h: 873: unsigned T1CKPS1 :1;
321[; ;pic12f1822.h: 874: unsigned TMR1CS0 :1;
322[; ;pic12f1822.h: 875: unsigned TMR1CS1 :1;
323[; ;pic12f1822.h: 876: };
324[; ;pic12f1822.h: 877: struct {
325[; ;pic12f1822.h: 878: unsigned :4;
326[; ;pic12f1822.h: 879: unsigned T1CKPS :2;
327[; ;pic12f1822.h: 880: unsigned TMR1CS :2;
328[; ;pic12f1822.h: 881: };
329[; ;pic12f1822.h: 882: } T1CONbits_t;
330[; ;pic12f1822.h: 883: extern volatile T1CONbits_t T1CONbits @ 0x018;
331[; ;pic12f1822.h: 932: extern volatile unsigned char T1GCON @ 0x019;
332"934
333[; ;pic12f1822.h: 934: asm("T1GCON equ 019h");
334[; <" T1GCON equ 019h ;# ">
335[; ;pic12f1822.h: 937: typedef union {
336[; ;pic12f1822.h: 938: struct {
337[; ;pic12f1822.h: 939: unsigned T1GSS0 :1;
338[; ;pic12f1822.h: 940: unsigned T1GSS1 :1;
339[; ;pic12f1822.h: 941: unsigned T1GVAL :1;
340[; ;pic12f1822.h: 942: unsigned T1GGO_nDONE :1;
341[; ;pic12f1822.h: 943: unsigned T1GSPM :1;
342[; ;pic12f1822.h: 944: unsigned T1GTM :1;
343[; ;pic12f1822.h: 945: unsigned T1GPOL :1;
344[; ;pic12f1822.h: 946: unsigned TMR1GE :1;
345[; ;pic12f1822.h: 947: };
346[; ;pic12f1822.h: 948: struct {
347[; ;pic12f1822.h: 949: unsigned T1GSS :2;
348[; ;pic12f1822.h: 950: unsigned :1;
349[; ;pic12f1822.h: 951: unsigned T1GGO :1;
350[; ;pic12f1822.h: 952: };
351[; ;pic12f1822.h: 953: } T1GCONbits_t;
352[; ;pic12f1822.h: 954: extern volatile T1GCONbits_t T1GCONbits @ 0x019;
353[; ;pic12f1822.h: 1008: extern volatile unsigned char TMR2 @ 0x01A;
354"1010
355[; ;pic12f1822.h: 1010: asm("TMR2 equ 01Ah");
356[; <" TMR2 equ 01Ah ;# ">
357[; ;pic12f1822.h: 1013: typedef union {
358[; ;pic12f1822.h: 1014: struct {
359[; ;pic12f1822.h: 1015: unsigned TMR2 :8;
360[; ;pic12f1822.h: 1016: };
361[; ;pic12f1822.h: 1017: } TMR2bits_t;
362[; ;pic12f1822.h: 1018: extern volatile TMR2bits_t TMR2bits @ 0x01A;
363[; ;pic12f1822.h: 1027: extern volatile unsigned char PR2 @ 0x01B;
364"1029
365[; ;pic12f1822.h: 1029: asm("PR2 equ 01Bh");
366[; <" PR2 equ 01Bh ;# ">
367[; ;pic12f1822.h: 1032: typedef union {
368[; ;pic12f1822.h: 1033: struct {
369[; ;pic12f1822.h: 1034: unsigned PR2 :8;
370[; ;pic12f1822.h: 1035: };
371[; ;pic12f1822.h: 1036: } PR2bits_t;
372[; ;pic12f1822.h: 1037: extern volatile PR2bits_t PR2bits @ 0x01B;
373[; ;pic12f1822.h: 1046: extern volatile unsigned char T2CON @ 0x01C;
374"1048
375[; ;pic12f1822.h: 1048: asm("T2CON equ 01Ch");
376[; <" T2CON equ 01Ch ;# ">
377[; ;pic12f1822.h: 1051: typedef union {
378[; ;pic12f1822.h: 1052: struct {
379[; ;pic12f1822.h: 1053: unsigned T2CKPS0 :1;
380[; ;pic12f1822.h: 1054: unsigned T2CKPS1 :1;
381[; ;pic12f1822.h: 1055: unsigned TMR2ON :1;
382[; ;pic12f1822.h: 1056: unsigned T2OUTPS0 :1;
383[; ;pic12f1822.h: 1057: unsigned T2OUTPS1 :1;
384[; ;pic12f1822.h: 1058: unsigned T2OUTPS2 :1;
385[; ;pic12f1822.h: 1059: unsigned T2OUTPS3 :1;
386[; ;pic12f1822.h: 1060: };
387[; ;pic12f1822.h: 1061: struct {
388[; ;pic12f1822.h: 1062: unsigned T2CKPS :2;
389[; ;pic12f1822.h: 1063: unsigned :1;
390[; ;pic12f1822.h: 1064: unsigned T2OUTPS :4;
391[; ;pic12f1822.h: 1065: };
392[; ;pic12f1822.h: 1066: } T2CONbits_t;
393[; ;pic12f1822.h: 1067: extern volatile T2CONbits_t T2CONbits @ 0x01C;
394[; ;pic12f1822.h: 1116: extern volatile unsigned char CPSCON0 @ 0x01E;
395"1118
396[; ;pic12f1822.h: 1118: asm("CPSCON0 equ 01Eh");
397[; <" CPSCON0 equ 01Eh ;# ">
398[; ;pic12f1822.h: 1121: typedef union {
399[; ;pic12f1822.h: 1122: struct {
400[; ;pic12f1822.h: 1123: unsigned T0XCS :1;
401[; ;pic12f1822.h: 1124: unsigned CPSOUT :1;
402[; ;pic12f1822.h: 1125: unsigned CPSRNG0 :1;
403[; ;pic12f1822.h: 1126: unsigned CPSRNG1 :1;
404[; ;pic12f1822.h: 1127: unsigned :2;
405[; ;pic12f1822.h: 1128: unsigned CPSRM :1;
406[; ;pic12f1822.h: 1129: unsigned CPSON :1;
407[; ;pic12f1822.h: 1130: };
408[; ;pic12f1822.h: 1131: struct {
409[; ;pic12f1822.h: 1132: unsigned :2;
410[; ;pic12f1822.h: 1133: unsigned CPSRNG :2;
411[; ;pic12f1822.h: 1134: };
412[; ;pic12f1822.h: 1135: } CPSCON0bits_t;
413[; ;pic12f1822.h: 1136: extern volatile CPSCON0bits_t CPSCON0bits @ 0x01E;
414[; ;pic12f1822.h: 1175: extern volatile unsigned char CPSCON1 @ 0x01F;
415"1177
416[; ;pic12f1822.h: 1177: asm("CPSCON1 equ 01Fh");
417[; <" CPSCON1 equ 01Fh ;# ">
418[; ;pic12f1822.h: 1180: typedef union {
419[; ;pic12f1822.h: 1181: struct {
420[; ;pic12f1822.h: 1182: unsigned CPSCH0 :1;
421[; ;pic12f1822.h: 1183: unsigned CPSCH1 :1;
422[; ;pic12f1822.h: 1184: };
423[; ;pic12f1822.h: 1185: struct {
424[; ;pic12f1822.h: 1186: unsigned CPSCH :2;
425[; ;pic12f1822.h: 1187: };
426[; ;pic12f1822.h: 1188: } CPSCON1bits_t;
427[; ;pic12f1822.h: 1189: extern volatile CPSCON1bits_t CPSCON1bits @ 0x01F;
428[; ;pic12f1822.h: 1208: extern volatile unsigned char TRISA @ 0x08C;
429"1210
430[; ;pic12f1822.h: 1210: asm("TRISA equ 08Ch");
431[; <" TRISA equ 08Ch ;# ">
432[; ;pic12f1822.h: 1213: typedef union {
433[; ;pic12f1822.h: 1214: struct {
434[; ;pic12f1822.h: 1215: unsigned TRISA0 :1;
435[; ;pic12f1822.h: 1216: unsigned TRISA1 :1;
436[; ;pic12f1822.h: 1217: unsigned TRISA2 :1;
437[; ;pic12f1822.h: 1218: unsigned TRISA3 :1;
438[; ;pic12f1822.h: 1219: unsigned TRISA4 :1;
439[; ;pic12f1822.h: 1220: unsigned TRISA5 :1;
440[; ;pic12f1822.h: 1221: };
441[; ;pic12f1822.h: 1222: } TRISAbits_t;
442[; ;pic12f1822.h: 1223: extern volatile TRISAbits_t TRISAbits @ 0x08C;
443[; ;pic12f1822.h: 1257: extern volatile unsigned char PIE1 @ 0x091;
444"1259
445[; ;pic12f1822.h: 1259: asm("PIE1 equ 091h");
446[; <" PIE1 equ 091h ;# ">
447[; ;pic12f1822.h: 1262: typedef union {
448[; ;pic12f1822.h: 1263: struct {
449[; ;pic12f1822.h: 1264: unsigned TMR1IE :1;
450[; ;pic12f1822.h: 1265: unsigned TMR2IE :1;
451[; ;pic12f1822.h: 1266: unsigned CCP1IE :1;
452[; ;pic12f1822.h: 1267: unsigned SSP1IE :1;
453[; ;pic12f1822.h: 1268: unsigned TXIE :1;
454[; ;pic12f1822.h: 1269: unsigned RCIE :1;
455[; ;pic12f1822.h: 1270: unsigned ADIE :1;
456[; ;pic12f1822.h: 1271: unsigned TMR1GIE :1;
457[; ;pic12f1822.h: 1272: };
458[; ;pic12f1822.h: 1273: } PIE1bits_t;
459[; ;pic12f1822.h: 1274: extern volatile PIE1bits_t PIE1bits @ 0x091;
460[; ;pic12f1822.h: 1318: extern volatile unsigned char PIE2 @ 0x092;
461"1320
462[; ;pic12f1822.h: 1320: asm("PIE2 equ 092h");
463[; <" PIE2 equ 092h ;# ">
464[; ;pic12f1822.h: 1323: typedef union {
465[; ;pic12f1822.h: 1324: struct {
466[; ;pic12f1822.h: 1325: unsigned :3;
467[; ;pic12f1822.h: 1326: unsigned BCL1IE :1;
468[; ;pic12f1822.h: 1327: unsigned EEIE :1;
469[; ;pic12f1822.h: 1328: unsigned C1IE :1;
470[; ;pic12f1822.h: 1329: unsigned :1;
471[; ;pic12f1822.h: 1330: unsigned OSFIE :1;
472[; ;pic12f1822.h: 1331: };
473[; ;pic12f1822.h: 1332: } PIE2bits_t;
474[; ;pic12f1822.h: 1333: extern volatile PIE2bits_t PIE2bits @ 0x092;
475[; ;pic12f1822.h: 1357: extern volatile unsigned char OPTION_REG @ 0x095;
476"1359
477[; ;pic12f1822.h: 1359: asm("OPTION_REG equ 095h");
478[; <" OPTION_REG equ 095h ;# ">
479[; ;pic12f1822.h: 1362: typedef union {
480[; ;pic12f1822.h: 1363: struct {
481[; ;pic12f1822.h: 1364: unsigned PS0 :1;
482[; ;pic12f1822.h: 1365: unsigned PS1 :1;
483[; ;pic12f1822.h: 1366: unsigned PS2 :1;
484[; ;pic12f1822.h: 1367: unsigned PSA :1;
485[; ;pic12f1822.h: 1368: unsigned TMR0SE :1;
486[; ;pic12f1822.h: 1369: unsigned TMR0CS :1;
487[; ;pic12f1822.h: 1370: unsigned INTEDG :1;
488[; ;pic12f1822.h: 1371: unsigned nWPUEN :1;
489[; ;pic12f1822.h: 1372: };
490[; ;pic12f1822.h: 1373: struct {
491[; ;pic12f1822.h: 1374: unsigned PS :3;
492[; ;pic12f1822.h: 1375: unsigned :1;
493[; ;pic12f1822.h: 1376: unsigned T0SE :1;
494[; ;pic12f1822.h: 1377: unsigned T0CS :1;
495[; ;pic12f1822.h: 1378: };
496[; ;pic12f1822.h: 1379: } OPTION_REGbits_t;
497[; ;pic12f1822.h: 1380: extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
498[; ;pic12f1822.h: 1439: extern volatile unsigned char PCON @ 0x096;
499"1441
500[; ;pic12f1822.h: 1441: asm("PCON equ 096h");
501[; <" PCON equ 096h ;# ">
502[; ;pic12f1822.h: 1444: typedef union {
503[; ;pic12f1822.h: 1445: struct {
504[; ;pic12f1822.h: 1446: unsigned nBOR :1;
505[; ;pic12f1822.h: 1447: unsigned nPOR :1;
506[; ;pic12f1822.h: 1448: unsigned nRI :1;
507[; ;pic12f1822.h: 1449: unsigned nRMCLR :1;
508[; ;pic12f1822.h: 1450: unsigned :2;
509[; ;pic12f1822.h: 1451: unsigned STKUNF :1;
510[; ;pic12f1822.h: 1452: unsigned STKOVF :1;
511[; ;pic12f1822.h: 1453: };
512[; ;pic12f1822.h: 1454: } PCONbits_t;
513[; ;pic12f1822.h: 1455: extern volatile PCONbits_t PCONbits @ 0x096;
514[; ;pic12f1822.h: 1489: extern volatile unsigned char WDTCON @ 0x097;
515"1491
516[; ;pic12f1822.h: 1491: asm("WDTCON equ 097h");
517[; <" WDTCON equ 097h ;# ">
518[; ;pic12f1822.h: 1494: typedef union {
519[; ;pic12f1822.h: 1495: struct {
520[; ;pic12f1822.h: 1496: unsigned SWDTEN :1;
521[; ;pic12f1822.h: 1497: unsigned WDTPS0 :1;
522[; ;pic12f1822.h: 1498: unsigned WDTPS1 :1;
523[; ;pic12f1822.h: 1499: unsigned WDTPS2 :1;
524[; ;pic12f1822.h: 1500: unsigned WDTPS3 :1;
525[; ;pic12f1822.h: 1501: unsigned WDTPS4 :1;
526[; ;pic12f1822.h: 1502: };
527[; ;pic12f1822.h: 1503: struct {
528[; ;pic12f1822.h: 1504: unsigned :1;
529[; ;pic12f1822.h: 1505: unsigned WDTPS :5;
530[; ;pic12f1822.h: 1506: };
531[; ;pic12f1822.h: 1507: } WDTCONbits_t;
532[; ;pic12f1822.h: 1508: extern volatile WDTCONbits_t WDTCONbits @ 0x097;
533[; ;pic12f1822.h: 1547: extern volatile unsigned char OSCTUNE @ 0x098;
534"1549
535[; ;pic12f1822.h: 1549: asm("OSCTUNE equ 098h");
536[; <" OSCTUNE equ 098h ;# ">
537[; ;pic12f1822.h: 1552: typedef union {
538[; ;pic12f1822.h: 1553: struct {
539[; ;pic12f1822.h: 1554: unsigned TUN0 :1;
540[; ;pic12f1822.h: 1555: unsigned TUN1 :1;
541[; ;pic12f1822.h: 1556: unsigned TUN2 :1;
542[; ;pic12f1822.h: 1557: unsigned TUN3 :1;
543[; ;pic12f1822.h: 1558: unsigned TUN4 :1;
544[; ;pic12f1822.h: 1559: unsigned TUN5 :1;
545[; ;pic12f1822.h: 1560: };
546[; ;pic12f1822.h: 1561: struct {
547[; ;pic12f1822.h: 1562: unsigned TUN :6;
548[; ;pic12f1822.h: 1563: };
549[; ;pic12f1822.h: 1564: } OSCTUNEbits_t;
550[; ;pic12f1822.h: 1565: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
551[; ;pic12f1822.h: 1604: extern volatile unsigned char OSCCON @ 0x099;
552"1606
553[; ;pic12f1822.h: 1606: asm("OSCCON equ 099h");
554[; <" OSCCON equ 099h ;# ">
555[; ;pic12f1822.h: 1609: typedef union {
556[; ;pic12f1822.h: 1610: struct {
557[; ;pic12f1822.h: 1611: unsigned SCS0 :1;
558[; ;pic12f1822.h: 1612: unsigned SCS1 :1;
559[; ;pic12f1822.h: 1613: unsigned :1;
560[; ;pic12f1822.h: 1614: unsigned IRCF0 :1;
561[; ;pic12f1822.h: 1615: unsigned IRCF1 :1;
562[; ;pic12f1822.h: 1616: unsigned IRCF2 :1;
563[; ;pic12f1822.h: 1617: unsigned IRCF3 :1;
564[; ;pic12f1822.h: 1618: unsigned SPLLEN :1;
565[; ;pic12f1822.h: 1619: };
566[; ;pic12f1822.h: 1620: struct {
567[; ;pic12f1822.h: 1621: unsigned SCS :2;
568[; ;pic12f1822.h: 1622: unsigned :1;
569[; ;pic12f1822.h: 1623: unsigned IRCF :4;
570[; ;pic12f1822.h: 1624: };
571[; ;pic12f1822.h: 1625: } OSCCONbits_t;
572[; ;pic12f1822.h: 1626: extern volatile OSCCONbits_t OSCCONbits @ 0x099;
573[; ;pic12f1822.h: 1675: extern volatile unsigned char OSCSTAT @ 0x09A;
574"1677
575[; ;pic12f1822.h: 1677: asm("OSCSTAT equ 09Ah");
576[; <" OSCSTAT equ 09Ah ;# ">
577[; ;pic12f1822.h: 1680: typedef union {
578[; ;pic12f1822.h: 1681: struct {
579[; ;pic12f1822.h: 1682: unsigned HFIOFS :1;
580[; ;pic12f1822.h: 1683: unsigned LFIOFR :1;
581[; ;pic12f1822.h: 1684: unsigned MFIOFR :1;
582[; ;pic12f1822.h: 1685: unsigned HFIOFL :1;
583[; ;pic12f1822.h: 1686: unsigned HFIOFR :1;
584[; ;pic12f1822.h: 1687: unsigned OSTS :1;
585[; ;pic12f1822.h: 1688: unsigned PLLR :1;
586[; ;pic12f1822.h: 1689: unsigned T1OSCR :1;
587[; ;pic12f1822.h: 1690: };
588[; ;pic12f1822.h: 1691: } OSCSTATbits_t;
589[; ;pic12f1822.h: 1692: extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
590[; ;pic12f1822.h: 1736: extern volatile unsigned short ADRES @ 0x09B;
591"1738
592[; ;pic12f1822.h: 1738: asm("ADRES equ 09Bh");
593[; <" ADRES equ 09Bh ;# ">
594[; ;pic12f1822.h: 1742: extern volatile unsigned char ADRESL @ 0x09B;
595"1744
596[; ;pic12f1822.h: 1744: asm("ADRESL equ 09Bh");
597[; <" ADRESL equ 09Bh ;# ">
598[; ;pic12f1822.h: 1747: typedef union {
599[; ;pic12f1822.h: 1748: struct {
600[; ;pic12f1822.h: 1749: unsigned ADRESL :8;
601[; ;pic12f1822.h: 1750: };
602[; ;pic12f1822.h: 1751: } ADRESLbits_t;
603[; ;pic12f1822.h: 1752: extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
604[; ;pic12f1822.h: 1761: extern volatile unsigned char ADRESH @ 0x09C;
605"1763
606[; ;pic12f1822.h: 1763: asm("ADRESH equ 09Ch");
607[; <" ADRESH equ 09Ch ;# ">
608[; ;pic12f1822.h: 1766: typedef union {
609[; ;pic12f1822.h: 1767: struct {
610[; ;pic12f1822.h: 1768: unsigned ADRESH :8;
611[; ;pic12f1822.h: 1769: };
612[; ;pic12f1822.h: 1770: } ADRESHbits_t;
613[; ;pic12f1822.h: 1771: extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
614[; ;pic12f1822.h: 1780: extern volatile unsigned char ADCON0 @ 0x09D;
615"1782
616[; ;pic12f1822.h: 1782: asm("ADCON0 equ 09Dh");
617[; <" ADCON0 equ 09Dh ;# ">
618[; ;pic12f1822.h: 1785: typedef union {
619[; ;pic12f1822.h: 1786: struct {
620[; ;pic12f1822.h: 1787: unsigned ADON :1;
621[; ;pic12f1822.h: 1788: unsigned GO_nDONE :1;
622[; ;pic12f1822.h: 1789: unsigned CHS0 :1;
623[; ;pic12f1822.h: 1790: unsigned CHS1 :1;
624[; ;pic12f1822.h: 1791: unsigned CHS2 :1;
625[; ;pic12f1822.h: 1792: unsigned CHS3 :1;
626[; ;pic12f1822.h: 1793: unsigned CHS4 :1;
627[; ;pic12f1822.h: 1794: };
628[; ;pic12f1822.h: 1795: struct {
629[; ;pic12f1822.h: 1796: unsigned :1;
630[; ;pic12f1822.h: 1797: unsigned ADGO :1;
631[; ;pic12f1822.h: 1798: unsigned CHS :5;
632[; ;pic12f1822.h: 1799: };
633[; ;pic12f1822.h: 1800: struct {
634[; ;pic12f1822.h: 1801: unsigned :1;
635[; ;pic12f1822.h: 1802: unsigned GO :1;
636[; ;pic12f1822.h: 1803: };
637[; ;pic12f1822.h: 1804: struct {
638[; ;pic12f1822.h: 1805: unsigned :1;
639[; ;pic12f1822.h: 1806: unsigned nDONE :1;
640[; ;pic12f1822.h: 1807: };
641[; ;pic12f1822.h: 1808: } ADCON0bits_t;
642[; ;pic12f1822.h: 1809: extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
643[; ;pic12f1822.h: 1868: extern volatile unsigned char ADCON1 @ 0x09E;
644"1870
645[; ;pic12f1822.h: 1870: asm("ADCON1 equ 09Eh");
646[; <" ADCON1 equ 09Eh ;# ">
647[; ;pic12f1822.h: 1873: typedef union {
648[; ;pic12f1822.h: 1874: struct {
649[; ;pic12f1822.h: 1875: unsigned ADPREF0 :1;
650[; ;pic12f1822.h: 1876: unsigned ADPREF1 :1;
651[; ;pic12f1822.h: 1877: unsigned :2;
652[; ;pic12f1822.h: 1878: unsigned ADCS0 :1;
653[; ;pic12f1822.h: 1879: unsigned ADCS1 :1;
654[; ;pic12f1822.h: 1880: unsigned ADCS2 :1;
655[; ;pic12f1822.h: 1881: unsigned ADFM :1;
656[; ;pic12f1822.h: 1882: };
657[; ;pic12f1822.h: 1883: struct {
658[; ;pic12f1822.h: 1884: unsigned ADPREF :2;
659[; ;pic12f1822.h: 1885: unsigned :2;
660[; ;pic12f1822.h: 1886: unsigned ADCS :3;
661[; ;pic12f1822.h: 1887: };
662[; ;pic12f1822.h: 1888: } ADCON1bits_t;
663[; ;pic12f1822.h: 1889: extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
664[; ;pic12f1822.h: 1933: extern volatile unsigned char LATA @ 0x10C;
665"1935
666[; ;pic12f1822.h: 1935: asm("LATA equ 010Ch");
667[; <" LATA equ 010Ch ;# ">
668[; ;pic12f1822.h: 1938: typedef union {
669[; ;pic12f1822.h: 1939: struct {
670[; ;pic12f1822.h: 1940: unsigned LATA0 :1;
671[; ;pic12f1822.h: 1941: unsigned LATA1 :1;
672[; ;pic12f1822.h: 1942: unsigned LATA2 :1;
673[; ;pic12f1822.h: 1943: unsigned :1;
674[; ;pic12f1822.h: 1944: unsigned LATA4 :1;
675[; ;pic12f1822.h: 1945: unsigned LATA5 :1;
676[; ;pic12f1822.h: 1946: };
677[; ;pic12f1822.h: 1947: } LATAbits_t;
678[; ;pic12f1822.h: 1948: extern volatile LATAbits_t LATAbits @ 0x10C;
679[; ;pic12f1822.h: 1977: extern volatile unsigned char CM1CON0 @ 0x111;
680"1979
681[; ;pic12f1822.h: 1979: asm("CM1CON0 equ 0111h");
682[; <" CM1CON0 equ 0111h ;# ">
683[; ;pic12f1822.h: 1982: typedef union {
684[; ;pic12f1822.h: 1983: struct {
685[; ;pic12f1822.h: 1984: unsigned C1SYNC :1;
686[; ;pic12f1822.h: 1985: unsigned C1HYS :1;
687[; ;pic12f1822.h: 1986: unsigned C1SP :1;
688[; ;pic12f1822.h: 1987: unsigned :1;
689[; ;pic12f1822.h: 1988: unsigned C1POL :1;
690[; ;pic12f1822.h: 1989: unsigned C1OE :1;
691[; ;pic12f1822.h: 1990: unsigned C1OUT :1;
692[; ;pic12f1822.h: 1991: unsigned C1ON :1;
693[; ;pic12f1822.h: 1992: };
694[; ;pic12f1822.h: 1993: } CM1CON0bits_t;
695[; ;pic12f1822.h: 1994: extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
696[; ;pic12f1822.h: 2033: extern volatile unsigned char CM1CON1 @ 0x112;
697"2035
698[; ;pic12f1822.h: 2035: asm("CM1CON1 equ 0112h");
699[; <" CM1CON1 equ 0112h ;# ">
700[; ;pic12f1822.h: 2038: typedef union {
701[; ;pic12f1822.h: 2039: struct {
702[; ;pic12f1822.h: 2040: unsigned C1NCH0 :1;
703[; ;pic12f1822.h: 2041: unsigned :3;
704[; ;pic12f1822.h: 2042: unsigned C1PCH0 :1;
705[; ;pic12f1822.h: 2043: unsigned C1PCH1 :1;
706[; ;pic12f1822.h: 2044: unsigned C1INTN :1;
707[; ;pic12f1822.h: 2045: unsigned C1INTP :1;
708[; ;pic12f1822.h: 2046: };
709[; ;pic12f1822.h: 2047: struct {
710[; ;pic12f1822.h: 2048: unsigned :4;
711[; ;pic12f1822.h: 2049: unsigned C1PCH :2;
712[; ;pic12f1822.h: 2050: };
713[; ;pic12f1822.h: 2051: } CM1CON1bits_t;
714[; ;pic12f1822.h: 2052: extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
715[; ;pic12f1822.h: 2086: extern volatile unsigned char CMOUT @ 0x115;
716"2088
717[; ;pic12f1822.h: 2088: asm("CMOUT equ 0115h");
718[; <" CMOUT equ 0115h ;# ">
719[; ;pic12f1822.h: 2091: typedef union {
720[; ;pic12f1822.h: 2092: struct {
721[; ;pic12f1822.h: 2093: unsigned MC1OUT :1;
722[; ;pic12f1822.h: 2094: };
723[; ;pic12f1822.h: 2095: } CMOUTbits_t;
724[; ;pic12f1822.h: 2096: extern volatile CMOUTbits_t CMOUTbits @ 0x115;
725[; ;pic12f1822.h: 2105: extern volatile unsigned char BORCON @ 0x116;
726"2107
727[; ;pic12f1822.h: 2107: asm("BORCON equ 0116h");
728[; <" BORCON equ 0116h ;# ">
729[; ;pic12f1822.h: 2110: typedef union {
730[; ;pic12f1822.h: 2111: struct {
731[; ;pic12f1822.h: 2112: unsigned BORRDY :1;
732[; ;pic12f1822.h: 2113: unsigned :6;
733[; ;pic12f1822.h: 2114: unsigned SBOREN :1;
734[; ;pic12f1822.h: 2115: };
735[; ;pic12f1822.h: 2116: } BORCONbits_t;
736[; ;pic12f1822.h: 2117: extern volatile BORCONbits_t BORCONbits @ 0x116;
737[; ;pic12f1822.h: 2131: extern volatile unsigned char FVRCON @ 0x117;
738"2133
739[; ;pic12f1822.h: 2133: asm("FVRCON equ 0117h");
740[; <" FVRCON equ 0117h ;# ">
741[; ;pic12f1822.h: 2136: typedef union {
742[; ;pic12f1822.h: 2137: struct {
743[; ;pic12f1822.h: 2138: unsigned ADFVR0 :1;
744[; ;pic12f1822.h: 2139: unsigned ADFVR1 :1;
745[; ;pic12f1822.h: 2140: unsigned CDAFVR0 :1;
746[; ;pic12f1822.h: 2141: unsigned CDAFVR1 :1;
747[; ;pic12f1822.h: 2142: unsigned TSRNG :1;
748[; ;pic12f1822.h: 2143: unsigned TSEN :1;
749[; ;pic12f1822.h: 2144: unsigned FVRRDY :1;
750[; ;pic12f1822.h: 2145: unsigned FVREN :1;
751[; ;pic12f1822.h: 2146: };
752[; ;pic12f1822.h: 2147: struct {
753[; ;pic12f1822.h: 2148: unsigned ADFVR :2;
754[; ;pic12f1822.h: 2149: unsigned CDAFVR :2;
755[; ;pic12f1822.h: 2150: };
756[; ;pic12f1822.h: 2151: } FVRCONbits_t;
757[; ;pic12f1822.h: 2152: extern volatile FVRCONbits_t FVRCONbits @ 0x117;
758[; ;pic12f1822.h: 2206: extern volatile unsigned char DACCON0 @ 0x118;
759"2208
760[; ;pic12f1822.h: 2208: asm("DACCON0 equ 0118h");
761[; <" DACCON0 equ 0118h ;# ">
762[; ;pic12f1822.h: 2211: typedef union {
763[; ;pic12f1822.h: 2212: struct {
764[; ;pic12f1822.h: 2213: unsigned :2;
765[; ;pic12f1822.h: 2214: unsigned DACPSS0 :1;
766[; ;pic12f1822.h: 2215: unsigned DACPSS1 :1;
767[; ;pic12f1822.h: 2216: unsigned :1;
768[; ;pic12f1822.h: 2217: unsigned DACOE :1;
769[; ;pic12f1822.h: 2218: unsigned DACLPS :1;
770[; ;pic12f1822.h: 2219: unsigned DACEN :1;
771[; ;pic12f1822.h: 2220: };
772[; ;pic12f1822.h: 2221: struct {
773[; ;pic12f1822.h: 2222: unsigned :2;
774[; ;pic12f1822.h: 2223: unsigned DACPSS :2;
775[; ;pic12f1822.h: 2224: };
776[; ;pic12f1822.h: 2225: } DACCON0bits_t;
777[; ;pic12f1822.h: 2226: extern volatile DACCON0bits_t DACCON0bits @ 0x118;
778[; ;pic12f1822.h: 2260: extern volatile unsigned char DACCON1 @ 0x119;
779"2262
780[; ;pic12f1822.h: 2262: asm("DACCON1 equ 0119h");
781[; <" DACCON1 equ 0119h ;# ">
782[; ;pic12f1822.h: 2265: typedef union {
783[; ;pic12f1822.h: 2266: struct {
784[; ;pic12f1822.h: 2267: unsigned DACR0 :1;
785[; ;pic12f1822.h: 2268: unsigned DACR1 :1;
786[; ;pic12f1822.h: 2269: unsigned DACR2 :1;
787[; ;pic12f1822.h: 2270: unsigned DACR3 :1;
788[; ;pic12f1822.h: 2271: unsigned DACR4 :1;
789[; ;pic12f1822.h: 2272: };
790[; ;pic12f1822.h: 2273: struct {
791[; ;pic12f1822.h: 2274: unsigned DACR :5;
792[; ;pic12f1822.h: 2275: };
793[; ;pic12f1822.h: 2276: } DACCON1bits_t;
794[; ;pic12f1822.h: 2277: extern volatile DACCON1bits_t DACCON1bits @ 0x119;
795[; ;pic12f1822.h: 2311: extern volatile unsigned char SRCON0 @ 0x11A;
796"2313
797[; ;pic12f1822.h: 2313: asm("SRCON0 equ 011Ah");
798[; <" SRCON0 equ 011Ah ;# ">
799[; ;pic12f1822.h: 2316: typedef union {
800[; ;pic12f1822.h: 2317: struct {
801[; ;pic12f1822.h: 2318: unsigned SRPR :1;
802[; ;pic12f1822.h: 2319: unsigned SRPS :1;
803[; ;pic12f1822.h: 2320: unsigned SRNQEN :1;
804[; ;pic12f1822.h: 2321: unsigned SRQEN :1;
805[; ;pic12f1822.h: 2322: unsigned SRCLK0 :1;
806[; ;pic12f1822.h: 2323: unsigned SRCLK1 :1;
807[; ;pic12f1822.h: 2324: unsigned SRCLK2 :1;
808[; ;pic12f1822.h: 2325: unsigned SRLEN :1;
809[; ;pic12f1822.h: 2326: };
810[; ;pic12f1822.h: 2327: struct {
811[; ;pic12f1822.h: 2328: unsigned :4;
812[; ;pic12f1822.h: 2329: unsigned SRCLK :3;
813[; ;pic12f1822.h: 2330: };
814[; ;pic12f1822.h: 2331: } SRCON0bits_t;
815[; ;pic12f1822.h: 2332: extern volatile SRCON0bits_t SRCON0bits @ 0x11A;
816[; ;pic12f1822.h: 2381: extern volatile unsigned char SRCON1 @ 0x11B;
817"2383
818[; ;pic12f1822.h: 2383: asm("SRCON1 equ 011Bh");
819[; <" SRCON1 equ 011Bh ;# ">
820[; ;pic12f1822.h: 2386: typedef union {
821[; ;pic12f1822.h: 2387: struct {
822[; ;pic12f1822.h: 2388: unsigned SRRC1E :1;
823[; ;pic12f1822.h: 2389: unsigned :1;
824[; ;pic12f1822.h: 2390: unsigned SRRCKE :1;
825[; ;pic12f1822.h: 2391: unsigned SRRPE :1;
826[; ;pic12f1822.h: 2392: unsigned SRSC1E :1;
827[; ;pic12f1822.h: 2393: unsigned :1;
828[; ;pic12f1822.h: 2394: unsigned SRSCKE :1;
829[; ;pic12f1822.h: 2395: unsigned SRSPE :1;
830[; ;pic12f1822.h: 2396: };
831[; ;pic12f1822.h: 2397: } SRCON1bits_t;
832[; ;pic12f1822.h: 2398: extern volatile SRCON1bits_t SRCON1bits @ 0x11B;
833[; ;pic12f1822.h: 2432: extern volatile unsigned char APFCON @ 0x11D;
834"2434
835[; ;pic12f1822.h: 2434: asm("APFCON equ 011Dh");
836[; <" APFCON equ 011Dh ;# ">
837[; ;pic12f1822.h: 2437: extern volatile unsigned char APFCON0 @ 0x11D;
838"2439
839[; ;pic12f1822.h: 2439: asm("APFCON0 equ 011Dh");
840[; <" APFCON0 equ 011Dh ;# ">
841[; ;pic12f1822.h: 2442: typedef union {
842[; ;pic12f1822.h: 2443: struct {
843[; ;pic12f1822.h: 2444: unsigned CCP1SEL :1;
844[; ;pic12f1822.h: 2445: unsigned P1BSEL :1;
845[; ;pic12f1822.h: 2446: unsigned TXCKSEL :1;
846[; ;pic12f1822.h: 2447: unsigned T1GSEL :1;
847[; ;pic12f1822.h: 2448: unsigned :1;
848[; ;pic12f1822.h: 2449: unsigned SSSEL :1;
849[; ;pic12f1822.h: 2450: unsigned SDOSEL :1;
850[; ;pic12f1822.h: 2451: unsigned RXDTSEL :1;
851[; ;pic12f1822.h: 2452: };
852[; ;pic12f1822.h: 2453: struct {
853[; ;pic12f1822.h: 2454: unsigned :5;
854[; ;pic12f1822.h: 2455: unsigned SS1SEL :1;
855[; ;pic12f1822.h: 2456: unsigned SDO1SEL :1;
856[; ;pic12f1822.h: 2457: };
857[; ;pic12f1822.h: 2458: } APFCONbits_t;
858[; ;pic12f1822.h: 2459: extern volatile APFCONbits_t APFCONbits @ 0x11D;
859[; ;pic12f1822.h: 2507: typedef union {
860[; ;pic12f1822.h: 2508: struct {
861[; ;pic12f1822.h: 2509: unsigned CCP1SEL :1;
862[; ;pic12f1822.h: 2510: unsigned P1BSEL :1;
863[; ;pic12f1822.h: 2511: unsigned TXCKSEL :1;
864[; ;pic12f1822.h: 2512: unsigned T1GSEL :1;
865[; ;pic12f1822.h: 2513: unsigned :1;
866[; ;pic12f1822.h: 2514: unsigned SSSEL :1;
867[; ;pic12f1822.h: 2515: unsigned SDOSEL :1;
868[; ;pic12f1822.h: 2516: unsigned RXDTSEL :1;
869[; ;pic12f1822.h: 2517: };
870[; ;pic12f1822.h: 2518: struct {
871[; ;pic12f1822.h: 2519: unsigned :5;
872[; ;pic12f1822.h: 2520: unsigned SS1SEL :1;
873[; ;pic12f1822.h: 2521: unsigned SDO1SEL :1;
874[; ;pic12f1822.h: 2522: };
875[; ;pic12f1822.h: 2523: } APFCON0bits_t;
876[; ;pic12f1822.h: 2524: extern volatile APFCON0bits_t APFCON0bits @ 0x11D;
877[; ;pic12f1822.h: 2573: extern volatile unsigned char ANSELA @ 0x18C;
878"2575
879[; ;pic12f1822.h: 2575: asm("ANSELA equ 018Ch");
880[; <" ANSELA equ 018Ch ;# ">
881[; ;pic12f1822.h: 2578: typedef union {
882[; ;pic12f1822.h: 2579: struct {
883[; ;pic12f1822.h: 2580: unsigned ANSA0 :1;
884[; ;pic12f1822.h: 2581: unsigned ANSA1 :1;
885[; ;pic12f1822.h: 2582: unsigned ANSA2 :1;
886[; ;pic12f1822.h: 2583: unsigned :1;
887[; ;pic12f1822.h: 2584: unsigned ANSA4 :1;
888[; ;pic12f1822.h: 2585: };
889[; ;pic12f1822.h: 2586: struct {
890[; ;pic12f1822.h: 2587: unsigned ANSELA :5;
891[; ;pic12f1822.h: 2588: };
892[; ;pic12f1822.h: 2589: } ANSELAbits_t;
893[; ;pic12f1822.h: 2590: extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
894[; ;pic12f1822.h: 2619: extern volatile unsigned short EEADR @ 0x191;
895"2621
896[; ;pic12f1822.h: 2621: asm("EEADR equ 0191h");
897[; <" EEADR equ 0191h ;# ">
898[; ;pic12f1822.h: 2625: extern volatile unsigned char EEADRL @ 0x191;
899"2627
900[; ;pic12f1822.h: 2627: asm("EEADRL equ 0191h");
901[; <" EEADRL equ 0191h ;# ">
902[; ;pic12f1822.h: 2630: typedef union {
903[; ;pic12f1822.h: 2631: struct {
904[; ;pic12f1822.h: 2632: unsigned EEADRL :8;
905[; ;pic12f1822.h: 2633: };
906[; ;pic12f1822.h: 2634: } EEADRLbits_t;
907[; ;pic12f1822.h: 2635: extern volatile EEADRLbits_t EEADRLbits @ 0x191;
908[; ;pic12f1822.h: 2644: extern volatile unsigned char EEADRH @ 0x192;
909"2646
910[; ;pic12f1822.h: 2646: asm("EEADRH equ 0192h");
911[; <" EEADRH equ 0192h ;# ">
912[; ;pic12f1822.h: 2649: typedef union {
913[; ;pic12f1822.h: 2650: struct {
914[; ;pic12f1822.h: 2651: unsigned EEADRH :7;
915[; ;pic12f1822.h: 2652: };
916[; ;pic12f1822.h: 2653: } EEADRHbits_t;
917[; ;pic12f1822.h: 2654: extern volatile EEADRHbits_t EEADRHbits @ 0x192;
918[; ;pic12f1822.h: 2663: extern volatile unsigned short EEDAT @ 0x193;
919"2665
920[; ;pic12f1822.h: 2665: asm("EEDAT equ 0193h");
921[; <" EEDAT equ 0193h ;# ">
922[; ;pic12f1822.h: 2669: extern volatile unsigned char EEDATL @ 0x193;
923"2671
924[; ;pic12f1822.h: 2671: asm("EEDATL equ 0193h");
925[; <" EEDATL equ 0193h ;# ">
926[; ;pic12f1822.h: 2674: extern volatile unsigned char EEDATA @ 0x193;
927"2676
928[; ;pic12f1822.h: 2676: asm("EEDATA equ 0193h");
929[; <" EEDATA equ 0193h ;# ">
930[; ;pic12f1822.h: 2679: typedef union {
931[; ;pic12f1822.h: 2680: struct {
932[; ;pic12f1822.h: 2681: unsigned EEDATL :8;
933[; ;pic12f1822.h: 2682: };
934[; ;pic12f1822.h: 2683: } EEDATLbits_t;
935[; ;pic12f1822.h: 2684: extern volatile EEDATLbits_t EEDATLbits @ 0x193;
936[; ;pic12f1822.h: 2692: typedef union {
937[; ;pic12f1822.h: 2693: struct {
938[; ;pic12f1822.h: 2694: unsigned EEDATL :8;
939[; ;pic12f1822.h: 2695: };
940[; ;pic12f1822.h: 2696: } EEDATAbits_t;
941[; ;pic12f1822.h: 2697: extern volatile EEDATAbits_t EEDATAbits @ 0x193;
942[; ;pic12f1822.h: 2706: extern volatile unsigned char EEDATH @ 0x194;
943"2708
944[; ;pic12f1822.h: 2708: asm("EEDATH equ 0194h");
945[; <" EEDATH equ 0194h ;# ">
946[; ;pic12f1822.h: 2711: typedef union {
947[; ;pic12f1822.h: 2712: struct {
948[; ;pic12f1822.h: 2713: unsigned EEDATH :6;
949[; ;pic12f1822.h: 2714: };
950[; ;pic12f1822.h: 2715: } EEDATHbits_t;
951[; ;pic12f1822.h: 2716: extern volatile EEDATHbits_t EEDATHbits @ 0x194;
952[; ;pic12f1822.h: 2725: extern volatile unsigned char EECON1 @ 0x195;
953"2727
954[; ;pic12f1822.h: 2727: asm("EECON1 equ 0195h");
955[; <" EECON1 equ 0195h ;# ">
956[; ;pic12f1822.h: 2730: typedef union {
957[; ;pic12f1822.h: 2731: struct {
958[; ;pic12f1822.h: 2732: unsigned RD :1;
959[; ;pic12f1822.h: 2733: unsigned WR :1;
960[; ;pic12f1822.h: 2734: unsigned WREN :1;
961[; ;pic12f1822.h: 2735: unsigned WRERR :1;
962[; ;pic12f1822.h: 2736: unsigned FREE :1;
963[; ;pic12f1822.h: 2737: unsigned LWLO :1;
964[; ;pic12f1822.h: 2738: unsigned CFGS :1;
965[; ;pic12f1822.h: 2739: unsigned EEPGD :1;
966[; ;pic12f1822.h: 2740: };
967[; ;pic12f1822.h: 2741: } EECON1bits_t;
968[; ;pic12f1822.h: 2742: extern volatile EECON1bits_t EECON1bits @ 0x195;
969[; ;pic12f1822.h: 2786: extern volatile unsigned char EECON2 @ 0x196;
970"2788
971[; ;pic12f1822.h: 2788: asm("EECON2 equ 0196h");
972[; <" EECON2 equ 0196h ;# ">
973[; ;pic12f1822.h: 2791: typedef union {
974[; ;pic12f1822.h: 2792: struct {
975[; ;pic12f1822.h: 2793: unsigned EECON2 :8;
976[; ;pic12f1822.h: 2794: };
977[; ;pic12f1822.h: 2795: } EECON2bits_t;
978[; ;pic12f1822.h: 2796: extern volatile EECON2bits_t EECON2bits @ 0x196;
979[; ;pic12f1822.h: 2805: extern volatile unsigned char RCREG @ 0x199;
980"2807
981[; ;pic12f1822.h: 2807: asm("RCREG equ 0199h");
982[; <" RCREG equ 0199h ;# ">
983[; ;pic12f1822.h: 2810: typedef union {
984[; ;pic12f1822.h: 2811: struct {
985[; ;pic12f1822.h: 2812: unsigned RCREG :8;
986[; ;pic12f1822.h: 2813: };
987[; ;pic12f1822.h: 2814: } RCREGbits_t;
988[; ;pic12f1822.h: 2815: extern volatile RCREGbits_t RCREGbits @ 0x199;
989[; ;pic12f1822.h: 2824: extern volatile unsigned char TXREG @ 0x19A;
990"2826
991[; ;pic12f1822.h: 2826: asm("TXREG equ 019Ah");
992[; <" TXREG equ 019Ah ;# ">
993[; ;pic12f1822.h: 2829: typedef union {
994[; ;pic12f1822.h: 2830: struct {
995[; ;pic12f1822.h: 2831: unsigned TXREG :8;
996[; ;pic12f1822.h: 2832: };
997[; ;pic12f1822.h: 2833: } TXREGbits_t;
998[; ;pic12f1822.h: 2834: extern volatile TXREGbits_t TXREGbits @ 0x19A;
999[; ;pic12f1822.h: 2843: extern volatile unsigned char SPBRGL @ 0x19B;
1000"2845
1001[; ;pic12f1822.h: 2845: asm("SPBRGL equ 019Bh");
1002[; <" SPBRGL equ 019Bh ;# ">
1003[; ;pic12f1822.h: 2848: extern volatile unsigned char SPBRG @ 0x19B;
1004"2850
1005[; ;pic12f1822.h: 2850: asm("SPBRG equ 019Bh");
1006[; <" SPBRG equ 019Bh ;# ">
1007[; ;pic12f1822.h: 2853: typedef union {
1008[; ;pic12f1822.h: 2854: struct {
1009[; ;pic12f1822.h: 2855: unsigned SPBRGL :8;
1010[; ;pic12f1822.h: 2856: };
1011[; ;pic12f1822.h: 2857: } SPBRGLbits_t;
1012[; ;pic12f1822.h: 2858: extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
1013[; ;pic12f1822.h: 2866: typedef union {
1014[; ;pic12f1822.h: 2867: struct {
1015[; ;pic12f1822.h: 2868: unsigned SPBRGL :8;
1016[; ;pic12f1822.h: 2869: };
1017[; ;pic12f1822.h: 2870: } SPBRGbits_t;
1018[; ;pic12f1822.h: 2871: extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
1019[; ;pic12f1822.h: 2880: extern volatile unsigned char SPBRGH @ 0x19C;
1020"2882
1021[; ;pic12f1822.h: 2882: asm("SPBRGH equ 019Ch");
1022[; <" SPBRGH equ 019Ch ;# ">
1023[; ;pic12f1822.h: 2885: typedef union {
1024[; ;pic12f1822.h: 2886: struct {
1025[; ;pic12f1822.h: 2887: unsigned SPBRGH :8;
1026[; ;pic12f1822.h: 2888: };
1027[; ;pic12f1822.h: 2889: } SPBRGHbits_t;
1028[; ;pic12f1822.h: 2890: extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
1029[; ;pic12f1822.h: 2899: extern volatile unsigned char RCSTA @ 0x19D;
1030"2901
1031[; ;pic12f1822.h: 2901: asm("RCSTA equ 019Dh");
1032[; <" RCSTA equ 019Dh ;# ">
1033[; ;pic12f1822.h: 2904: typedef union {
1034[; ;pic12f1822.h: 2905: struct {
1035[; ;pic12f1822.h: 2906: unsigned RX9D :1;
1036[; ;pic12f1822.h: 2907: unsigned OERR :1;
1037[; ;pic12f1822.h: 2908: unsigned FERR :1;
1038[; ;pic12f1822.h: 2909: unsigned ADDEN :1;
1039[; ;pic12f1822.h: 2910: unsigned CREN :1;
1040[; ;pic12f1822.h: 2911: unsigned SREN :1;
1041[; ;pic12f1822.h: 2912: unsigned RX9 :1;
1042[; ;pic12f1822.h: 2913: unsigned SPEN :1;
1043[; ;pic12f1822.h: 2914: };
1044[; ;pic12f1822.h: 2915: } RCSTAbits_t;
1045[; ;pic12f1822.h: 2916: extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
1046[; ;pic12f1822.h: 2960: extern volatile unsigned char TXSTA @ 0x19E;
1047"2962
1048[; ;pic12f1822.h: 2962: asm("TXSTA equ 019Eh");
1049[; <" TXSTA equ 019Eh ;# ">
1050[; ;pic12f1822.h: 2965: typedef union {
1051[; ;pic12f1822.h: 2966: struct {
1052[; ;pic12f1822.h: 2967: unsigned TX9D :1;
1053[; ;pic12f1822.h: 2968: unsigned TRMT :1;
1054[; ;pic12f1822.h: 2969: unsigned BRGH :1;
1055[; ;pic12f1822.h: 2970: unsigned SENDB :1;
1056[; ;pic12f1822.h: 2971: unsigned SYNC :1;
1057[; ;pic12f1822.h: 2972: unsigned TXEN :1;
1058[; ;pic12f1822.h: 2973: unsigned TX9 :1;
1059[; ;pic12f1822.h: 2974: unsigned CSRC :1;
1060[; ;pic12f1822.h: 2975: };
1061[; ;pic12f1822.h: 2976: } TXSTAbits_t;
1062[; ;pic12f1822.h: 2977: extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
1063[; ;pic12f1822.h: 3021: extern volatile unsigned char BAUDCON @ 0x19F;
1064"3023
1065[; ;pic12f1822.h: 3023: asm("BAUDCON equ 019Fh");
1066[; <" BAUDCON equ 019Fh ;# ">
1067[; ;pic12f1822.h: 3026: typedef union {
1068[; ;pic12f1822.h: 3027: struct {
1069[; ;pic12f1822.h: 3028: unsigned ABDEN :1;
1070[; ;pic12f1822.h: 3029: unsigned WUE :1;
1071[; ;pic12f1822.h: 3030: unsigned :1;
1072[; ;pic12f1822.h: 3031: unsigned BRG16 :1;
1073[; ;pic12f1822.h: 3032: unsigned SCKP :1;
1074[; ;pic12f1822.h: 3033: unsigned :1;
1075[; ;pic12f1822.h: 3034: unsigned RCIDL :1;
1076[; ;pic12f1822.h: 3035: unsigned ABDOVF :1;
1077[; ;pic12f1822.h: 3036: };
1078[; ;pic12f1822.h: 3037: } BAUDCONbits_t;
1079[; ;pic12f1822.h: 3038: extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
1080[; ;pic12f1822.h: 3072: extern volatile unsigned char WPUA @ 0x20C;
1081"3074
1082[; ;pic12f1822.h: 3074: asm("WPUA equ 020Ch");
1083[; <" WPUA equ 020Ch ;# ">
1084[; ;pic12f1822.h: 3077: typedef union {
1085[; ;pic12f1822.h: 3078: struct {
1086[; ;pic12f1822.h: 3079: unsigned WPUA0 :1;
1087[; ;pic12f1822.h: 3080: unsigned WPUA1 :1;
1088[; ;pic12f1822.h: 3081: unsigned WPUA2 :1;
1089[; ;pic12f1822.h: 3082: unsigned WPUA3 :1;
1090[; ;pic12f1822.h: 3083: unsigned WPUA4 :1;
1091[; ;pic12f1822.h: 3084: unsigned WPUA5 :1;
1092[; ;pic12f1822.h: 3085: };
1093[; ;pic12f1822.h: 3086: struct {
1094[; ;pic12f1822.h: 3087: unsigned WPUA :6;
1095[; ;pic12f1822.h: 3088: };
1096[; ;pic12f1822.h: 3089: } WPUAbits_t;
1097[; ;pic12f1822.h: 3090: extern volatile WPUAbits_t WPUAbits @ 0x20C;
1098[; ;pic12f1822.h: 3129: extern volatile unsigned char SSP1BUF @ 0x211;
1099"3131
1100[; ;pic12f1822.h: 3131: asm("SSP1BUF equ 0211h");
1101[; <" SSP1BUF equ 0211h ;# ">
1102[; ;pic12f1822.h: 3134: extern volatile unsigned char SSPBUF @ 0x211;
1103"3136
1104[; ;pic12f1822.h: 3136: asm("SSPBUF equ 0211h");
1105[; <" SSPBUF equ 0211h ;# ">
1106[; ;pic12f1822.h: 3139: typedef union {
1107[; ;pic12f1822.h: 3140: struct {
1108[; ;pic12f1822.h: 3141: unsigned SSPBUF :8;
1109[; ;pic12f1822.h: 3142: };
1110[; ;pic12f1822.h: 3143: } SSP1BUFbits_t;
1111[; ;pic12f1822.h: 3144: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
1112[; ;pic12f1822.h: 3152: typedef union {
1113[; ;pic12f1822.h: 3153: struct {
1114[; ;pic12f1822.h: 3154: unsigned SSPBUF :8;
1115[; ;pic12f1822.h: 3155: };
1116[; ;pic12f1822.h: 3156: } SSPBUFbits_t;
1117[; ;pic12f1822.h: 3157: extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
1118[; ;pic12f1822.h: 3166: extern volatile unsigned char SSP1ADD @ 0x212;
1119"3168
1120[; ;pic12f1822.h: 3168: asm("SSP1ADD equ 0212h");
1121[; <" SSP1ADD equ 0212h ;# ">
1122[; ;pic12f1822.h: 3171: extern volatile unsigned char SSPADD @ 0x212;
1123"3173
1124[; ;pic12f1822.h: 3173: asm("SSPADD equ 0212h");
1125[; <" SSPADD equ 0212h ;# ">
1126[; ;pic12f1822.h: 3176: typedef union {
1127[; ;pic12f1822.h: 3177: struct {
1128[; ;pic12f1822.h: 3178: unsigned SSPADD :8;
1129[; ;pic12f1822.h: 3179: };
1130[; ;pic12f1822.h: 3180: } SSP1ADDbits_t;
1131[; ;pic12f1822.h: 3181: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
1132[; ;pic12f1822.h: 3189: typedef union {
1133[; ;pic12f1822.h: 3190: struct {
1134[; ;pic12f1822.h: 3191: unsigned SSPADD :8;
1135[; ;pic12f1822.h: 3192: };
1136[; ;pic12f1822.h: 3193: } SSPADDbits_t;
1137[; ;pic12f1822.h: 3194: extern volatile SSPADDbits_t SSPADDbits @ 0x212;
1138[; ;pic12f1822.h: 3203: extern volatile unsigned char SSP1MSK @ 0x213;
1139"3205
1140[; ;pic12f1822.h: 3205: asm("SSP1MSK equ 0213h");
1141[; <" SSP1MSK equ 0213h ;# ">
1142[; ;pic12f1822.h: 3208: extern volatile unsigned char SSPMSK @ 0x213;
1143"3210
1144[; ;pic12f1822.h: 3210: asm("SSPMSK equ 0213h");
1145[; <" SSPMSK equ 0213h ;# ">
1146[; ;pic12f1822.h: 3213: typedef union {
1147[; ;pic12f1822.h: 3214: struct {
1148[; ;pic12f1822.h: 3215: unsigned SSPMSK :8;
1149[; ;pic12f1822.h: 3216: };
1150[; ;pic12f1822.h: 3217: } SSP1MSKbits_t;
1151[; ;pic12f1822.h: 3218: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
1152[; ;pic12f1822.h: 3226: typedef union {
1153[; ;pic12f1822.h: 3227: struct {
1154[; ;pic12f1822.h: 3228: unsigned SSPMSK :8;
1155[; ;pic12f1822.h: 3229: };
1156[; ;pic12f1822.h: 3230: } SSPMSKbits_t;
1157[; ;pic12f1822.h: 3231: extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
1158[; ;pic12f1822.h: 3240: extern volatile unsigned char SSP1STAT @ 0x214;
1159"3242
1160[; ;pic12f1822.h: 3242: asm("SSP1STAT equ 0214h");
1161[; <" SSP1STAT equ 0214h ;# ">
1162[; ;pic12f1822.h: 3245: extern volatile unsigned char SSPSTAT @ 0x214;
1163"3247
1164[; ;pic12f1822.h: 3247: asm("SSPSTAT equ 0214h");
1165[; <" SSPSTAT equ 0214h ;# ">
1166[; ;pic12f1822.h: 3250: typedef union {
1167[; ;pic12f1822.h: 3251: struct {
1168[; ;pic12f1822.h: 3252: unsigned BF :1;
1169[; ;pic12f1822.h: 3253: unsigned UA :1;
1170[; ;pic12f1822.h: 3254: unsigned R_nW :1;
1171[; ;pic12f1822.h: 3255: unsigned S :1;
1172[; ;pic12f1822.h: 3256: unsigned P :1;
1173[; ;pic12f1822.h: 3257: unsigned D_nA :1;
1174[; ;pic12f1822.h: 3258: unsigned CKE :1;
1175[; ;pic12f1822.h: 3259: unsigned SMP :1;
1176[; ;pic12f1822.h: 3260: };
1177[; ;pic12f1822.h: 3261: } SSP1STATbits_t;
1178[; ;pic12f1822.h: 3262: extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
1179[; ;pic12f1822.h: 3305: typedef union {
1180[; ;pic12f1822.h: 3306: struct {
1181[; ;pic12f1822.h: 3307: unsigned BF :1;
1182[; ;pic12f1822.h: 3308: unsigned UA :1;
1183[; ;pic12f1822.h: 3309: unsigned R_nW :1;
1184[; ;pic12f1822.h: 3310: unsigned S :1;
1185[; ;pic12f1822.h: 3311: unsigned P :1;
1186[; ;pic12f1822.h: 3312: unsigned D_nA :1;
1187[; ;pic12f1822.h: 3313: unsigned CKE :1;
1188[; ;pic12f1822.h: 3314: unsigned SMP :1;
1189[; ;pic12f1822.h: 3315: };
1190[; ;pic12f1822.h: 3316: } SSPSTATbits_t;
1191[; ;pic12f1822.h: 3317: extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
1192[; ;pic12f1822.h: 3361: extern volatile unsigned char SSP1CON1 @ 0x215;
1193"3363
1194[; ;pic12f1822.h: 3363: asm("SSP1CON1 equ 0215h");
1195[; <" SSP1CON1 equ 0215h ;# ">
1196[; ;pic12f1822.h: 3366: extern volatile unsigned char SSPCON1 @ 0x215;
1197"3368
1198[; ;pic12f1822.h: 3368: asm("SSPCON1 equ 0215h");
1199[; <" SSPCON1 equ 0215h ;# ">
1200[; ;pic12f1822.h: 3370: extern volatile unsigned char SSPCON @ 0x215;
1201"3372
1202[; ;pic12f1822.h: 3372: asm("SSPCON equ 0215h");
1203[; <" SSPCON equ 0215h ;# ">
1204[; ;pic12f1822.h: 3375: typedef union {
1205[; ;pic12f1822.h: 3376: struct {
1206[; ;pic12f1822.h: 3377: unsigned SSPM0 :1;
1207[; ;pic12f1822.h: 3378: unsigned SSPM1 :1;
1208[; ;pic12f1822.h: 3379: unsigned SSPM2 :1;
1209[; ;pic12f1822.h: 3380: unsigned SSPM3 :1;
1210[; ;pic12f1822.h: 3381: unsigned CKP :1;
1211[; ;pic12f1822.h: 3382: unsigned SSPEN :1;
1212[; ;pic12f1822.h: 3383: unsigned SSPOV :1;
1213[; ;pic12f1822.h: 3384: unsigned WCOL :1;
1214[; ;pic12f1822.h: 3385: };
1215[; ;pic12f1822.h: 3386: struct {
1216[; ;pic12f1822.h: 3387: unsigned SSPM :4;
1217[; ;pic12f1822.h: 3388: };
1218[; ;pic12f1822.h: 3389: } SSP1CON1bits_t;
1219[; ;pic12f1822.h: 3390: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
1220[; ;pic12f1822.h: 3438: typedef union {
1221[; ;pic12f1822.h: 3439: struct {
1222[; ;pic12f1822.h: 3440: unsigned SSPM0 :1;
1223[; ;pic12f1822.h: 3441: unsigned SSPM1 :1;
1224[; ;pic12f1822.h: 3442: unsigned SSPM2 :1;
1225[; ;pic12f1822.h: 3443: unsigned SSPM3 :1;
1226[; ;pic12f1822.h: 3444: unsigned CKP :1;
1227[; ;pic12f1822.h: 3445: unsigned SSPEN :1;
1228[; ;pic12f1822.h: 3446: unsigned SSPOV :1;
1229[; ;pic12f1822.h: 3447: unsigned WCOL :1;
1230[; ;pic12f1822.h: 3448: };
1231[; ;pic12f1822.h: 3449: struct {
1232[; ;pic12f1822.h: 3450: unsigned SSPM :4;
1233[; ;pic12f1822.h: 3451: };
1234[; ;pic12f1822.h: 3452: } SSPCON1bits_t;
1235[; ;pic12f1822.h: 3453: extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
1236[; ;pic12f1822.h: 3500: typedef union {
1237[; ;pic12f1822.h: 3501: struct {
1238[; ;pic12f1822.h: 3502: unsigned SSPM0 :1;
1239[; ;pic12f1822.h: 3503: unsigned SSPM1 :1;
1240[; ;pic12f1822.h: 3504: unsigned SSPM2 :1;
1241[; ;pic12f1822.h: 3505: unsigned SSPM3 :1;
1242[; ;pic12f1822.h: 3506: unsigned CKP :1;
1243[; ;pic12f1822.h: 3507: unsigned SSPEN :1;
1244[; ;pic12f1822.h: 3508: unsigned SSPOV :1;
1245[; ;pic12f1822.h: 3509: unsigned WCOL :1;
1246[; ;pic12f1822.h: 3510: };
1247[; ;pic12f1822.h: 3511: struct {
1248[; ;pic12f1822.h: 3512: unsigned SSPM :4;
1249[; ;pic12f1822.h: 3513: };
1250[; ;pic12f1822.h: 3514: } SSPCONbits_t;
1251[; ;pic12f1822.h: 3515: extern volatile SSPCONbits_t SSPCONbits @ 0x215;
1252[; ;pic12f1822.h: 3564: extern volatile unsigned char SSP1CON2 @ 0x216;
1253"3566
1254[; ;pic12f1822.h: 3566: asm("SSP1CON2 equ 0216h");
1255[; <" SSP1CON2 equ 0216h ;# ">
1256[; ;pic12f1822.h: 3569: extern volatile unsigned char SSPCON2 @ 0x216;
1257"3571
1258[; ;pic12f1822.h: 3571: asm("SSPCON2 equ 0216h");
1259[; <" SSPCON2 equ 0216h ;# ">
1260[; ;pic12f1822.h: 3574: typedef union {
1261[; ;pic12f1822.h: 3575: struct {
1262[; ;pic12f1822.h: 3576: unsigned SEN :1;
1263[; ;pic12f1822.h: 3577: unsigned RSEN :1;
1264[; ;pic12f1822.h: 3578: unsigned PEN :1;
1265[; ;pic12f1822.h: 3579: unsigned RCEN :1;
1266[; ;pic12f1822.h: 3580: unsigned ACKEN :1;
1267[; ;pic12f1822.h: 3581: unsigned ACKDT :1;
1268[; ;pic12f1822.h: 3582: unsigned ACKSTAT :1;
1269[; ;pic12f1822.h: 3583: unsigned GCEN :1;
1270[; ;pic12f1822.h: 3584: };
1271[; ;pic12f1822.h: 3585: } SSP1CON2bits_t;
1272[; ;pic12f1822.h: 3586: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
1273[; ;pic12f1822.h: 3629: typedef union {
1274[; ;pic12f1822.h: 3630: struct {
1275[; ;pic12f1822.h: 3631: unsigned SEN :1;
1276[; ;pic12f1822.h: 3632: unsigned RSEN :1;
1277[; ;pic12f1822.h: 3633: unsigned PEN :1;
1278[; ;pic12f1822.h: 3634: unsigned RCEN :1;
1279[; ;pic12f1822.h: 3635: unsigned ACKEN :1;
1280[; ;pic12f1822.h: 3636: unsigned ACKDT :1;
1281[; ;pic12f1822.h: 3637: unsigned ACKSTAT :1;
1282[; ;pic12f1822.h: 3638: unsigned GCEN :1;
1283[; ;pic12f1822.h: 3639: };
1284[; ;pic12f1822.h: 3640: } SSPCON2bits_t;
1285[; ;pic12f1822.h: 3641: extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
1286[; ;pic12f1822.h: 3685: extern volatile unsigned char SSP1CON3 @ 0x217;
1287"3687
1288[; ;pic12f1822.h: 3687: asm("SSP1CON3 equ 0217h");
1289[; <" SSP1CON3 equ 0217h ;# ">
1290[; ;pic12f1822.h: 3690: extern volatile unsigned char SSPCON3 @ 0x217;
1291"3692
1292[; ;pic12f1822.h: 3692: asm("SSPCON3 equ 0217h");
1293[; <" SSPCON3 equ 0217h ;# ">
1294[; ;pic12f1822.h: 3695: typedef union {
1295[; ;pic12f1822.h: 3696: struct {
1296[; ;pic12f1822.h: 3697: unsigned DHEN :1;
1297[; ;pic12f1822.h: 3698: unsigned AHEN :1;
1298[; ;pic12f1822.h: 3699: unsigned SBCDE :1;
1299[; ;pic12f1822.h: 3700: unsigned SDAHT :1;
1300[; ;pic12f1822.h: 3701: unsigned BOEN :1;
1301[; ;pic12f1822.h: 3702: unsigned SCIE :1;
1302[; ;pic12f1822.h: 3703: unsigned PCIE :1;
1303[; ;pic12f1822.h: 3704: unsigned ACKTIM :1;
1304[; ;pic12f1822.h: 3705: };
1305[; ;pic12f1822.h: 3706: } SSP1CON3bits_t;
1306[; ;pic12f1822.h: 3707: extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
1307[; ;pic12f1822.h: 3750: typedef union {
1308[; ;pic12f1822.h: 3751: struct {
1309[; ;pic12f1822.h: 3752: unsigned DHEN :1;
1310[; ;pic12f1822.h: 3753: unsigned AHEN :1;
1311[; ;pic12f1822.h: 3754: unsigned SBCDE :1;
1312[; ;pic12f1822.h: 3755: unsigned SDAHT :1;
1313[; ;pic12f1822.h: 3756: unsigned BOEN :1;
1314[; ;pic12f1822.h: 3757: unsigned SCIE :1;
1315[; ;pic12f1822.h: 3758: unsigned PCIE :1;
1316[; ;pic12f1822.h: 3759: unsigned ACKTIM :1;
1317[; ;pic12f1822.h: 3760: };
1318[; ;pic12f1822.h: 3761: } SSPCON3bits_t;
1319[; ;pic12f1822.h: 3762: extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
1320[; ;pic12f1822.h: 3806: extern volatile unsigned char CCPR1L @ 0x291;
1321"3808
1322[; ;pic12f1822.h: 3808: asm("CCPR1L equ 0291h");
1323[; <" CCPR1L equ 0291h ;# ">
1324[; ;pic12f1822.h: 3811: typedef union {
1325[; ;pic12f1822.h: 3812: struct {
1326[; ;pic12f1822.h: 3813: unsigned CCPR1L :8;
1327[; ;pic12f1822.h: 3814: };
1328[; ;pic12f1822.h: 3815: } CCPR1Lbits_t;
1329[; ;pic12f1822.h: 3816: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
1330[; ;pic12f1822.h: 3825: extern volatile unsigned char CCPR1H @ 0x292;
1331"3827
1332[; ;pic12f1822.h: 3827: asm("CCPR1H equ 0292h");
1333[; <" CCPR1H equ 0292h ;# ">
1334[; ;pic12f1822.h: 3830: typedef union {
1335[; ;pic12f1822.h: 3831: struct {
1336[; ;pic12f1822.h: 3832: unsigned CCPR1H :8;
1337[; ;pic12f1822.h: 3833: };
1338[; ;pic12f1822.h: 3834: } CCPR1Hbits_t;
1339[; ;pic12f1822.h: 3835: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
1340[; ;pic12f1822.h: 3844: extern volatile unsigned char CCP1CON @ 0x293;
1341"3846
1342[; ;pic12f1822.h: 3846: asm("CCP1CON equ 0293h");
1343[; <" CCP1CON equ 0293h ;# ">
1344[; ;pic12f1822.h: 3849: typedef union {
1345[; ;pic12f1822.h: 3850: struct {
1346[; ;pic12f1822.h: 3851: unsigned CCP1M0 :1;
1347[; ;pic12f1822.h: 3852: unsigned CCP1M1 :1;
1348[; ;pic12f1822.h: 3853: unsigned CCP1M2 :1;
1349[; ;pic12f1822.h: 3854: unsigned CCP1M3 :1;
1350[; ;pic12f1822.h: 3855: unsigned DC1B0 :1;
1351[; ;pic12f1822.h: 3856: unsigned DC1B1 :1;
1352[; ;pic12f1822.h: 3857: unsigned P1M0 :1;
1353[; ;pic12f1822.h: 3858: unsigned P1M1 :1;
1354[; ;pic12f1822.h: 3859: };
1355[; ;pic12f1822.h: 3860: struct {
1356[; ;pic12f1822.h: 3861: unsigned CCP1M :4;
1357[; ;pic12f1822.h: 3862: unsigned DC1B :2;
1358[; ;pic12f1822.h: 3863: unsigned P1M :2;
1359[; ;pic12f1822.h: 3864: };
1360[; ;pic12f1822.h: 3865: } CCP1CONbits_t;
1361[; ;pic12f1822.h: 3866: extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
1362[; ;pic12f1822.h: 3925: extern volatile unsigned char PWM1CON @ 0x294;
1363"3927
1364[; ;pic12f1822.h: 3927: asm("PWM1CON equ 0294h");
1365[; <" PWM1CON equ 0294h ;# ">
1366[; ;pic12f1822.h: 3930: typedef union {
1367[; ;pic12f1822.h: 3931: struct {
1368[; ;pic12f1822.h: 3932: unsigned P1DC0 :1;
1369[; ;pic12f1822.h: 3933: unsigned P1DC1 :1;
1370[; ;pic12f1822.h: 3934: unsigned P1DC2 :1;
1371[; ;pic12f1822.h: 3935: unsigned P1DC3 :1;
1372[; ;pic12f1822.h: 3936: unsigned P1DC4 :1;
1373[; ;pic12f1822.h: 3937: unsigned P1DC5 :1;
1374[; ;pic12f1822.h: 3938: unsigned P1DC6 :1;
1375[; ;pic12f1822.h: 3939: unsigned P1RSEN :1;
1376[; ;pic12f1822.h: 3940: };
1377[; ;pic12f1822.h: 3941: struct {
1378[; ;pic12f1822.h: 3942: unsigned P1DC :7;
1379[; ;pic12f1822.h: 3943: };
1380[; ;pic12f1822.h: 3944: } PWM1CONbits_t;
1381[; ;pic12f1822.h: 3945: extern volatile PWM1CONbits_t PWM1CONbits @ 0x294;
1382[; ;pic12f1822.h: 3994: extern volatile unsigned char CCP1AS @ 0x295;
1383"3996
1384[; ;pic12f1822.h: 3996: asm("CCP1AS equ 0295h");
1385[; <" CCP1AS equ 0295h ;# ">
1386[; ;pic12f1822.h: 3999: extern volatile unsigned char ECCP1AS @ 0x295;
1387"4001
1388[; ;pic12f1822.h: 4001: asm("ECCP1AS equ 0295h");
1389[; <" ECCP1AS equ 0295h ;# ">
1390[; ;pic12f1822.h: 4004: typedef union {
1391[; ;pic12f1822.h: 4005: struct {
1392[; ;pic12f1822.h: 4006: unsigned PSS1BD0 :1;
1393[; ;pic12f1822.h: 4007: unsigned PSS1BD1 :1;
1394[; ;pic12f1822.h: 4008: unsigned PSS1AC0 :1;
1395[; ;pic12f1822.h: 4009: unsigned PSS1AC1 :1;
1396[; ;pic12f1822.h: 4010: unsigned CCP1AS0 :1;
1397[; ;pic12f1822.h: 4011: unsigned CCP1AS1 :1;
1398[; ;pic12f1822.h: 4012: unsigned CCP1AS2 :1;
1399[; ;pic12f1822.h: 4013: unsigned CCP1ASE :1;
1400[; ;pic12f1822.h: 4014: };
1401[; ;pic12f1822.h: 4015: struct {
1402[; ;pic12f1822.h: 4016: unsigned PSS1BD :2;
1403[; ;pic12f1822.h: 4017: unsigned PSS1AC :2;
1404[; ;pic12f1822.h: 4018: unsigned CCP1AS :3;
1405[; ;pic12f1822.h: 4019: };
1406[; ;pic12f1822.h: 4020: } CCP1ASbits_t;
1407[; ;pic12f1822.h: 4021: extern volatile CCP1ASbits_t CCP1ASbits @ 0x295;
1408[; ;pic12f1822.h: 4079: typedef union {
1409[; ;pic12f1822.h: 4080: struct {
1410[; ;pic12f1822.h: 4081: unsigned PSS1BD0 :1;
1411[; ;pic12f1822.h: 4082: unsigned PSS1BD1 :1;
1412[; ;pic12f1822.h: 4083: unsigned PSS1AC0 :1;
1413[; ;pic12f1822.h: 4084: unsigned PSS1AC1 :1;
1414[; ;pic12f1822.h: 4085: unsigned CCP1AS0 :1;
1415[; ;pic12f1822.h: 4086: unsigned CCP1AS1 :1;
1416[; ;pic12f1822.h: 4087: unsigned CCP1AS2 :1;
1417[; ;pic12f1822.h: 4088: unsigned CCP1ASE :1;
1418[; ;pic12f1822.h: 4089: };
1419[; ;pic12f1822.h: 4090: struct {
1420[; ;pic12f1822.h: 4091: unsigned PSS1BD :2;
1421[; ;pic12f1822.h: 4092: unsigned PSS1AC :2;
1422[; ;pic12f1822.h: 4093: unsigned CCP1AS :3;
1423[; ;pic12f1822.h: 4094: };
1424[; ;pic12f1822.h: 4095: } ECCP1ASbits_t;
1425[; ;pic12f1822.h: 4096: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0x295;
1426[; ;pic12f1822.h: 4155: extern volatile unsigned char PSTR1CON @ 0x296;
1427"4157
1428[; ;pic12f1822.h: 4157: asm("PSTR1CON equ 0296h");
1429[; <" PSTR1CON equ 0296h ;# ">
1430[; ;pic12f1822.h: 4160: typedef union {
1431[; ;pic12f1822.h: 4161: struct {
1432[; ;pic12f1822.h: 4162: unsigned STR1A :1;
1433[; ;pic12f1822.h: 4163: unsigned STR1B :1;
1434[; ;pic12f1822.h: 4164: unsigned STR1C :1;
1435[; ;pic12f1822.h: 4165: unsigned STR1D :1;
1436[; ;pic12f1822.h: 4166: unsigned STR1SYNC :1;
1437[; ;pic12f1822.h: 4167: };
1438[; ;pic12f1822.h: 4168: } PSTR1CONbits_t;
1439[; ;pic12f1822.h: 4169: extern volatile PSTR1CONbits_t PSTR1CONbits @ 0x296;
1440[; ;pic12f1822.h: 4198: extern volatile unsigned char IOCAP @ 0x391;
1441"4200
1442[; ;pic12f1822.h: 4200: asm("IOCAP equ 0391h");
1443[; <" IOCAP equ 0391h ;# ">
1444[; ;pic12f1822.h: 4203: typedef union {
1445[; ;pic12f1822.h: 4204: struct {
1446[; ;pic12f1822.h: 4205: unsigned IOCAP0 :1;
1447[; ;pic12f1822.h: 4206: unsigned IOCAP1 :1;
1448[; ;pic12f1822.h: 4207: unsigned IOCAP2 :1;
1449[; ;pic12f1822.h: 4208: unsigned IOCAP3 :1;
1450[; ;pic12f1822.h: 4209: unsigned IOCAP4 :1;
1451[; ;pic12f1822.h: 4210: unsigned IOCAP5 :1;
1452[; ;pic12f1822.h: 4211: };
1453[; ;pic12f1822.h: 4212: struct {
1454[; ;pic12f1822.h: 4213: unsigned IOCAP :6;
1455[; ;pic12f1822.h: 4214: };
1456[; ;pic12f1822.h: 4215: } IOCAPbits_t;
1457[; ;pic12f1822.h: 4216: extern volatile IOCAPbits_t IOCAPbits @ 0x391;
1458[; ;pic12f1822.h: 4255: extern volatile unsigned char IOCAN @ 0x392;
1459"4257
1460[; ;pic12f1822.h: 4257: asm("IOCAN equ 0392h");
1461[; <" IOCAN equ 0392h ;# ">
1462[; ;pic12f1822.h: 4260: typedef union {
1463[; ;pic12f1822.h: 4261: struct {
1464[; ;pic12f1822.h: 4262: unsigned IOCAN0 :1;
1465[; ;pic12f1822.h: 4263: unsigned IOCAN1 :1;
1466[; ;pic12f1822.h: 4264: unsigned IOCAN2 :1;
1467[; ;pic12f1822.h: 4265: unsigned IOCAN3 :1;
1468[; ;pic12f1822.h: 4266: unsigned IOCAN4 :1;
1469[; ;pic12f1822.h: 4267: unsigned IOCAN5 :1;
1470[; ;pic12f1822.h: 4268: };
1471[; ;pic12f1822.h: 4269: struct {
1472[; ;pic12f1822.h: 4270: unsigned IOCAN :6;
1473[; ;pic12f1822.h: 4271: };
1474[; ;pic12f1822.h: 4272: } IOCANbits_t;
1475[; ;pic12f1822.h: 4273: extern volatile IOCANbits_t IOCANbits @ 0x392;
1476[; ;pic12f1822.h: 4312: extern volatile unsigned char IOCAF @ 0x393;
1477"4314
1478[; ;pic12f1822.h: 4314: asm("IOCAF equ 0393h");
1479[; <" IOCAF equ 0393h ;# ">
1480[; ;pic12f1822.h: 4317: typedef union {
1481[; ;pic12f1822.h: 4318: struct {
1482[; ;pic12f1822.h: 4319: unsigned IOCAF0 :1;
1483[; ;pic12f1822.h: 4320: unsigned IOCAF1 :1;
1484[; ;pic12f1822.h: 4321: unsigned IOCAF2 :1;
1485[; ;pic12f1822.h: 4322: unsigned IOCAF3 :1;
1486[; ;pic12f1822.h: 4323: unsigned IOCAF4 :1;
1487[; ;pic12f1822.h: 4324: unsigned IOCAF5 :1;
1488[; ;pic12f1822.h: 4325: };
1489[; ;pic12f1822.h: 4326: struct {
1490[; ;pic12f1822.h: 4327: unsigned IOCAF :6;
1491[; ;pic12f1822.h: 4328: };
1492[; ;pic12f1822.h: 4329: } IOCAFbits_t;
1493[; ;pic12f1822.h: 4330: extern volatile IOCAFbits_t IOCAFbits @ 0x393;
1494[; ;pic12f1822.h: 4369: extern volatile unsigned char CLKRCON @ 0x39A;
1495"4371
1496[; ;pic12f1822.h: 4371: asm("CLKRCON equ 039Ah");
1497[; <" CLKRCON equ 039Ah ;# ">
1498[; ;pic12f1822.h: 4374: typedef union {
1499[; ;pic12f1822.h: 4375: struct {
1500[; ;pic12f1822.h: 4376: unsigned CLKRDIV0 :1;
1501[; ;pic12f1822.h: 4377: unsigned CLKRDIV1 :1;
1502[; ;pic12f1822.h: 4378: unsigned CLKRDIV2 :1;
1503[; ;pic12f1822.h: 4379: unsigned CLKRDC0 :1;
1504[; ;pic12f1822.h: 4380: unsigned CLKRDC1 :1;
1505[; ;pic12f1822.h: 4381: unsigned CLKRSLR :1;
1506[; ;pic12f1822.h: 4382: unsigned CLKROE :1;
1507[; ;pic12f1822.h: 4383: unsigned CLKREN :1;
1508[; ;pic12f1822.h: 4384: };
1509[; ;pic12f1822.h: 4385: struct {
1510[; ;pic12f1822.h: 4386: unsigned CLKRDIV :3;
1511[; ;pic12f1822.h: 4387: unsigned CLKRDC :2;
1512[; ;pic12f1822.h: 4388: };
1513[; ;pic12f1822.h: 4389: } CLKRCONbits_t;
1514[; ;pic12f1822.h: 4390: extern volatile CLKRCONbits_t CLKRCONbits @ 0x39A;
1515[; ;pic12f1822.h: 4444: extern volatile unsigned char MDCON @ 0x39C;
1516"4446
1517[; ;pic12f1822.h: 4446: asm("MDCON equ 039Ch");
1518[; <" MDCON equ 039Ch ;# ">
1519[; ;pic12f1822.h: 4449: typedef union {
1520[; ;pic12f1822.h: 4450: struct {
1521[; ;pic12f1822.h: 4451: unsigned MDBIT :1;
1522[; ;pic12f1822.h: 4452: unsigned :2;
1523[; ;pic12f1822.h: 4453: unsigned MDOUT :1;
1524[; ;pic12f1822.h: 4454: unsigned MDOPOL :1;
1525[; ;pic12f1822.h: 4455: unsigned MDSLR :1;
1526[; ;pic12f1822.h: 4456: unsigned MDOE :1;
1527[; ;pic12f1822.h: 4457: unsigned MDEN :1;
1528[; ;pic12f1822.h: 4458: };
1529[; ;pic12f1822.h: 4459: } MDCONbits_t;
1530[; ;pic12f1822.h: 4460: extern volatile MDCONbits_t MDCONbits @ 0x39C;
1531[; ;pic12f1822.h: 4494: extern volatile unsigned char MDSRC @ 0x39D;
1532"4496
1533[; ;pic12f1822.h: 4496: asm("MDSRC equ 039Dh");
1534[; <" MDSRC equ 039Dh ;# ">
1535[; ;pic12f1822.h: 4499: typedef union {
1536[; ;pic12f1822.h: 4500: struct {
1537[; ;pic12f1822.h: 4501: unsigned MDMS0 :1;
1538[; ;pic12f1822.h: 4502: unsigned MDMS1 :1;
1539[; ;pic12f1822.h: 4503: unsigned MDMS2 :1;
1540[; ;pic12f1822.h: 4504: unsigned MDMS3 :1;
1541[; ;pic12f1822.h: 4505: unsigned :3;
1542[; ;pic12f1822.h: 4506: unsigned MDMSODIS :1;
1543[; ;pic12f1822.h: 4507: };
1544[; ;pic12f1822.h: 4508: struct {
1545[; ;pic12f1822.h: 4509: unsigned MDMS :4;
1546[; ;pic12f1822.h: 4510: };
1547[; ;pic12f1822.h: 4511: } MDSRCbits_t;
1548[; ;pic12f1822.h: 4512: extern volatile MDSRCbits_t MDSRCbits @ 0x39D;
1549[; ;pic12f1822.h: 4546: extern volatile unsigned char MDCARL @ 0x39E;
1550"4548
1551[; ;pic12f1822.h: 4548: asm("MDCARL equ 039Eh");
1552[; <" MDCARL equ 039Eh ;# ">
1553[; ;pic12f1822.h: 4551: typedef union {
1554[; ;pic12f1822.h: 4552: struct {
1555[; ;pic12f1822.h: 4553: unsigned MDCL0 :1;
1556[; ;pic12f1822.h: 4554: unsigned MDCL1 :1;
1557[; ;pic12f1822.h: 4555: unsigned MDCL2 :1;
1558[; ;pic12f1822.h: 4556: unsigned MDCL3 :1;
1559[; ;pic12f1822.h: 4557: unsigned :1;
1560[; ;pic12f1822.h: 4558: unsigned MDCLSYNC :1;
1561[; ;pic12f1822.h: 4559: unsigned MDCLPOL :1;
1562[; ;pic12f1822.h: 4560: unsigned MDCLODIS :1;
1563[; ;pic12f1822.h: 4561: };
1564[; ;pic12f1822.h: 4562: struct {
1565[; ;pic12f1822.h: 4563: unsigned MDCL :4;
1566[; ;pic12f1822.h: 4564: };
1567[; ;pic12f1822.h: 4565: } MDCARLbits_t;
1568[; ;pic12f1822.h: 4566: extern volatile MDCARLbits_t MDCARLbits @ 0x39E;
1569[; ;pic12f1822.h: 4610: extern volatile unsigned char MDCARH @ 0x39F;
1570"4612
1571[; ;pic12f1822.h: 4612: asm("MDCARH equ 039Fh");
1572[; <" MDCARH equ 039Fh ;# ">
1573[; ;pic12f1822.h: 4615: typedef union {
1574[; ;pic12f1822.h: 4616: struct {
1575[; ;pic12f1822.h: 4617: unsigned MDCH0 :1;
1576[; ;pic12f1822.h: 4618: unsigned MDCH1 :1;
1577[; ;pic12f1822.h: 4619: unsigned MDCH2 :1;
1578[; ;pic12f1822.h: 4620: unsigned MDCH3 :1;
1579[; ;pic12f1822.h: 4621: unsigned :1;
1580[; ;pic12f1822.h: 4622: unsigned MDCHSYNC :1;
1581[; ;pic12f1822.h: 4623: unsigned MDCHPOL :1;
1582[; ;pic12f1822.h: 4624: unsigned MDCHODIS :1;
1583[; ;pic12f1822.h: 4625: };
1584[; ;pic12f1822.h: 4626: struct {
1585[; ;pic12f1822.h: 4627: unsigned MDCH :4;
1586[; ;pic12f1822.h: 4628: };
1587[; ;pic12f1822.h: 4629: } MDCARHbits_t;
1588[; ;pic12f1822.h: 4630: extern volatile MDCARHbits_t MDCARHbits @ 0x39F;
1589[; ;pic12f1822.h: 4674: extern volatile unsigned char STATUS_SHAD @ 0xFE4;
1590"4676
1591[; ;pic12f1822.h: 4676: asm("STATUS_SHAD equ 0FE4h");
1592[; <" STATUS_SHAD equ 0FE4h ;# ">
1593[; ;pic12f1822.h: 4679: typedef union {
1594[; ;pic12f1822.h: 4680: struct {
1595[; ;pic12f1822.h: 4681: unsigned C_SHAD :1;
1596[; ;pic12f1822.h: 4682: unsigned DC_SHAD :1;
1597[; ;pic12f1822.h: 4683: unsigned Z_SHAD :1;
1598[; ;pic12f1822.h: 4684: };
1599[; ;pic12f1822.h: 4685: } STATUS_SHADbits_t;
1600[; ;pic12f1822.h: 4686: extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
1601[; ;pic12f1822.h: 4705: extern volatile unsigned char WREG_SHAD @ 0xFE5;
1602"4707
1603[; ;pic12f1822.h: 4707: asm("WREG_SHAD equ 0FE5h");
1604[; <" WREG_SHAD equ 0FE5h ;# ">
1605[; ;pic12f1822.h: 4710: typedef union {
1606[; ;pic12f1822.h: 4711: struct {
1607[; ;pic12f1822.h: 4712: unsigned WREG_SHAD :8;
1608[; ;pic12f1822.h: 4713: };
1609[; ;pic12f1822.h: 4714: } WREG_SHADbits_t;
1610[; ;pic12f1822.h: 4715: extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
1611[; ;pic12f1822.h: 4724: extern volatile unsigned char BSR_SHAD @ 0xFE6;
1612"4726
1613[; ;pic12f1822.h: 4726: asm("BSR_SHAD equ 0FE6h");
1614[; <" BSR_SHAD equ 0FE6h ;# ">
1615[; ;pic12f1822.h: 4729: typedef union {
1616[; ;pic12f1822.h: 4730: struct {
1617[; ;pic12f1822.h: 4731: unsigned BSR_SHAD :5;
1618[; ;pic12f1822.h: 4732: };
1619[; ;pic12f1822.h: 4733: } BSR_SHADbits_t;
1620[; ;pic12f1822.h: 4734: extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
1621[; ;pic12f1822.h: 4743: extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
1622"4745
1623[; ;pic12f1822.h: 4745: asm("PCLATH_SHAD equ 0FE7h");
1624[; <" PCLATH_SHAD equ 0FE7h ;# ">
1625[; ;pic12f1822.h: 4748: typedef union {
1626[; ;pic12f1822.h: 4749: struct {
1627[; ;pic12f1822.h: 4750: unsigned PCLATH_SHAD :7;
1628[; ;pic12f1822.h: 4751: };
1629[; ;pic12f1822.h: 4752: } PCLATH_SHADbits_t;
1630[; ;pic12f1822.h: 4753: extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
1631[; ;pic12f1822.h: 4762: extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
1632"4764
1633[; ;pic12f1822.h: 4764: asm("FSR0L_SHAD equ 0FE8h");
1634[; <" FSR0L_SHAD equ 0FE8h ;# ">
1635[; ;pic12f1822.h: 4767: typedef union {
1636[; ;pic12f1822.h: 4768: struct {
1637[; ;pic12f1822.h: 4769: unsigned FSR0L_SHAD :8;
1638[; ;pic12f1822.h: 4770: };
1639[; ;pic12f1822.h: 4771: } FSR0L_SHADbits_t;
1640[; ;pic12f1822.h: 4772: extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
1641[; ;pic12f1822.h: 4781: extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
1642"4783
1643[; ;pic12f1822.h: 4783: asm("FSR0H_SHAD equ 0FE9h");
1644[; <" FSR0H_SHAD equ 0FE9h ;# ">
1645[; ;pic12f1822.h: 4786: typedef union {
1646[; ;pic12f1822.h: 4787: struct {
1647[; ;pic12f1822.h: 4788: unsigned FSR0H_SHAD :8;
1648[; ;pic12f1822.h: 4789: };
1649[; ;pic12f1822.h: 4790: } FSR0H_SHADbits_t;
1650[; ;pic12f1822.h: 4791: extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
1651[; ;pic12f1822.h: 4800: extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
1652"4802
1653[; ;pic12f1822.h: 4802: asm("FSR1L_SHAD equ 0FEAh");
1654[; <" FSR1L_SHAD equ 0FEAh ;# ">
1655[; ;pic12f1822.h: 4805: typedef union {
1656[; ;pic12f1822.h: 4806: struct {
1657[; ;pic12f1822.h: 4807: unsigned FSR1L_SHAD :8;
1658[; ;pic12f1822.h: 4808: };
1659[; ;pic12f1822.h: 4809: } FSR1L_SHADbits_t;
1660[; ;pic12f1822.h: 4810: extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
1661[; ;pic12f1822.h: 4819: extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
1662"4821
1663[; ;pic12f1822.h: 4821: asm("FSR1H_SHAD equ 0FEBh");
1664[; <" FSR1H_SHAD equ 0FEBh ;# ">
1665[; ;pic12f1822.h: 4824: typedef union {
1666[; ;pic12f1822.h: 4825: struct {
1667[; ;pic12f1822.h: 4826: unsigned FSR1H_SHAD :8;
1668[; ;pic12f1822.h: 4827: };
1669[; ;pic12f1822.h: 4828: } FSR1H_SHADbits_t;
1670[; ;pic12f1822.h: 4829: extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
1671[; ;pic12f1822.h: 4838: extern volatile unsigned char STKPTR @ 0xFED;
1672"4840
1673[; ;pic12f1822.h: 4840: asm("STKPTR equ 0FEDh");
1674[; <" STKPTR equ 0FEDh ;# ">
1675[; ;pic12f1822.h: 4843: typedef union {
1676[; ;pic12f1822.h: 4844: struct {
1677[; ;pic12f1822.h: 4845: unsigned STKPTR :5;
1678[; ;pic12f1822.h: 4846: };
1679[; ;pic12f1822.h: 4847: } STKPTRbits_t;
1680[; ;pic12f1822.h: 4848: extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
1681[; ;pic12f1822.h: 4857: extern volatile unsigned char TOSL @ 0xFEE;
1682"4859
1683[; ;pic12f1822.h: 4859: asm("TOSL equ 0FEEh");
1684[; <" TOSL equ 0FEEh ;# ">
1685[; ;pic12f1822.h: 4862: typedef union {
1686[; ;pic12f1822.h: 4863: struct {
1687[; ;pic12f1822.h: 4864: unsigned TOSL :8;
1688[; ;pic12f1822.h: 4865: };
1689[; ;pic12f1822.h: 4866: } TOSLbits_t;
1690[; ;pic12f1822.h: 4867: extern volatile TOSLbits_t TOSLbits @ 0xFEE;
1691[; ;pic12f1822.h: 4876: extern volatile unsigned char TOSH @ 0xFEF;
1692"4878
1693[; ;pic12f1822.h: 4878: asm("TOSH equ 0FEFh");
1694[; <" TOSH equ 0FEFh ;# ">
1695[; ;pic12f1822.h: 4881: typedef union {
1696[; ;pic12f1822.h: 4882: struct {
1697[; ;pic12f1822.h: 4883: unsigned TOSH :7;
1698[; ;pic12f1822.h: 4884: };
1699[; ;pic12f1822.h: 4885: } TOSHbits_t;
1700[; ;pic12f1822.h: 4886: extern volatile TOSHbits_t TOSHbits @ 0xFEF;
1701[; ;pic12f1822.h: 4901: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
1702[; ;pic12f1822.h: 4903: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
1703[; ;pic12f1822.h: 4905: extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
1704[; ;pic12f1822.h: 4907: extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
1705[; ;pic12f1822.h: 4909: extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
1706[; ;pic12f1822.h: 4911: extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
1707[; ;pic12f1822.h: 4913: extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 4;
1708[; ;pic12f1822.h: 4915: extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 5;
1709[; ;pic12f1822.h: 4917: extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
1710[; ;pic12f1822.h: 4919: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
1711[; ;pic12f1822.h: 4921: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
1712[; ;pic12f1822.h: 4923: extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
1713[; ;pic12f1822.h: 4925: extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
1714[; ;pic12f1822.h: 4927: extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
1715[; ;pic12f1822.h: 4929: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
1716[; ;pic12f1822.h: 4931: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
1717[; ;pic12f1822.h: 4933: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
1718[; ;pic12f1822.h: 4935: extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
1719[; ;pic12f1822.h: 4937: extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
1720[; ;pic12f1822.h: 4939: extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
1721[; ;pic12f1822.h: 4941: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
1722[; ;pic12f1822.h: 4943: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
1723[; ;pic12f1822.h: 4945: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
1724[; ;pic12f1822.h: 4947: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 4;
1725[; ;pic12f1822.h: 4949: extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
1726[; ;pic12f1822.h: 4951: extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
1727[; ;pic12f1822.h: 4953: extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
1728[; ;pic12f1822.h: 4955: extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
1729[; ;pic12f1822.h: 4957: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
1730[; ;pic12f1822.h: 4959: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
1731[; ;pic12f1822.h: 4961: extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
1732[; ;pic12f1822.h: 4963: extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
1733[; ;pic12f1822.h: 4965: extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
1734[; ;pic12f1822.h: 4967: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
1735[; ;pic12f1822.h: 4969: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
1736[; ;pic12f1822.h: 4971: extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
1737[; ;pic12f1822.h: 4973: extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
1738[; ;pic12f1822.h: 4975: extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
1739[; ;pic12f1822.h: 4977: extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
1740[; ;pic12f1822.h: 4979: extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
1741[; ;pic12f1822.h: 4981: extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
1742[; ;pic12f1822.h: 4983: extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
1743[; ;pic12f1822.h: 4985: extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
1744[; ;pic12f1822.h: 4987: extern volatile __bit C1IN0N @ (((unsigned) &PORTA)*8) + 1;
1745[; ;pic12f1822.h: 4989: extern volatile __bit C1IN1N @ (((unsigned) &PORTA)*8) + 4;
1746[; ;pic12f1822.h: 4991: extern volatile __bit C1INP @ (((unsigned) &PORTA)*8) + 0;
1747[; ;pic12f1822.h: 4993: extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
1748[; ;pic12f1822.h: 4995: extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
1749[; ;pic12f1822.h: 4997: extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
1750[; ;pic12f1822.h: 4999: extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
1751[; ;pic12f1822.h: 5001: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
1752[; ;pic12f1822.h: 5003: extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
1753[; ;pic12f1822.h: 5005: extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
1754[; ;pic12f1822.h: 5007: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
1755[; ;pic12f1822.h: 5009: extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
1756[; ;pic12f1822.h: 5011: extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
1757[; ;pic12f1822.h: 5013: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
1758[; ;pic12f1822.h: 5015: extern volatile __bit CCP1AS0 @ (((unsigned) &CCP1AS)*8) + 4;
1759[; ;pic12f1822.h: 5017: extern volatile __bit CCP1AS1 @ (((unsigned) &CCP1AS)*8) + 5;
1760[; ;pic12f1822.h: 5019: extern volatile __bit CCP1AS2 @ (((unsigned) &CCP1AS)*8) + 6;
1761[; ;pic12f1822.h: 5021: extern volatile __bit CCP1ASE @ (((unsigned) &CCP1AS)*8) + 7;
1762[; ;pic12f1822.h: 5023: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
1763[; ;pic12f1822.h: 5025: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
1764[; ;pic12f1822.h: 5027: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
1765[; ;pic12f1822.h: 5029: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
1766[; ;pic12f1822.h: 5031: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
1767[; ;pic12f1822.h: 5033: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
1768[; ;pic12f1822.h: 5035: extern volatile __bit CCP1SEL @ (((unsigned) &APFCON)*8) + 0;
1769[; ;pic12f1822.h: 5037: extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
1770[; ;pic12f1822.h: 5039: extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
1771[; ;pic12f1822.h: 5041: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;
1772[; ;pic12f1822.h: 5043: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
1773[; ;pic12f1822.h: 5045: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
1774[; ;pic12f1822.h: 5047: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
1775[; ;pic12f1822.h: 5049: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
1776[; ;pic12f1822.h: 5051: extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
1777[; ;pic12f1822.h: 5053: extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
1778[; ;pic12f1822.h: 5055: extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
1779[; ;pic12f1822.h: 5057: extern volatile __bit CLKIN @ (((unsigned) &PORTA)*8) + 5;
1780[; ;pic12f1822.h: 5059: extern volatile __bit CLKOUT @ (((unsigned) &PORTA)*8) + 4;
1781[; ;pic12f1822.h: 5061: extern volatile __bit CLKR @ (((unsigned) &PORTA)*8) + 4;
1782[; ;pic12f1822.h: 5063: extern volatile __bit CLKRDC0 @ (((unsigned) &CLKRCON)*8) + 3;
1783[; ;pic12f1822.h: 5065: extern volatile __bit CLKRDC1 @ (((unsigned) &CLKRCON)*8) + 4;
1784[; ;pic12f1822.h: 5067: extern volatile __bit CLKRDIV0 @ (((unsigned) &CLKRCON)*8) + 0;
1785[; ;pic12f1822.h: 5069: extern volatile __bit CLKRDIV1 @ (((unsigned) &CLKRCON)*8) + 1;
1786[; ;pic12f1822.h: 5071: extern volatile __bit CLKRDIV2 @ (((unsigned) &CLKRCON)*8) + 2;
1787[; ;pic12f1822.h: 5073: extern volatile __bit CLKREN @ (((unsigned) &CLKRCON)*8) + 7;
1788[; ;pic12f1822.h: 5075: extern volatile __bit CLKROE @ (((unsigned) &CLKRCON)*8) + 6;
1789[; ;pic12f1822.h: 5077: extern volatile __bit CLKRSLR @ (((unsigned) &CLKRCON)*8) + 5;
1790[; ;pic12f1822.h: 5079: extern volatile __bit CPS0 @ (((unsigned) &PORTA)*8) + 0;
1791[; ;pic12f1822.h: 5081: extern volatile __bit CPS1 @ (((unsigned) &PORTA)*8) + 1;
1792[; ;pic12f1822.h: 5083: extern volatile __bit CPS2 @ (((unsigned) &PORTA)*8) + 2;
1793[; ;pic12f1822.h: 5085: extern volatile __bit CPS3 @ (((unsigned) &PORTA)*8) + 4;
1794[; ;pic12f1822.h: 5087: extern volatile __bit CPSCH0 @ (((unsigned) &CPSCON1)*8) + 0;
1795[; ;pic12f1822.h: 5089: extern volatile __bit CPSCH1 @ (((unsigned) &CPSCON1)*8) + 1;
1796[; ;pic12f1822.h: 5091: extern volatile __bit CPSON @ (((unsigned) &CPSCON0)*8) + 7;
1797[; ;pic12f1822.h: 5093: extern volatile __bit CPSOUT @ (((unsigned) &CPSCON0)*8) + 1;
1798[; ;pic12f1822.h: 5095: extern volatile __bit CPSRM @ (((unsigned) &CPSCON0)*8) + 6;
1799[; ;pic12f1822.h: 5097: extern volatile __bit CPSRNG0 @ (((unsigned) &CPSCON0)*8) + 2;
1800[; ;pic12f1822.h: 5099: extern volatile __bit CPSRNG1 @ (((unsigned) &CPSCON0)*8) + 3;
1801[; ;pic12f1822.h: 5101: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
1802[; ;pic12f1822.h: 5103: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
1803[; ;pic12f1822.h: 5105: extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
1804[; ;pic12f1822.h: 5107: extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
1805[; ;pic12f1822.h: 5109: extern volatile __bit DACLPS @ (((unsigned) &DACCON0)*8) + 6;
1806[; ;pic12f1822.h: 5111: extern volatile __bit DACOE @ (((unsigned) &DACCON0)*8) + 5;
1807[; ;pic12f1822.h: 5113: extern volatile __bit DACOUT @ (((unsigned) &PORTA)*8) + 0;
1808[; ;pic12f1822.h: 5115: extern volatile __bit DACPSS0 @ (((unsigned) &DACCON0)*8) + 2;
1809[; ;pic12f1822.h: 5117: extern volatile __bit DACPSS1 @ (((unsigned) &DACCON0)*8) + 3;
1810[; ;pic12f1822.h: 5119: extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
1811[; ;pic12f1822.h: 5121: extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
1812[; ;pic12f1822.h: 5123: extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
1813[; ;pic12f1822.h: 5125: extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
1814[; ;pic12f1822.h: 5127: extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
1815[; ;pic12f1822.h: 5129: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
1816[; ;pic12f1822.h: 5131: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
1817[; ;pic12f1822.h: 5133: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
1818[; ;pic12f1822.h: 5135: extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
1819[; ;pic12f1822.h: 5137: extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
1820[; ;pic12f1822.h: 5139: extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
1821[; ;pic12f1822.h: 5141: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;
1822[; ;pic12f1822.h: 5143: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;
1823[; ;pic12f1822.h: 5145: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
1824[; ;pic12f1822.h: 5147: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
1825[; ;pic12f1822.h: 5149: extern volatile __bit FLT0 @ (((unsigned) &PORTA)*8) + 2;
1826[; ;pic12f1822.h: 5151: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
1827[; ;pic12f1822.h: 5153: extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
1828[; ;pic12f1822.h: 5155: extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
1829[; ;pic12f1822.h: 5157: extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
1830[; ;pic12f1822.h: 5159: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
1831[; ;pic12f1822.h: 5161: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
1832[; ;pic12f1822.h: 5163: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
1833[; ;pic12f1822.h: 5165: extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
1834[; ;pic12f1822.h: 5167: extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
1835[; ;pic12f1822.h: 5169: extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
1836[; ;pic12f1822.h: 5171: extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
1837[; ;pic12f1822.h: 5173: extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
1838[; ;pic12f1822.h: 5175: extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
1839[; ;pic12f1822.h: 5177: extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
1840[; ;pic12f1822.h: 5179: extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
1841[; ;pic12f1822.h: 5181: extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
1842[; ;pic12f1822.h: 5183: extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
1843[; ;pic12f1822.h: 5185: extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
1844[; ;pic12f1822.h: 5187: extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
1845[; ;pic12f1822.h: 5189: extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
1846[; ;pic12f1822.h: 5191: extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
1847[; ;pic12f1822.h: 5193: extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
1848[; ;pic12f1822.h: 5195: extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
1849[; ;pic12f1822.h: 5197: extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
1850[; ;pic12f1822.h: 5199: extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
1851[; ;pic12f1822.h: 5201: extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
1852[; ;pic12f1822.h: 5203: extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
1853[; ;pic12f1822.h: 5205: extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
1854[; ;pic12f1822.h: 5207: extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
1855[; ;pic12f1822.h: 5209: extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
1856[; ;pic12f1822.h: 5211: extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
1857[; ;pic12f1822.h: 5213: extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
1858[; ;pic12f1822.h: 5215: extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
1859[; ;pic12f1822.h: 5217: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
1860[; ;pic12f1822.h: 5219: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
1861[; ;pic12f1822.h: 5221: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
1862[; ;pic12f1822.h: 5223: extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
1863[; ;pic12f1822.h: 5225: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
1864[; ;pic12f1822.h: 5227: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
1865[; ;pic12f1822.h: 5229: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
1866[; ;pic12f1822.h: 5231: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
1867[; ;pic12f1822.h: 5233: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
1868[; ;pic12f1822.h: 5235: extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
1869[; ;pic12f1822.h: 5237: extern volatile __bit LWLO @ (((unsigned) &EECON1)*8) + 5;
1870[; ;pic12f1822.h: 5239: extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
1871[; ;pic12f1822.h: 5241: extern volatile __bit MDBIT @ (((unsigned) &MDCON)*8) + 0;
1872[; ;pic12f1822.h: 5243: extern volatile __bit MDCH0 @ (((unsigned) &MDCARH)*8) + 0;
1873[; ;pic12f1822.h: 5245: extern volatile __bit MDCH1 @ (((unsigned) &MDCARH)*8) + 1;
1874[; ;pic12f1822.h: 5247: extern volatile __bit MDCH2 @ (((unsigned) &MDCARH)*8) + 2;
1875[; ;pic12f1822.h: 5249: extern volatile __bit MDCH3 @ (((unsigned) &MDCARH)*8) + 3;
1876[; ;pic12f1822.h: 5251: extern volatile __bit MDCHODIS @ (((unsigned) &MDCARH)*8) + 7;
1877[; ;pic12f1822.h: 5253: extern volatile __bit MDCHPOL @ (((unsigned) &MDCARH)*8) + 6;
1878[; ;pic12f1822.h: 5255: extern volatile __bit MDCHSYNC @ (((unsigned) &MDCARH)*8) + 5;
1879[; ;pic12f1822.h: 5257: extern volatile __bit MDCIN1 @ (((unsigned) &PORTA)*8) + 2;
1880[; ;pic12f1822.h: 5259: extern volatile __bit MDCIN2 @ (((unsigned) &PORTA)*8) + 4;
1881[; ;pic12f1822.h: 5261: extern volatile __bit MDCL0 @ (((unsigned) &MDCARL)*8) + 0;
1882[; ;pic12f1822.h: 5263: extern volatile __bit MDCL1 @ (((unsigned) &MDCARL)*8) + 1;
1883[; ;pic12f1822.h: 5265: extern volatile __bit MDCL2 @ (((unsigned) &MDCARL)*8) + 2;
1884[; ;pic12f1822.h: 5267: extern volatile __bit MDCL3 @ (((unsigned) &MDCARL)*8) + 3;
1885[; ;pic12f1822.h: 5269: extern volatile __bit MDCLODIS @ (((unsigned) &MDCARL)*8) + 7;
1886[; ;pic12f1822.h: 5271: extern volatile __bit MDCLPOL @ (((unsigned) &MDCARL)*8) + 6;
1887[; ;pic12f1822.h: 5273: extern volatile __bit MDCLSYNC @ (((unsigned) &MDCARL)*8) + 5;
1888[; ;pic12f1822.h: 5275: extern volatile __bit MDEN @ (((unsigned) &MDCON)*8) + 7;
1889[; ;pic12f1822.h: 5277: extern volatile __bit MDMIN @ (((unsigned) &PORTA)*8) + 1;
1890[; ;pic12f1822.h: 5279: extern volatile __bit MDMS0 @ (((unsigned) &MDSRC)*8) + 0;
1891[; ;pic12f1822.h: 5281: extern volatile __bit MDMS1 @ (((unsigned) &MDSRC)*8) + 1;
1892[; ;pic12f1822.h: 5283: extern volatile __bit MDMS2 @ (((unsigned) &MDSRC)*8) + 2;
1893[; ;pic12f1822.h: 5285: extern volatile __bit MDMS3 @ (((unsigned) &MDSRC)*8) + 3;
1894[; ;pic12f1822.h: 5287: extern volatile __bit MDMSODIS @ (((unsigned) &MDSRC)*8) + 7;
1895[; ;pic12f1822.h: 5289: extern volatile __bit MDOE @ (((unsigned) &MDCON)*8) + 6;
1896[; ;pic12f1822.h: 5291: extern volatile __bit MDOPOL @ (((unsigned) &MDCON)*8) + 4;
1897[; ;pic12f1822.h: 5293: extern volatile __bit MDSLR @ (((unsigned) &MDCON)*8) + 5;
1898[; ;pic12f1822.h: 5295: extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
1899[; ;pic12f1822.h: 5297: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
1900[; ;pic12f1822.h: 5299: extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 5;
1901[; ;pic12f1822.h: 5301: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 4;
1902[; ;pic12f1822.h: 5303: extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
1903[; ;pic12f1822.h: 5305: extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
1904[; ;pic12f1822.h: 5307: extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
1905[; ;pic12f1822.h: 5309: extern volatile __bit P1BSEL @ (((unsigned) &APFCON)*8) + 1;
1906[; ;pic12f1822.h: 5311: extern volatile __bit P1DC0 @ (((unsigned) &PWM1CON)*8) + 0;
1907[; ;pic12f1822.h: 5313: extern volatile __bit P1DC1 @ (((unsigned) &PWM1CON)*8) + 1;
1908[; ;pic12f1822.h: 5315: extern volatile __bit P1DC2 @ (((unsigned) &PWM1CON)*8) + 2;
1909[; ;pic12f1822.h: 5317: extern volatile __bit P1DC3 @ (((unsigned) &PWM1CON)*8) + 3;
1910[; ;pic12f1822.h: 5319: extern volatile __bit P1DC4 @ (((unsigned) &PWM1CON)*8) + 4;
1911[; ;pic12f1822.h: 5321: extern volatile __bit P1DC5 @ (((unsigned) &PWM1CON)*8) + 5;
1912[; ;pic12f1822.h: 5323: extern volatile __bit P1DC6 @ (((unsigned) &PWM1CON)*8) + 6;
1913[; ;pic12f1822.h: 5325: extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
1914[; ;pic12f1822.h: 5327: extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
1915[; ;pic12f1822.h: 5329: extern volatile __bit P1RSEN @ (((unsigned) &PWM1CON)*8) + 7;
1916[; ;pic12f1822.h: 5331: extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
1917[; ;pic12f1822.h: 5333: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
1918[; ;pic12f1822.h: 5335: extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
1919[; ;pic12f1822.h: 5337: extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
1920[; ;pic12f1822.h: 5339: extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
1921[; ;pic12f1822.h: 5341: extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
1922[; ;pic12f1822.h: 5343: extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
1923[; ;pic12f1822.h: 5345: extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
1924[; ;pic12f1822.h: 5347: extern volatile __bit PSS1AC0 @ (((unsigned) &CCP1AS)*8) + 2;
1925[; ;pic12f1822.h: 5349: extern volatile __bit PSS1AC1 @ (((unsigned) &CCP1AS)*8) + 3;
1926[; ;pic12f1822.h: 5351: extern volatile __bit PSS1BD0 @ (((unsigned) &CCP1AS)*8) + 0;
1927[; ;pic12f1822.h: 5353: extern volatile __bit PSS1BD1 @ (((unsigned) &CCP1AS)*8) + 1;
1928[; ;pic12f1822.h: 5355: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
1929[; ;pic12f1822.h: 5357: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
1930[; ;pic12f1822.h: 5359: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
1931[; ;pic12f1822.h: 5361: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
1932[; ;pic12f1822.h: 5363: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
1933[; ;pic12f1822.h: 5365: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
1934[; ;pic12f1822.h: 5367: extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
1935[; ;pic12f1822.h: 5369: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
1936[; ;pic12f1822.h: 5371: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
1937[; ;pic12f1822.h: 5373: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
1938[; ;pic12f1822.h: 5375: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;
1939[; ;pic12f1822.h: 5377: extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
1940[; ;pic12f1822.h: 5379: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
1941[; ;pic12f1822.h: 5381: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
1942[; ;pic12f1822.h: 5383: extern volatile __bit RXDTSEL @ (((unsigned) &APFCON)*8) + 7;
1943[; ;pic12f1822.h: 5385: extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
1944[; ;pic12f1822.h: 5387: extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
1945[; ;pic12f1822.h: 5389: extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
1946[; ;pic12f1822.h: 5391: extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
1947[; ;pic12f1822.h: 5393: extern volatile __bit SCK @ (((unsigned) &PORTA)*8) + 1;
1948[; ;pic12f1822.h: 5395: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
1949[; ;pic12f1822.h: 5397: extern volatile __bit SCL @ (((unsigned) &PORTA)*8) + 1;
1950[; ;pic12f1822.h: 5399: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
1951[; ;pic12f1822.h: 5401: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
1952[; ;pic12f1822.h: 5403: extern volatile __bit SDA @ (((unsigned) &PORTA)*8) + 2;
1953[; ;pic12f1822.h: 5405: extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
1954[; ;pic12f1822.h: 5407: extern volatile __bit SDI @ (((unsigned) &PORTA)*8) + 2;
1955[; ;pic12f1822.h: 5409: extern volatile __bit SDO1SEL @ (((unsigned) &APFCON)*8) + 6;
1956[; ;pic12f1822.h: 5411: extern volatile __bit SDOSEL @ (((unsigned) &APFCON)*8) + 6;
1957[; ;pic12f1822.h: 5413: extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
1958[; ;pic12f1822.h: 5415: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
1959[; ;pic12f1822.h: 5417: extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
1960[; ;pic12f1822.h: 5419: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
1961[; ;pic12f1822.h: 5421: extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
1962[; ;pic12f1822.h: 5423: extern volatile __bit SRCLK0 @ (((unsigned) &SRCON0)*8) + 4;
1963[; ;pic12f1822.h: 5425: extern volatile __bit SRCLK1 @ (((unsigned) &SRCON0)*8) + 5;
1964[; ;pic12f1822.h: 5427: extern volatile __bit SRCLK2 @ (((unsigned) &SRCON0)*8) + 6;
1965[; ;pic12f1822.h: 5429: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
1966[; ;pic12f1822.h: 5431: extern volatile __bit SRI @ (((unsigned) &PORTA)*8) + 1;
1967[; ;pic12f1822.h: 5433: extern volatile __bit SRLEN @ (((unsigned) &SRCON0)*8) + 7;
1968[; ;pic12f1822.h: 5435: extern volatile __bit SRNQ @ (((unsigned) &PORTA)*8) + 5;
1969[; ;pic12f1822.h: 5437: extern volatile __bit SRNQEN @ (((unsigned) &SRCON0)*8) + 2;
1970[; ;pic12f1822.h: 5439: extern volatile __bit SRPR @ (((unsigned) &SRCON0)*8) + 0;
1971[; ;pic12f1822.h: 5441: extern volatile __bit SRPS @ (((unsigned) &SRCON0)*8) + 1;
1972[; ;pic12f1822.h: 5443: extern volatile __bit SRQ @ (((unsigned) &PORTA)*8) + 2;
1973[; ;pic12f1822.h: 5445: extern volatile __bit SRQEN @ (((unsigned) &SRCON0)*8) + 3;
1974[; ;pic12f1822.h: 5447: extern volatile __bit SRRC1E @ (((unsigned) &SRCON1)*8) + 0;
1975[; ;pic12f1822.h: 5449: extern volatile __bit SRRCKE @ (((unsigned) &SRCON1)*8) + 2;
1976[; ;pic12f1822.h: 5451: extern volatile __bit SRRPE @ (((unsigned) &SRCON1)*8) + 3;
1977[; ;pic12f1822.h: 5453: extern volatile __bit SRSC1E @ (((unsigned) &SRCON1)*8) + 4;
1978[; ;pic12f1822.h: 5455: extern volatile __bit SRSCKE @ (((unsigned) &SRCON1)*8) + 6;
1979[; ;pic12f1822.h: 5457: extern volatile __bit SRSPE @ (((unsigned) &SRCON1)*8) + 7;
1980[; ;pic12f1822.h: 5459: extern volatile __bit SS1SEL @ (((unsigned) &APFCON)*8) + 5;
1981[; ;pic12f1822.h: 5461: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
1982[; ;pic12f1822.h: 5463: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
1983[; ;pic12f1822.h: 5465: extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
1984[; ;pic12f1822.h: 5467: extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
1985[; ;pic12f1822.h: 5469: extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
1986[; ;pic12f1822.h: 5471: extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
1987[; ;pic12f1822.h: 5473: extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
1988[; ;pic12f1822.h: 5475: extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
1989[; ;pic12f1822.h: 5477: extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 5;
1990[; ;pic12f1822.h: 5479: extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
1991[; ;pic12f1822.h: 5481: extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
1992[; ;pic12f1822.h: 5483: extern volatile __bit STR1A @ (((unsigned) &PSTR1CON)*8) + 0;
1993[; ;pic12f1822.h: 5485: extern volatile __bit STR1B @ (((unsigned) &PSTR1CON)*8) + 1;
1994[; ;pic12f1822.h: 5487: extern volatile __bit STR1C @ (((unsigned) &PSTR1CON)*8) + 2;
1995[; ;pic12f1822.h: 5489: extern volatile __bit STR1D @ (((unsigned) &PSTR1CON)*8) + 3;
1996[; ;pic12f1822.h: 5491: extern volatile __bit STR1SYNC @ (((unsigned) &PSTR1CON)*8) + 4;
1997[; ;pic12f1822.h: 5493: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
1998[; ;pic12f1822.h: 5495: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
1999[; ;pic12f1822.h: 5497: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 2;
2000[; ;pic12f1822.h: 5499: extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2001[; ;pic12f1822.h: 5501: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
2002[; ;pic12f1822.h: 5503: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
2003[; ;pic12f1822.h: 5505: extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2004[; ;pic12f1822.h: 5507: extern volatile __bit T0XCS @ (((unsigned) &CPSCON0)*8) + 0;
2005[; ;pic12f1822.h: 5509: extern volatile __bit T1CKI @ (((unsigned) &PORTA)*8) + 5;
2006[; ;pic12f1822.h: 5511: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
2007[; ;pic12f1822.h: 5513: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
2008[; ;pic12f1822.h: 5515: extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
2009[; ;pic12f1822.h: 5517: extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
2010[; ;pic12f1822.h: 5519: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
2011[; ;pic12f1822.h: 5521: extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
2012[; ;pic12f1822.h: 5523: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
2013[; ;pic12f1822.h: 5525: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
2014[; ;pic12f1822.h: 5527: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
2015[; ;pic12f1822.h: 5529: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
2016[; ;pic12f1822.h: 5531: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
2017[; ;pic12f1822.h: 5533: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
2018[; ;pic12f1822.h: 5535: extern volatile __bit T1OSCR @ (((unsigned) &OSCSTAT)*8) + 7;
2019[; ;pic12f1822.h: 5537: extern volatile __bit T1OSI @ (((unsigned) &PORTA)*8) + 5;
2020[; ;pic12f1822.h: 5539: extern volatile __bit T1OSO @ (((unsigned) &PORTA)*8) + 4;
2021[; ;pic12f1822.h: 5541: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
2022[; ;pic12f1822.h: 5543: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
2023[; ;pic12f1822.h: 5545: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
2024[; ;pic12f1822.h: 5547: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
2025[; ;pic12f1822.h: 5549: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
2026[; ;pic12f1822.h: 5551: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
2027[; ;pic12f1822.h: 5553: extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2028[; ;pic12f1822.h: 5555: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
2029[; ;pic12f1822.h: 5557: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
2030[; ;pic12f1822.h: 5559: extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2031[; ;pic12f1822.h: 5561: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
2032[; ;pic12f1822.h: 5563: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
2033[; ;pic12f1822.h: 5565: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
2034[; ;pic12f1822.h: 5567: extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
2035[; ;pic12f1822.h: 5569: extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
2036[; ;pic12f1822.h: 5571: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
2037[; ;pic12f1822.h: 5573: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
2038[; ;pic12f1822.h: 5575: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
2039[; ;pic12f1822.h: 5577: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
2040[; ;pic12f1822.h: 5579: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
2041[; ;pic12f1822.h: 5581: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
2042[; ;pic12f1822.h: 5583: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
2043[; ;pic12f1822.h: 5585: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
2044[; ;pic12f1822.h: 5587: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
2045[; ;pic12f1822.h: 5589: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
2046[; ;pic12f1822.h: 5591: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
2047[; ;pic12f1822.h: 5593: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
2048[; ;pic12f1822.h: 5595: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
2049[; ;pic12f1822.h: 5597: extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
2050[; ;pic12f1822.h: 5599: extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
2051[; ;pic12f1822.h: 5601: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
2052[; ;pic12f1822.h: 5603: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
2053[; ;pic12f1822.h: 5605: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
2054[; ;pic12f1822.h: 5607: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
2055[; ;pic12f1822.h: 5609: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
2056[; ;pic12f1822.h: 5611: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
2057[; ;pic12f1822.h: 5613: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
2058[; ;pic12f1822.h: 5615: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
2059[; ;pic12f1822.h: 5617: extern volatile __bit TXCKSEL @ (((unsigned) &APFCON)*8) + 2;
2060[; ;pic12f1822.h: 5619: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
2061[; ;pic12f1822.h: 5621: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
2062[; ;pic12f1822.h: 5623: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
2063[; ;pic12f1822.h: 5625: extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
2064[; ;pic12f1822.h: 5627: extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
2065[; ;pic12f1822.h: 5629: extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
2066[; ;pic12f1822.h: 5631: extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
2067[; ;pic12f1822.h: 5633: extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
2068[; ;pic12f1822.h: 5635: extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
2069[; ;pic12f1822.h: 5637: extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
2070[; ;pic12f1822.h: 5639: extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
2071[; ;pic12f1822.h: 5641: extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
2072[; ;pic12f1822.h: 5643: extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
2073[; ;pic12f1822.h: 5645: extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
2074[; ;pic12f1822.h: 5647: extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
2075[; ;pic12f1822.h: 5649: extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
2076[; ;pic12f1822.h: 5651: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
2077[; ;pic12f1822.h: 5653: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
2078[; ;pic12f1822.h: 5655: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
2079[; ;pic12f1822.h: 5657: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
2080[; ;pic12f1822.h: 5659: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
2081[; ;pic12f1822.h: 5661: extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
2082[; ;pic12f1822.h: 5663: extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
2083[; ;pic12f1822.h: 5665: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
2084[; ;pic12f1822.h: 5667: extern volatile __bit nMCLR @ (((unsigned) &PORTA)*8) + 3;
2085[; ;pic12f1822.h: 5669: extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
2086[; ;pic12f1822.h: 5671: extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
2087[; ;pic12f1822.h: 5673: extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
2088[; ;pic12f1822.h: 5675: extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
2089[; ;pic12f1822.h: 5677: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
2090[; ;pic12f1822.h: 5679: extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
2091[; ;pic12f1822.h: 5681: extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
2092[; ;pic.h: 28: extern void _nop(void);
2093[; ;pic.h: 77: extern unsigned int flash_read(unsigned short addr);
2094[; ;eeprom_routines.h: 41: extern void eeprom_write(unsigned char addr, unsigned char value);
2095[; ;eeprom_routines.h: 42: extern unsigned char eeprom_read(unsigned char addr);
2096[; ;eeprom_routines.h: 43: extern void eecpymem(volatile unsigned char *to, __eeprom unsigned char *from, unsigned char size);
2097[; ;eeprom_routines.h: 44: extern void memcpyee(__eeprom unsigned char *to, const unsigned char *from, unsigned char size);
2098[; ;pic.h: 151: extern void _delay(unsigned long);
2099[; ;stdint.h: 13: typedef signed char int8_t;
2100[; ;stdint.h: 20: typedef signed int int16_t;
2101[; ;stdint.h: 28: typedef signed short long int int24_t;
2102[; ;stdint.h: 36: typedef signed long int int32_t;
2103[; ;stdint.h: 43: typedef unsigned char uint8_t;
2104[; ;stdint.h: 49: typedef unsigned int uint16_t;
2105[; ;stdint.h: 56: typedef unsigned short long int uint24_t;
2106[; ;stdint.h: 63: typedef unsigned long int uint32_t;
2107[; ;stdint.h: 71: typedef signed char int_least8_t;
2108[; ;stdint.h: 78: typedef signed int int_least16_t;
2109[; ;stdint.h: 90: typedef signed short long int int_least24_t;
2110[; ;stdint.h: 98: typedef signed long int int_least32_t;
2111[; ;stdint.h: 105: typedef unsigned char uint_least8_t;
2112[; ;stdint.h: 111: typedef unsigned int uint_least16_t;
2113[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;
2114[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;
2115[; ;stdint.h: 137: typedef signed char int_fast8_t;
2116[; ;stdint.h: 144: typedef signed int int_fast16_t;
2117[; ;stdint.h: 156: typedef signed short long int int_fast24_t;
2118[; ;stdint.h: 164: typedef signed long int int_fast32_t;
2119[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;
2120[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;
2121[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;
2122[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;
2123[; ;stdint.h: 200: typedef int32_t intmax_t;
2124[; ;stdint.h: 205: typedef uint32_t uintmax_t;
2125[; ;stdint.h: 210: typedef int16_t intptr_t;
2126[; ;stdint.h: 215: typedef uint16_t uintptr_t;
2127[; ;stdbool.h: 12: typedef unsigned char bool;
2128[; ;pic12f1840.h: 44: extern volatile unsigned char INDF0 @ 0x000;
2129"46 /opt/microchip/xc8/v1.12/include/pic12f1840.h
2130[; ;pic12f1840.h: 46: asm("INDF0 equ 00h");
2131[; <" INDF0 equ 00h ;# ">
2132[; ;pic12f1840.h: 49: typedef union {
2133[; ;pic12f1840.h: 50: struct {
2134[; ;pic12f1840.h: 51: unsigned INDF0 :8;
2135[; ;pic12f1840.h: 52: };
2136[; ;pic12f1840.h: 53: } INDF0bits_t;
2137[; ;pic12f1840.h: 54: extern volatile INDF0bits_t INDF0bits @ 0x000;
2138[; ;pic12f1840.h: 63: extern volatile unsigned char INDF1 @ 0x001;
2139"65
2140[; ;pic12f1840.h: 65: asm("INDF1 equ 01h");
2141[; <" INDF1 equ 01h ;# ">
2142[; ;pic12f1840.h: 68: typedef union {
2143[; ;pic12f1840.h: 69: struct {
2144[; ;pic12f1840.h: 70: unsigned INDF1 :8;
2145[; ;pic12f1840.h: 71: };
2146[; ;pic12f1840.h: 72: } INDF1bits_t;
2147[; ;pic12f1840.h: 73: extern volatile INDF1bits_t INDF1bits @ 0x001;
2148[; ;pic12f1840.h: 82: extern volatile unsigned char PCL @ 0x002;
2149"84
2150[; ;pic12f1840.h: 84: asm("PCL equ 02h");
2151[; <" PCL equ 02h ;# ">
2152[; ;pic12f1840.h: 87: typedef union {
2153[; ;pic12f1840.h: 88: struct {
2154[; ;pic12f1840.h: 89: unsigned PCL :8;
2155[; ;pic12f1840.h: 90: };
2156[; ;pic12f1840.h: 91: } PCLbits_t;
2157[; ;pic12f1840.h: 92: extern volatile PCLbits_t PCLbits @ 0x002;
2158[; ;pic12f1840.h: 101: extern volatile unsigned char STATUS @ 0x003;
2159"103
2160[; ;pic12f1840.h: 103: asm("STATUS equ 03h");
2161[; <" STATUS equ 03h ;# ">
2162[; ;pic12f1840.h: 106: typedef union {
2163[; ;pic12f1840.h: 107: struct {
2164[; ;pic12f1840.h: 108: unsigned C :1;
2165[; ;pic12f1840.h: 109: unsigned DC :1;
2166[; ;pic12f1840.h: 110: unsigned Z :1;
2167[; ;pic12f1840.h: 111: unsigned nPD :1;
2168[; ;pic12f1840.h: 112: unsigned nTO :1;
2169[; ;pic12f1840.h: 113: };
2170[; ;pic12f1840.h: 114: struct {
2171[; ;pic12f1840.h: 115: unsigned CARRY :1;
2172[; ;pic12f1840.h: 116: };
2173[; ;pic12f1840.h: 117: struct {
2174[; ;pic12f1840.h: 118: unsigned :2;
2175[; ;pic12f1840.h: 119: unsigned ZERO :1;
2176[; ;pic12f1840.h: 120: };
2177[; ;pic12f1840.h: 121: } STATUSbits_t;
2178[; ;pic12f1840.h: 122: extern volatile STATUSbits_t STATUSbits @ 0x003;
2179[; ;pic12f1840.h: 161: extern volatile unsigned short FSR0 @ 0x004;
2180[; ;pic12f1840.h: 164: extern volatile unsigned char FSR0L @ 0x004;
2181"166
2182[; ;pic12f1840.h: 166: asm("FSR0L equ 04h");
2183[; <" FSR0L equ 04h ;# ">
2184[; ;pic12f1840.h: 169: typedef union {
2185[; ;pic12f1840.h: 170: struct {
2186[; ;pic12f1840.h: 171: unsigned FSR0L :8;
2187[; ;pic12f1840.h: 172: };
2188[; ;pic12f1840.h: 173: } FSR0Lbits_t;
2189[; ;pic12f1840.h: 174: extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
2190[; ;pic12f1840.h: 183: extern volatile unsigned char FSR0H @ 0x005;
2191"185
2192[; ;pic12f1840.h: 185: asm("FSR0H equ 05h");
2193[; <" FSR0H equ 05h ;# ">
2194[; ;pic12f1840.h: 188: typedef union {
2195[; ;pic12f1840.h: 189: struct {
2196[; ;pic12f1840.h: 190: unsigned FSR0H :8;
2197[; ;pic12f1840.h: 191: };
2198[; ;pic12f1840.h: 192: } FSR0Hbits_t;
2199[; ;pic12f1840.h: 193: extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
2200[; ;pic12f1840.h: 202: extern volatile unsigned short FSR1 @ 0x006;
2201[; ;pic12f1840.h: 205: extern volatile unsigned char FSR1L @ 0x006;
2202"207
2203[; ;pic12f1840.h: 207: asm("FSR1L equ 06h");
2204[; <" FSR1L equ 06h ;# ">
2205[; ;pic12f1840.h: 210: typedef union {
2206[; ;pic12f1840.h: 211: struct {
2207[; ;pic12f1840.h: 212: unsigned FSR1L :8;
2208[; ;pic12f1840.h: 213: };
2209[; ;pic12f1840.h: 214: } FSR1Lbits_t;
2210[; ;pic12f1840.h: 215: extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
2211[; ;pic12f1840.h: 224: extern volatile unsigned char FSR1H @ 0x007;
2212"226
2213[; ;pic12f1840.h: 226: asm("FSR1H equ 07h");
2214[; <" FSR1H equ 07h ;# ">
2215[; ;pic12f1840.h: 229: typedef union {
2216[; ;pic12f1840.h: 230: struct {
2217[; ;pic12f1840.h: 231: unsigned FSR1H :8;
2218[; ;pic12f1840.h: 232: };
2219[; ;pic12f1840.h: 233: } FSR1Hbits_t;
2220[; ;pic12f1840.h: 234: extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
2221[; ;pic12f1840.h: 243: extern volatile unsigned char BSR @ 0x008;
2222"245
2223[; ;pic12f1840.h: 245: asm("BSR equ 08h");
2224[; <" BSR equ 08h ;# ">
2225[; ;pic12f1840.h: 248: typedef union {
2226[; ;pic12f1840.h: 249: struct {
2227[; ;pic12f1840.h: 250: unsigned BSR0 :1;
2228[; ;pic12f1840.h: 251: unsigned BSR1 :1;
2229[; ;pic12f1840.h: 252: unsigned BSR2 :1;
2230[; ;pic12f1840.h: 253: unsigned BSR3 :1;
2231[; ;pic12f1840.h: 254: unsigned BSR4 :1;
2232[; ;pic12f1840.h: 255: };
2233[; ;pic12f1840.h: 256: struct {
2234[; ;pic12f1840.h: 257: unsigned BSR :5;
2235[; ;pic12f1840.h: 258: };
2236[; ;pic12f1840.h: 259: } BSRbits_t;
2237[; ;pic12f1840.h: 260: extern volatile BSRbits_t BSRbits @ 0x008;
2238[; ;pic12f1840.h: 294: extern volatile unsigned char WREG @ 0x009;
2239"296
2240[; ;pic12f1840.h: 296: asm("WREG equ 09h");
2241[; <" WREG equ 09h ;# ">
2242[; ;pic12f1840.h: 299: typedef union {
2243[; ;pic12f1840.h: 300: struct {
2244[; ;pic12f1840.h: 301: unsigned WREG0 :8;
2245[; ;pic12f1840.h: 302: };
2246[; ;pic12f1840.h: 303: } WREGbits_t;
2247[; ;pic12f1840.h: 304: extern volatile WREGbits_t WREGbits @ 0x009;
2248[; ;pic12f1840.h: 313: extern volatile unsigned char PCLATH @ 0x00A;
2249"315
2250[; ;pic12f1840.h: 315: asm("PCLATH equ 0Ah");
2251[; <" PCLATH equ 0Ah ;# ">
2252[; ;pic12f1840.h: 318: typedef union {
2253[; ;pic12f1840.h: 319: struct {
2254[; ;pic12f1840.h: 320: unsigned PCLATH :7;
2255[; ;pic12f1840.h: 321: };
2256[; ;pic12f1840.h: 322: } PCLATHbits_t;
2257[; ;pic12f1840.h: 323: extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
2258[; ;pic12f1840.h: 332: extern volatile unsigned char INTCON @ 0x00B;
2259"334
2260[; ;pic12f1840.h: 334: asm("INTCON equ 0Bh");
2261[; <" INTCON equ 0Bh ;# ">
2262[; ;pic12f1840.h: 337: typedef union {
2263[; ;pic12f1840.h: 338: struct {
2264[; ;pic12f1840.h: 339: unsigned IOCIF :1;
2265[; ;pic12f1840.h: 340: unsigned INTF :1;
2266[; ;pic12f1840.h: 341: unsigned TMR0IF :1;
2267[; ;pic12f1840.h: 342: unsigned IOCIE :1;
2268[; ;pic12f1840.h: 343: unsigned INTE :1;
2269[; ;pic12f1840.h: 344: unsigned TMR0IE :1;
2270[; ;pic12f1840.h: 345: unsigned PEIE :1;
2271[; ;pic12f1840.h: 346: unsigned GIE :1;
2272[; ;pic12f1840.h: 347: };
2273[; ;pic12f1840.h: 348: struct {
2274[; ;pic12f1840.h: 349: unsigned :2;
2275[; ;pic12f1840.h: 350: unsigned T0IF :1;
2276[; ;pic12f1840.h: 351: unsigned :2;
2277[; ;pic12f1840.h: 352: unsigned T0IE :1;
2278[; ;pic12f1840.h: 353: };
2279[; ;pic12f1840.h: 354: } INTCONbits_t;
2280[; ;pic12f1840.h: 355: extern volatile INTCONbits_t INTCONbits @ 0x00B;
2281[; ;pic12f1840.h: 409: extern volatile unsigned char PORTA @ 0x00C;
2282"411
2283[; ;pic12f1840.h: 411: asm("PORTA equ 0Ch");
2284[; <" PORTA equ 0Ch ;# ">
2285[; ;pic12f1840.h: 414: typedef union {
2286[; ;pic12f1840.h: 415: struct {
2287[; ;pic12f1840.h: 416: unsigned RA0 :1;
2288[; ;pic12f1840.h: 417: unsigned RA1 :1;
2289[; ;pic12f1840.h: 418: unsigned RA2 :1;
2290[; ;pic12f1840.h: 419: unsigned RA3 :1;
2291[; ;pic12f1840.h: 420: unsigned RA4 :1;
2292[; ;pic12f1840.h: 421: unsigned RA5 :1;
2293[; ;pic12f1840.h: 422: };
2294[; ;pic12f1840.h: 423: } PORTAbits_t;
2295[; ;pic12f1840.h: 424: extern volatile PORTAbits_t PORTAbits @ 0x00C;
2296[; ;pic12f1840.h: 458: extern volatile unsigned char PIR1 @ 0x011;
2297"460
2298[; ;pic12f1840.h: 460: asm("PIR1 equ 011h");
2299[; <" PIR1 equ 011h ;# ">
2300[; ;pic12f1840.h: 463: typedef union {
2301[; ;pic12f1840.h: 464: struct {
2302[; ;pic12f1840.h: 465: unsigned TMR1IF :1;
2303[; ;pic12f1840.h: 466: unsigned TMR2IF :1;
2304[; ;pic12f1840.h: 467: unsigned CCP1IF :1;
2305[; ;pic12f1840.h: 468: unsigned SSP1IF :1;
2306[; ;pic12f1840.h: 469: unsigned TXIF :1;
2307[; ;pic12f1840.h: 470: unsigned RCIF :1;
2308[; ;pic12f1840.h: 471: unsigned ADIF :1;
2309[; ;pic12f1840.h: 472: unsigned TMR1GIF :1;
2310[; ;pic12f1840.h: 473: };
2311[; ;pic12f1840.h: 474: } PIR1bits_t;
2312[; ;pic12f1840.h: 475: extern volatile PIR1bits_t PIR1bits @ 0x011;
2313[; ;pic12f1840.h: 519: extern volatile unsigned char PIR2 @ 0x012;
2314"521
2315[; ;pic12f1840.h: 521: asm("PIR2 equ 012h");
2316[; <" PIR2 equ 012h ;# ">
2317[; ;pic12f1840.h: 524: typedef union {
2318[; ;pic12f1840.h: 525: struct {
2319[; ;pic12f1840.h: 526: unsigned :3;
2320[; ;pic12f1840.h: 527: unsigned BCL1IF :1;
2321[; ;pic12f1840.h: 528: unsigned EEIF :1;
2322[; ;pic12f1840.h: 529: unsigned C1IF :1;
2323[; ;pic12f1840.h: 530: unsigned :1;
2324[; ;pic12f1840.h: 531: unsigned OSFIF :1;
2325[; ;pic12f1840.h: 532: };
2326[; ;pic12f1840.h: 533: } PIR2bits_t;
2327[; ;pic12f1840.h: 534: extern volatile PIR2bits_t PIR2bits @ 0x012;
2328[; ;pic12f1840.h: 558: extern volatile unsigned char TMR0 @ 0x015;
2329"560
2330[; ;pic12f1840.h: 560: asm("TMR0 equ 015h");
2331[; <" TMR0 equ 015h ;# ">
2332[; ;pic12f1840.h: 563: typedef union {
2333[; ;pic12f1840.h: 564: struct {
2334[; ;pic12f1840.h: 565: unsigned TMR0 :8;
2335[; ;pic12f1840.h: 566: };
2336[; ;pic12f1840.h: 567: } TMR0bits_t;
2337[; ;pic12f1840.h: 568: extern volatile TMR0bits_t TMR0bits @ 0x015;
2338[; ;pic12f1840.h: 577: extern volatile unsigned short TMR1 @ 0x016;
2339"579
2340[; ;pic12f1840.h: 579: asm("TMR1 equ 016h");
2341[; <" TMR1 equ 016h ;# ">
2342[; ;pic12f1840.h: 583: extern volatile unsigned char TMR1L @ 0x016;
2343"585
2344[; ;pic12f1840.h: 585: asm("TMR1L equ 016h");
2345[; <" TMR1L equ 016h ;# ">
2346[; ;pic12f1840.h: 588: typedef union {
2347[; ;pic12f1840.h: 589: struct {
2348[; ;pic12f1840.h: 590: unsigned TMR1L :8;
2349[; ;pic12f1840.h: 591: };
2350[; ;pic12f1840.h: 592: } TMR1Lbits_t;
2351[; ;pic12f1840.h: 593: extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
2352[; ;pic12f1840.h: 602: extern volatile unsigned char TMR1H @ 0x017;
2353"604
2354[; ;pic12f1840.h: 604: asm("TMR1H equ 017h");
2355[; <" TMR1H equ 017h ;# ">
2356[; ;pic12f1840.h: 607: typedef union {
2357[; ;pic12f1840.h: 608: struct {
2358[; ;pic12f1840.h: 609: unsigned TMR1H :8;
2359[; ;pic12f1840.h: 610: };
2360[; ;pic12f1840.h: 611: } TMR1Hbits_t;
2361[; ;pic12f1840.h: 612: extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
2362[; ;pic12f1840.h: 621: extern volatile unsigned char T1CON @ 0x018;
2363"623
2364[; ;pic12f1840.h: 623: asm("T1CON equ 018h");
2365[; <" T1CON equ 018h ;# ">
2366[; ;pic12f1840.h: 626: typedef union {
2367[; ;pic12f1840.h: 627: struct {
2368[; ;pic12f1840.h: 628: unsigned TMR1ON :1;
2369[; ;pic12f1840.h: 629: unsigned :1;
2370[; ;pic12f1840.h: 630: unsigned nT1SYNC :1;
2371[; ;pic12f1840.h: 631: unsigned T1OSCEN :1;
2372[; ;pic12f1840.h: 632: unsigned T1CKPS0 :1;
2373[; ;pic12f1840.h: 633: unsigned T1CKPS1 :1;
2374[; ;pic12f1840.h: 634: unsigned TMR1CS0 :1;
2375[; ;pic12f1840.h: 635: unsigned TMR1CS1 :1;
2376[; ;pic12f1840.h: 636: };
2377[; ;pic12f1840.h: 637: struct {
2378[; ;pic12f1840.h: 638: unsigned :4;
2379[; ;pic12f1840.h: 639: unsigned T1CKPS :2;
2380[; ;pic12f1840.h: 640: unsigned TMR1CS :2;
2381[; ;pic12f1840.h: 641: };
2382[; ;pic12f1840.h: 642: } T1CONbits_t;
2383[; ;pic12f1840.h: 643: extern volatile T1CONbits_t T1CONbits @ 0x018;
2384[; ;pic12f1840.h: 692: extern volatile unsigned char T1GCON @ 0x019;
2385"694
2386[; ;pic12f1840.h: 694: asm("T1GCON equ 019h");
2387[; <" T1GCON equ 019h ;# ">
2388[; ;pic12f1840.h: 697: typedef union {
2389[; ;pic12f1840.h: 698: struct {
2390[; ;pic12f1840.h: 699: unsigned T1GSS0 :1;
2391[; ;pic12f1840.h: 700: unsigned T1GSS1 :1;
2392[; ;pic12f1840.h: 701: unsigned T1GVAL :1;
2393[; ;pic12f1840.h: 702: unsigned T1GGO_nDONE :1;
2394[; ;pic12f1840.h: 703: unsigned T1GSPM :1;
2395[; ;pic12f1840.h: 704: unsigned T1GTM :1;
2396[; ;pic12f1840.h: 705: unsigned T1GPOL :1;
2397[; ;pic12f1840.h: 706: unsigned TMR1GE :1;
2398[; ;pic12f1840.h: 707: };
2399[; ;pic12f1840.h: 708: struct {
2400[; ;pic12f1840.h: 709: unsigned T1GSS :2;
2401[; ;pic12f1840.h: 710: unsigned :1;
2402[; ;pic12f1840.h: 711: unsigned T1GGO :1;
2403[; ;pic12f1840.h: 712: };
2404[; ;pic12f1840.h: 713: } T1GCONbits_t;
2405[; ;pic12f1840.h: 714: extern volatile T1GCONbits_t T1GCONbits @ 0x019;
2406[; ;pic12f1840.h: 768: extern volatile unsigned char TMR2 @ 0x01A;
2407"770
2408[; ;pic12f1840.h: 770: asm("TMR2 equ 01Ah");
2409[; <" TMR2 equ 01Ah ;# ">
2410[; ;pic12f1840.h: 773: typedef union {
2411[; ;pic12f1840.h: 774: struct {
2412[; ;pic12f1840.h: 775: unsigned TMR2 :8;
2413[; ;pic12f1840.h: 776: };
2414[; ;pic12f1840.h: 777: } TMR2bits_t;
2415[; ;pic12f1840.h: 778: extern volatile TMR2bits_t TMR2bits @ 0x01A;
2416[; ;pic12f1840.h: 787: extern volatile unsigned char PR2 @ 0x01B;
2417"789
2418[; ;pic12f1840.h: 789: asm("PR2 equ 01Bh");
2419[; <" PR2 equ 01Bh ;# ">
2420[; ;pic12f1840.h: 792: typedef union {
2421[; ;pic12f1840.h: 793: struct {
2422[; ;pic12f1840.h: 794: unsigned PR2 :8;
2423[; ;pic12f1840.h: 795: };
2424[; ;pic12f1840.h: 796: } PR2bits_t;
2425[; ;pic12f1840.h: 797: extern volatile PR2bits_t PR2bits @ 0x01B;
2426[; ;pic12f1840.h: 806: extern volatile unsigned char T2CON @ 0x01C;
2427"808
2428[; ;pic12f1840.h: 808: asm("T2CON equ 01Ch");
2429[; <" T2CON equ 01Ch ;# ">
2430[; ;pic12f1840.h: 811: typedef union {
2431[; ;pic12f1840.h: 812: struct {
2432[; ;pic12f1840.h: 813: unsigned T2CKPS0 :1;
2433[; ;pic12f1840.h: 814: unsigned T2CKPS1 :1;
2434[; ;pic12f1840.h: 815: unsigned TMR2ON :1;
2435[; ;pic12f1840.h: 816: unsigned T2OUTPS0 :1;
2436[; ;pic12f1840.h: 817: unsigned T2OUTPS1 :1;
2437[; ;pic12f1840.h: 818: unsigned T2OUTPS2 :1;
2438[; ;pic12f1840.h: 819: unsigned T2OUTPS3 :1;
2439[; ;pic12f1840.h: 820: };
2440[; ;pic12f1840.h: 821: struct {
2441[; ;pic12f1840.h: 822: unsigned T2CKPS :2;
2442[; ;pic12f1840.h: 823: unsigned :1;
2443[; ;pic12f1840.h: 824: unsigned T2OUTPS :4;
2444[; ;pic12f1840.h: 825: };
2445[; ;pic12f1840.h: 826: } T2CONbits_t;
2446[; ;pic12f1840.h: 827: extern volatile T2CONbits_t T2CONbits @ 0x01C;
2447[; ;pic12f1840.h: 876: extern volatile unsigned char CPSCON0 @ 0x01E;
2448"878
2449[; ;pic12f1840.h: 878: asm("CPSCON0 equ 01Eh");
2450[; <" CPSCON0 equ 01Eh ;# ">
2451[; ;pic12f1840.h: 881: typedef union {
2452[; ;pic12f1840.h: 882: struct {
2453[; ;pic12f1840.h: 883: unsigned T0XCS :1;
2454[; ;pic12f1840.h: 884: unsigned CPSOUT :1;
2455[; ;pic12f1840.h: 885: unsigned CPSRNG0 :1;
2456[; ;pic12f1840.h: 886: unsigned CPSRNG1 :1;
2457[; ;pic12f1840.h: 887: unsigned :2;
2458[; ;pic12f1840.h: 888: unsigned CPSRM :1;
2459[; ;pic12f1840.h: 889: unsigned CPSON :1;
2460[; ;pic12f1840.h: 890: };
2461[; ;pic12f1840.h: 891: struct {
2462[; ;pic12f1840.h: 892: unsigned :2;
2463[; ;pic12f1840.h: 893: unsigned CPSRNG :2;
2464[; ;pic12f1840.h: 894: };
2465[; ;pic12f1840.h: 895: } CPSCON0bits_t;
2466[; ;pic12f1840.h: 896: extern volatile CPSCON0bits_t CPSCON0bits @ 0x01E;
2467[; ;pic12f1840.h: 935: extern volatile unsigned char CPSCON1 @ 0x01F;
2468"937
2469[; ;pic12f1840.h: 937: asm("CPSCON1 equ 01Fh");
2470[; <" CPSCON1 equ 01Fh ;# ">
2471[; ;pic12f1840.h: 940: typedef union {
2472[; ;pic12f1840.h: 941: struct {
2473[; ;pic12f1840.h: 942: unsigned CPSCH0 :1;
2474[; ;pic12f1840.h: 943: unsigned CPSCH1 :1;
2475[; ;pic12f1840.h: 944: };
2476[; ;pic12f1840.h: 945: struct {
2477[; ;pic12f1840.h: 946: unsigned CPSCH :2;
2478[; ;pic12f1840.h: 947: };
2479[; ;pic12f1840.h: 948: } CPSCON1bits_t;
2480[; ;pic12f1840.h: 949: extern volatile CPSCON1bits_t CPSCON1bits @ 0x01F;
2481[; ;pic12f1840.h: 968: extern volatile unsigned char TRISA @ 0x08C;
2482"970
2483[; ;pic12f1840.h: 970: asm("TRISA equ 08Ch");
2484[; <" TRISA equ 08Ch ;# ">
2485[; ;pic12f1840.h: 973: typedef union {
2486[; ;pic12f1840.h: 974: struct {
2487[; ;pic12f1840.h: 975: unsigned TRISA0 :1;
2488[; ;pic12f1840.h: 976: unsigned TRISA1 :1;
2489[; ;pic12f1840.h: 977: unsigned TRISA2 :1;
2490[; ;pic12f1840.h: 978: unsigned TRISA3 :1;
2491[; ;pic12f1840.h: 979: unsigned TRISA4 :1;
2492[; ;pic12f1840.h: 980: unsigned TRISA5 :1;
2493[; ;pic12f1840.h: 981: };
2494[; ;pic12f1840.h: 982: } TRISAbits_t;
2495[; ;pic12f1840.h: 983: extern volatile TRISAbits_t TRISAbits @ 0x08C;
2496[; ;pic12f1840.h: 1017: extern volatile unsigned char PIE1 @ 0x091;
2497"1019
2498[; ;pic12f1840.h: 1019: asm("PIE1 equ 091h");
2499[; <" PIE1 equ 091h ;# ">
2500[; ;pic12f1840.h: 1022: typedef union {
2501[; ;pic12f1840.h: 1023: struct {
2502[; ;pic12f1840.h: 1024: unsigned TMR1IE :1;
2503[; ;pic12f1840.h: 1025: unsigned TMR2IE :1;
2504[; ;pic12f1840.h: 1026: unsigned CCP1IE :1;
2505[; ;pic12f1840.h: 1027: unsigned SSP1IE :1;
2506[; ;pic12f1840.h: 1028: unsigned TXIE :1;
2507[; ;pic12f1840.h: 1029: unsigned RCIE :1;
2508[; ;pic12f1840.h: 1030: unsigned ADIE :1;
2509[; ;pic12f1840.h: 1031: unsigned TMR1GIE :1;
2510[; ;pic12f1840.h: 1032: };
2511[; ;pic12f1840.h: 1033: } PIE1bits_t;
2512[; ;pic12f1840.h: 1034: extern volatile PIE1bits_t PIE1bits @ 0x091;
2513[; ;pic12f1840.h: 1078: extern volatile unsigned char PIE2 @ 0x092;
2514"1080
2515[; ;pic12f1840.h: 1080: asm("PIE2 equ 092h");
2516[; <" PIE2 equ 092h ;# ">
2517[; ;pic12f1840.h: 1083: typedef union {
2518[; ;pic12f1840.h: 1084: struct {
2519[; ;pic12f1840.h: 1085: unsigned :3;
2520[; ;pic12f1840.h: 1086: unsigned BCL1IE :1;
2521[; ;pic12f1840.h: 1087: unsigned EEIE :1;
2522[; ;pic12f1840.h: 1088: unsigned C1IE :1;
2523[; ;pic12f1840.h: 1089: unsigned :1;
2524[; ;pic12f1840.h: 1090: unsigned OSFIE :1;
2525[; ;pic12f1840.h: 1091: };
2526[; ;pic12f1840.h: 1092: } PIE2bits_t;
2527[; ;pic12f1840.h: 1093: extern volatile PIE2bits_t PIE2bits @ 0x092;
2528[; ;pic12f1840.h: 1117: extern volatile unsigned char OPTION_REG @ 0x095;
2529"1119
2530[; ;pic12f1840.h: 1119: asm("OPTION_REG equ 095h");
2531[; <" OPTION_REG equ 095h ;# ">
2532[; ;pic12f1840.h: 1122: typedef union {
2533[; ;pic12f1840.h: 1123: struct {
2534[; ;pic12f1840.h: 1124: unsigned PS0 :1;
2535[; ;pic12f1840.h: 1125: unsigned PS1 :1;
2536[; ;pic12f1840.h: 1126: unsigned PS2 :1;
2537[; ;pic12f1840.h: 1127: unsigned PSA :1;
2538[; ;pic12f1840.h: 1128: unsigned TMR0SE :1;
2539[; ;pic12f1840.h: 1129: unsigned TMR0CS :1;
2540[; ;pic12f1840.h: 1130: unsigned INTEDG :1;
2541[; ;pic12f1840.h: 1131: unsigned nWPUEN :1;
2542[; ;pic12f1840.h: 1132: };
2543[; ;pic12f1840.h: 1133: struct {
2544[; ;pic12f1840.h: 1134: unsigned PS :3;
2545[; ;pic12f1840.h: 1135: unsigned :1;
2546[; ;pic12f1840.h: 1136: unsigned T0SE :1;
2547[; ;pic12f1840.h: 1137: unsigned T0CS :1;
2548[; ;pic12f1840.h: 1138: };
2549[; ;pic12f1840.h: 1139: } OPTION_REGbits_t;
2550[; ;pic12f1840.h: 1140: extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
2551[; ;pic12f1840.h: 1199: extern volatile unsigned char PCON @ 0x096;
2552"1201
2553[; ;pic12f1840.h: 1201: asm("PCON equ 096h");
2554[; <" PCON equ 096h ;# ">
2555[; ;pic12f1840.h: 1204: typedef union {
2556[; ;pic12f1840.h: 1205: struct {
2557[; ;pic12f1840.h: 1206: unsigned nBOR :1;
2558[; ;pic12f1840.h: 1207: unsigned nPOR :1;
2559[; ;pic12f1840.h: 1208: unsigned nRI :1;
2560[; ;pic12f1840.h: 1209: unsigned nRMCLR :1;
2561[; ;pic12f1840.h: 1210: unsigned :2;
2562[; ;pic12f1840.h: 1211: unsigned STKUNF :1;
2563[; ;pic12f1840.h: 1212: unsigned STKOVF :1;
2564[; ;pic12f1840.h: 1213: };
2565[; ;pic12f1840.h: 1214: } PCONbits_t;
2566[; ;pic12f1840.h: 1215: extern volatile PCONbits_t PCONbits @ 0x096;
2567[; ;pic12f1840.h: 1249: extern volatile unsigned char WDTCON @ 0x097;
2568"1251
2569[; ;pic12f1840.h: 1251: asm("WDTCON equ 097h");
2570[; <" WDTCON equ 097h ;# ">
2571[; ;pic12f1840.h: 1254: typedef union {
2572[; ;pic12f1840.h: 1255: struct {
2573[; ;pic12f1840.h: 1256: unsigned SWDTEN :1;
2574[; ;pic12f1840.h: 1257: unsigned WDTPS0 :1;
2575[; ;pic12f1840.h: 1258: unsigned WDTPS1 :1;
2576[; ;pic12f1840.h: 1259: unsigned WDTPS2 :1;
2577[; ;pic12f1840.h: 1260: unsigned WDTPS3 :1;
2578[; ;pic12f1840.h: 1261: unsigned WDTPS4 :1;
2579[; ;pic12f1840.h: 1262: };
2580[; ;pic12f1840.h: 1263: struct {
2581[; ;pic12f1840.h: 1264: unsigned :1;
2582[; ;pic12f1840.h: 1265: unsigned WDTPS :5;
2583[; ;pic12f1840.h: 1266: };
2584[; ;pic12f1840.h: 1267: } WDTCONbits_t;
2585[; ;pic12f1840.h: 1268: extern volatile WDTCONbits_t WDTCONbits @ 0x097;
2586[; ;pic12f1840.h: 1307: extern volatile unsigned char OSCTUNE @ 0x098;
2587"1309
2588[; ;pic12f1840.h: 1309: asm("OSCTUNE equ 098h");
2589[; <" OSCTUNE equ 098h ;# ">
2590[; ;pic12f1840.h: 1312: typedef union {
2591[; ;pic12f1840.h: 1313: struct {
2592[; ;pic12f1840.h: 1314: unsigned TUN0 :1;
2593[; ;pic12f1840.h: 1315: unsigned TUN1 :1;
2594[; ;pic12f1840.h: 1316: unsigned TUN2 :1;
2595[; ;pic12f1840.h: 1317: unsigned TUN3 :1;
2596[; ;pic12f1840.h: 1318: unsigned TUN4 :1;
2597[; ;pic12f1840.h: 1319: unsigned TUN5 :1;
2598[; ;pic12f1840.h: 1320: };
2599[; ;pic12f1840.h: 1321: struct {
2600[; ;pic12f1840.h: 1322: unsigned TUN :6;
2601[; ;pic12f1840.h: 1323: };
2602[; ;pic12f1840.h: 1324: } OSCTUNEbits_t;
2603[; ;pic12f1840.h: 1325: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
2604[; ;pic12f1840.h: 1364: extern volatile unsigned char OSCCON @ 0x099;
2605"1366
2606[; ;pic12f1840.h: 1366: asm("OSCCON equ 099h");
2607[; <" OSCCON equ 099h ;# ">
2608[; ;pic12f1840.h: 1369: typedef union {
2609[; ;pic12f1840.h: 1370: struct {
2610[; ;pic12f1840.h: 1371: unsigned SCS0 :1;
2611[; ;pic12f1840.h: 1372: unsigned SCS1 :1;
2612[; ;pic12f1840.h: 1373: unsigned :1;
2613[; ;pic12f1840.h: 1374: unsigned IRCF0 :1;
2614[; ;pic12f1840.h: 1375: unsigned IRCF1 :1;
2615[; ;pic12f1840.h: 1376: unsigned IRCF2 :1;
2616[; ;pic12f1840.h: 1377: unsigned IRCF3 :1;
2617[; ;pic12f1840.h: 1378: unsigned SPLLEN :1;
2618[; ;pic12f1840.h: 1379: };
2619[; ;pic12f1840.h: 1380: struct {
2620[; ;pic12f1840.h: 1381: unsigned SCS :2;
2621[; ;pic12f1840.h: 1382: unsigned :1;
2622[; ;pic12f1840.h: 1383: unsigned IRCF :4;
2623[; ;pic12f1840.h: 1384: };
2624[; ;pic12f1840.h: 1385: } OSCCONbits_t;
2625[; ;pic12f1840.h: 1386: extern volatile OSCCONbits_t OSCCONbits @ 0x099;
2626[; ;pic12f1840.h: 1435: extern volatile unsigned char OSCSTAT @ 0x09A;
2627"1437
2628[; ;pic12f1840.h: 1437: asm("OSCSTAT equ 09Ah");
2629[; <" OSCSTAT equ 09Ah ;# ">
2630[; ;pic12f1840.h: 1440: typedef union {
2631[; ;pic12f1840.h: 1441: struct {
2632[; ;pic12f1840.h: 1442: unsigned HFIOFS :1;
2633[; ;pic12f1840.h: 1443: unsigned LFIOFR :1;
2634[; ;pic12f1840.h: 1444: unsigned MFIOFR :1;
2635[; ;pic12f1840.h: 1445: unsigned HFIOFL :1;
2636[; ;pic12f1840.h: 1446: unsigned HFIOFR :1;
2637[; ;pic12f1840.h: 1447: unsigned OSTS :1;
2638[; ;pic12f1840.h: 1448: unsigned PLLR :1;
2639[; ;pic12f1840.h: 1449: unsigned T1OSCR :1;
2640[; ;pic12f1840.h: 1450: };
2641[; ;pic12f1840.h: 1451: } OSCSTATbits_t;
2642[; ;pic12f1840.h: 1452: extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
2643[; ;pic12f1840.h: 1496: extern volatile unsigned short ADRES @ 0x09B;
2644"1498
2645[; ;pic12f1840.h: 1498: asm("ADRES equ 09Bh");
2646[; <" ADRES equ 09Bh ;# ">
2647[; ;pic12f1840.h: 1502: extern volatile unsigned char ADRESL @ 0x09B;
2648"1504
2649[; ;pic12f1840.h: 1504: asm("ADRESL equ 09Bh");
2650[; <" ADRESL equ 09Bh ;# ">
2651[; ;pic12f1840.h: 1507: typedef union {
2652[; ;pic12f1840.h: 1508: struct {
2653[; ;pic12f1840.h: 1509: unsigned ADRESL :8;
2654[; ;pic12f1840.h: 1510: };
2655[; ;pic12f1840.h: 1511: } ADRESLbits_t;
2656[; ;pic12f1840.h: 1512: extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
2657[; ;pic12f1840.h: 1521: extern volatile unsigned char ADRESH @ 0x09C;
2658"1523
2659[; ;pic12f1840.h: 1523: asm("ADRESH equ 09Ch");
2660[; <" ADRESH equ 09Ch ;# ">
2661[; ;pic12f1840.h: 1526: typedef union {
2662[; ;pic12f1840.h: 1527: struct {
2663[; ;pic12f1840.h: 1528: unsigned ADRESH :8;
2664[; ;pic12f1840.h: 1529: };
2665[; ;pic12f1840.h: 1530: } ADRESHbits_t;
2666[; ;pic12f1840.h: 1531: extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
2667[; ;pic12f1840.h: 1540: extern volatile unsigned char ADCON0 @ 0x09D;
2668"1542
2669[; ;pic12f1840.h: 1542: asm("ADCON0 equ 09Dh");
2670[; <" ADCON0 equ 09Dh ;# ">
2671[; ;pic12f1840.h: 1545: typedef union {
2672[; ;pic12f1840.h: 1546: struct {
2673[; ;pic12f1840.h: 1547: unsigned ADON :1;
2674[; ;pic12f1840.h: 1548: unsigned GO_nDONE :1;
2675[; ;pic12f1840.h: 1549: unsigned CHS0 :1;
2676[; ;pic12f1840.h: 1550: unsigned CHS1 :1;
2677[; ;pic12f1840.h: 1551: unsigned CHS2 :1;
2678[; ;pic12f1840.h: 1552: unsigned CHS3 :1;
2679[; ;pic12f1840.h: 1553: unsigned CHS4 :1;
2680[; ;pic12f1840.h: 1554: };
2681[; ;pic12f1840.h: 1555: struct {
2682[; ;pic12f1840.h: 1556: unsigned :1;
2683[; ;pic12f1840.h: 1557: unsigned ADGO :1;
2684[; ;pic12f1840.h: 1558: unsigned CHS :5;
2685[; ;pic12f1840.h: 1559: };
2686[; ;pic12f1840.h: 1560: struct {
2687[; ;pic12f1840.h: 1561: unsigned :1;
2688[; ;pic12f1840.h: 1562: unsigned GO :1;
2689[; ;pic12f1840.h: 1563: };
2690[; ;pic12f1840.h: 1564: } ADCON0bits_t;
2691[; ;pic12f1840.h: 1565: extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
2692[; ;pic12f1840.h: 1619: extern volatile unsigned char ADCON1 @ 0x09E;
2693"1621
2694[; ;pic12f1840.h: 1621: asm("ADCON1 equ 09Eh");
2695[; <" ADCON1 equ 09Eh ;# ">
2696[; ;pic12f1840.h: 1624: typedef union {
2697[; ;pic12f1840.h: 1625: struct {
2698[; ;pic12f1840.h: 1626: unsigned ADPREF0 :1;
2699[; ;pic12f1840.h: 1627: unsigned ADPREF1 :1;
2700[; ;pic12f1840.h: 1628: unsigned :2;
2701[; ;pic12f1840.h: 1629: unsigned ADCS0 :1;
2702[; ;pic12f1840.h: 1630: unsigned ADCS1 :1;
2703[; ;pic12f1840.h: 1631: unsigned ADCS2 :1;
2704[; ;pic12f1840.h: 1632: unsigned ADFM :1;
2705[; ;pic12f1840.h: 1633: };
2706[; ;pic12f1840.h: 1634: struct {
2707[; ;pic12f1840.h: 1635: unsigned ADPREF :2;
2708[; ;pic12f1840.h: 1636: unsigned :2;
2709[; ;pic12f1840.h: 1637: unsigned ADCS :3;
2710[; ;pic12f1840.h: 1638: };
2711[; ;pic12f1840.h: 1639: } ADCON1bits_t;
2712[; ;pic12f1840.h: 1640: extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
2713[; ;pic12f1840.h: 1684: extern volatile unsigned char LATA @ 0x10C;
2714"1686
2715[; ;pic12f1840.h: 1686: asm("LATA equ 010Ch");
2716[; <" LATA equ 010Ch ;# ">
2717[; ;pic12f1840.h: 1689: typedef union {
2718[; ;pic12f1840.h: 1690: struct {
2719[; ;pic12f1840.h: 1691: unsigned LATA0 :1;
2720[; ;pic12f1840.h: 1692: unsigned LATA1 :1;
2721[; ;pic12f1840.h: 1693: unsigned LATA2 :1;
2722[; ;pic12f1840.h: 1694: unsigned :1;
2723[; ;pic12f1840.h: 1695: unsigned LATA4 :1;
2724[; ;pic12f1840.h: 1696: unsigned LATA5 :1;
2725[; ;pic12f1840.h: 1697: };
2726[; ;pic12f1840.h: 1698: } LATAbits_t;
2727[; ;pic12f1840.h: 1699: extern volatile LATAbits_t LATAbits @ 0x10C;
2728[; ;pic12f1840.h: 1728: extern volatile unsigned char CM1CON0 @ 0x111;
2729"1730
2730[; ;pic12f1840.h: 1730: asm("CM1CON0 equ 0111h");
2731[; <" CM1CON0 equ 0111h ;# ">
2732[; ;pic12f1840.h: 1733: typedef union {
2733[; ;pic12f1840.h: 1734: struct {
2734[; ;pic12f1840.h: 1735: unsigned C1SYNC :1;
2735[; ;pic12f1840.h: 1736: unsigned C1HYS :1;
2736[; ;pic12f1840.h: 1737: unsigned C1SP :1;
2737[; ;pic12f1840.h: 1738: unsigned :1;
2738[; ;pic12f1840.h: 1739: unsigned C1POL :1;
2739[; ;pic12f1840.h: 1740: unsigned C1OE :1;
2740[; ;pic12f1840.h: 1741: unsigned C1OUT :1;
2741[; ;pic12f1840.h: 1742: unsigned C1ON :1;
2742[; ;pic12f1840.h: 1743: };
2743[; ;pic12f1840.h: 1744: } CM1CON0bits_t;
2744[; ;pic12f1840.h: 1745: extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
2745[; ;pic12f1840.h: 1784: extern volatile unsigned char CM1CON1 @ 0x112;
2746"1786
2747[; ;pic12f1840.h: 1786: asm("CM1CON1 equ 0112h");
2748[; <" CM1CON1 equ 0112h ;# ">
2749[; ;pic12f1840.h: 1789: typedef union {
2750[; ;pic12f1840.h: 1790: struct {
2751[; ;pic12f1840.h: 1791: unsigned C1NCH :1;
2752[; ;pic12f1840.h: 1792: unsigned :3;
2753[; ;pic12f1840.h: 1793: unsigned C1PCH0 :1;
2754[; ;pic12f1840.h: 1794: unsigned C1PCH1 :1;
2755[; ;pic12f1840.h: 1795: unsigned C1INTN :1;
2756[; ;pic12f1840.h: 1796: unsigned C1INTP :1;
2757[; ;pic12f1840.h: 1797: };
2758[; ;pic12f1840.h: 1798: struct {
2759[; ;pic12f1840.h: 1799: unsigned C1NCH0 :1;
2760[; ;pic12f1840.h: 1800: unsigned :3;
2761[; ;pic12f1840.h: 1801: unsigned C1PCH :2;
2762[; ;pic12f1840.h: 1802: };
2763[; ;pic12f1840.h: 1803: } CM1CON1bits_t;
2764[; ;pic12f1840.h: 1804: extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
2765[; ;pic12f1840.h: 1843: extern volatile unsigned char CMOUT @ 0x115;
2766"1845
2767[; ;pic12f1840.h: 1845: asm("CMOUT equ 0115h");
2768[; <" CMOUT equ 0115h ;# ">
2769[; ;pic12f1840.h: 1848: typedef union {
2770[; ;pic12f1840.h: 1849: struct {
2771[; ;pic12f1840.h: 1850: unsigned MC1OUT :1;
2772[; ;pic12f1840.h: 1851: };
2773[; ;pic12f1840.h: 1852: } CMOUTbits_t;
2774[; ;pic12f1840.h: 1853: extern volatile CMOUTbits_t CMOUTbits @ 0x115;
2775[; ;pic12f1840.h: 1862: extern volatile unsigned char BORCON @ 0x116;
2776"1864
2777[; ;pic12f1840.h: 1864: asm("BORCON equ 0116h");
2778[; <" BORCON equ 0116h ;# ">
2779[; ;pic12f1840.h: 1867: typedef union {
2780[; ;pic12f1840.h: 1868: struct {
2781[; ;pic12f1840.h: 1869: unsigned BORRDY :1;
2782[; ;pic12f1840.h: 1870: unsigned :5;
2783[; ;pic12f1840.h: 1871: unsigned BORFS :1;
2784[; ;pic12f1840.h: 1872: unsigned SBOREN :1;
2785[; ;pic12f1840.h: 1873: };
2786[; ;pic12f1840.h: 1874: } BORCONbits_t;
2787[; ;pic12f1840.h: 1875: extern volatile BORCONbits_t BORCONbits @ 0x116;
2788[; ;pic12f1840.h: 1894: extern volatile unsigned char FVRCON @ 0x117;
2789"1896
2790[; ;pic12f1840.h: 1896: asm("FVRCON equ 0117h");
2791[; <" FVRCON equ 0117h ;# ">
2792[; ;pic12f1840.h: 1899: typedef union {
2793[; ;pic12f1840.h: 1900: struct {
2794[; ;pic12f1840.h: 1901: unsigned ADFVR0 :1;
2795[; ;pic12f1840.h: 1902: unsigned ADFVR1 :1;
2796[; ;pic12f1840.h: 1903: unsigned CDAFVR0 :1;
2797[; ;pic12f1840.h: 1904: unsigned CDAFVR1 :1;
2798[; ;pic12f1840.h: 1905: unsigned TSRNG :1;
2799[; ;pic12f1840.h: 1906: unsigned TSEN :1;
2800[; ;pic12f1840.h: 1907: unsigned FVRRDY :1;
2801[; ;pic12f1840.h: 1908: unsigned FVREN :1;
2802[; ;pic12f1840.h: 1909: };
2803[; ;pic12f1840.h: 1910: struct {
2804[; ;pic12f1840.h: 1911: unsigned ADFVR :2;
2805[; ;pic12f1840.h: 1912: unsigned CDAFVR :2;
2806[; ;pic12f1840.h: 1913: };
2807[; ;pic12f1840.h: 1914: } FVRCONbits_t;
2808[; ;pic12f1840.h: 1915: extern volatile FVRCONbits_t FVRCONbits @ 0x117;
2809[; ;pic12f1840.h: 1969: extern volatile unsigned char DACCON0 @ 0x118;
2810"1971
2811[; ;pic12f1840.h: 1971: asm("DACCON0 equ 0118h");
2812[; <" DACCON0 equ 0118h ;# ">
2813[; ;pic12f1840.h: 1974: typedef union {
2814[; ;pic12f1840.h: 1975: struct {
2815[; ;pic12f1840.h: 1976: unsigned :2;
2816[; ;pic12f1840.h: 1977: unsigned DACPSS0 :1;
2817[; ;pic12f1840.h: 1978: unsigned DACPSS1 :1;
2818[; ;pic12f1840.h: 1979: unsigned :1;
2819[; ;pic12f1840.h: 1980: unsigned DACOE :1;
2820[; ;pic12f1840.h: 1981: unsigned DACLPS :1;
2821[; ;pic12f1840.h: 1982: unsigned DACEN :1;
2822[; ;pic12f1840.h: 1983: };
2823[; ;pic12f1840.h: 1984: struct {
2824[; ;pic12f1840.h: 1985: unsigned :2;
2825[; ;pic12f1840.h: 1986: unsigned DACPSS :2;
2826[; ;pic12f1840.h: 1987: };
2827[; ;pic12f1840.h: 1988: } DACCON0bits_t;
2828[; ;pic12f1840.h: 1989: extern volatile DACCON0bits_t DACCON0bits @ 0x118;
2829[; ;pic12f1840.h: 2023: extern volatile unsigned char DACCON1 @ 0x119;
2830"2025
2831[; ;pic12f1840.h: 2025: asm("DACCON1 equ 0119h");
2832[; <" DACCON1 equ 0119h ;# ">
2833[; ;pic12f1840.h: 2028: typedef union {
2834[; ;pic12f1840.h: 2029: struct {
2835[; ;pic12f1840.h: 2030: unsigned DACR0 :1;
2836[; ;pic12f1840.h: 2031: unsigned DACR1 :1;
2837[; ;pic12f1840.h: 2032: unsigned DACR2 :1;
2838[; ;pic12f1840.h: 2033: unsigned DACR3 :1;
2839[; ;pic12f1840.h: 2034: unsigned DACR4 :1;
2840[; ;pic12f1840.h: 2035: };
2841[; ;pic12f1840.h: 2036: struct {
2842[; ;pic12f1840.h: 2037: unsigned DACR :5;
2843[; ;pic12f1840.h: 2038: };
2844[; ;pic12f1840.h: 2039: } DACCON1bits_t;
2845[; ;pic12f1840.h: 2040: extern volatile DACCON1bits_t DACCON1bits @ 0x119;
2846[; ;pic12f1840.h: 2074: extern volatile unsigned char SRCON0 @ 0x11A;
2847"2076
2848[; ;pic12f1840.h: 2076: asm("SRCON0 equ 011Ah");
2849[; <" SRCON0 equ 011Ah ;# ">
2850[; ;pic12f1840.h: 2079: typedef union {
2851[; ;pic12f1840.h: 2080: struct {
2852[; ;pic12f1840.h: 2081: unsigned SRPR :1;
2853[; ;pic12f1840.h: 2082: unsigned SRPS :1;
2854[; ;pic12f1840.h: 2083: unsigned SRNQEN :1;
2855[; ;pic12f1840.h: 2084: unsigned SRQEN :1;
2856[; ;pic12f1840.h: 2085: unsigned SRCLK0 :1;
2857[; ;pic12f1840.h: 2086: unsigned SRCLK1 :1;
2858[; ;pic12f1840.h: 2087: unsigned SRCLK2 :1;
2859[; ;pic12f1840.h: 2088: unsigned SRLEN :1;
2860[; ;pic12f1840.h: 2089: };
2861[; ;pic12f1840.h: 2090: struct {
2862[; ;pic12f1840.h: 2091: unsigned :4;
2863[; ;pic12f1840.h: 2092: unsigned SRCLK :3;
2864[; ;pic12f1840.h: 2093: };
2865[; ;pic12f1840.h: 2094: } SRCON0bits_t;
2866[; ;pic12f1840.h: 2095: extern volatile SRCON0bits_t SRCON0bits @ 0x11A;
2867[; ;pic12f1840.h: 2144: extern volatile unsigned char SRCON1 @ 0x11B;
2868"2146
2869[; ;pic12f1840.h: 2146: asm("SRCON1 equ 011Bh");
2870[; <" SRCON1 equ 011Bh ;# ">
2871[; ;pic12f1840.h: 2149: typedef union {
2872[; ;pic12f1840.h: 2150: struct {
2873[; ;pic12f1840.h: 2151: unsigned SRRC1E :1;
2874[; ;pic12f1840.h: 2152: unsigned :1;
2875[; ;pic12f1840.h: 2153: unsigned SRRCKE :1;
2876[; ;pic12f1840.h: 2154: unsigned SRRPE :1;
2877[; ;pic12f1840.h: 2155: unsigned SRSC1E :1;
2878[; ;pic12f1840.h: 2156: unsigned :1;
2879[; ;pic12f1840.h: 2157: unsigned SRSCKE :1;
2880[; ;pic12f1840.h: 2158: unsigned SRSPE :1;
2881[; ;pic12f1840.h: 2159: };
2882[; ;pic12f1840.h: 2160: } SRCON1bits_t;
2883[; ;pic12f1840.h: 2161: extern volatile SRCON1bits_t SRCON1bits @ 0x11B;
2884[; ;pic12f1840.h: 2195: extern volatile unsigned char APFCON @ 0x11D;
2885"2197
2886[; ;pic12f1840.h: 2197: asm("APFCON equ 011Dh");
2887[; <" APFCON equ 011Dh ;# ">
2888[; ;pic12f1840.h: 2200: extern volatile unsigned char APFCON0 @ 0x11D;
2889"2202
2890[; ;pic12f1840.h: 2202: asm("APFCON0 equ 011Dh");
2891[; <" APFCON0 equ 011Dh ;# ">
2892[; ;pic12f1840.h: 2205: typedef union {
2893[; ;pic12f1840.h: 2206: struct {
2894[; ;pic12f1840.h: 2207: unsigned CCP1SEL :1;
2895[; ;pic12f1840.h: 2208: unsigned P1BSEL :1;
2896[; ;pic12f1840.h: 2209: unsigned TXCKSEL :1;
2897[; ;pic12f1840.h: 2210: unsigned T1GSEL :1;
2898[; ;pic12f1840.h: 2211: unsigned :1;
2899[; ;pic12f1840.h: 2212: unsigned SSSEL :1;
2900[; ;pic12f1840.h: 2213: unsigned SDOSEL :1;
2901[; ;pic12f1840.h: 2214: unsigned RXDTSEL :1;
2902[; ;pic12f1840.h: 2215: };
2903[; ;pic12f1840.h: 2216: struct {
2904[; ;pic12f1840.h: 2217: unsigned :5;
2905[; ;pic12f1840.h: 2218: unsigned SS1SEL :1;
2906[; ;pic12f1840.h: 2219: unsigned SDO1SEL :1;
2907[; ;pic12f1840.h: 2220: };
2908[; ;pic12f1840.h: 2221: } APFCONbits_t;
2909[; ;pic12f1840.h: 2222: extern volatile APFCONbits_t APFCONbits @ 0x11D;
2910[; ;pic12f1840.h: 2270: typedef union {
2911[; ;pic12f1840.h: 2271: struct {
2912[; ;pic12f1840.h: 2272: unsigned CCP1SEL :1;
2913[; ;pic12f1840.h: 2273: unsigned P1BSEL :1;
2914[; ;pic12f1840.h: 2274: unsigned TXCKSEL :1;
2915[; ;pic12f1840.h: 2275: unsigned T1GSEL :1;
2916[; ;pic12f1840.h: 2276: unsigned :1;
2917[; ;pic12f1840.h: 2277: unsigned SSSEL :1;
2918[; ;pic12f1840.h: 2278: unsigned SDOSEL :1;
2919[; ;pic12f1840.h: 2279: unsigned RXDTSEL :1;
2920[; ;pic12f1840.h: 2280: };
2921[; ;pic12f1840.h: 2281: struct {
2922[; ;pic12f1840.h: 2282: unsigned :5;
2923[; ;pic12f1840.h: 2283: unsigned SS1SEL :1;
2924[; ;pic12f1840.h: 2284: unsigned SDO1SEL :1;
2925[; ;pic12f1840.h: 2285: };
2926[; ;pic12f1840.h: 2286: } APFCON0bits_t;
2927[; ;pic12f1840.h: 2287: extern volatile APFCON0bits_t APFCON0bits @ 0x11D;
2928[; ;pic12f1840.h: 2336: extern volatile unsigned char ANSELA @ 0x18C;
2929"2338
2930[; ;pic12f1840.h: 2338: asm("ANSELA equ 018Ch");
2931[; <" ANSELA equ 018Ch ;# ">
2932[; ;pic12f1840.h: 2341: typedef union {
2933[; ;pic12f1840.h: 2342: struct {
2934[; ;pic12f1840.h: 2343: unsigned ANSA0 :1;
2935[; ;pic12f1840.h: 2344: unsigned ANSA1 :1;
2936[; ;pic12f1840.h: 2345: unsigned ANSA2 :1;
2937[; ;pic12f1840.h: 2346: unsigned :1;
2938[; ;pic12f1840.h: 2347: unsigned ANSA4 :1;
2939[; ;pic12f1840.h: 2348: };
2940[; ;pic12f1840.h: 2349: struct {
2941[; ;pic12f1840.h: 2350: unsigned ANSELA :5;
2942[; ;pic12f1840.h: 2351: };
2943[; ;pic12f1840.h: 2352: } ANSELAbits_t;
2944[; ;pic12f1840.h: 2353: extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
2945[; ;pic12f1840.h: 2382: extern volatile unsigned short EEADR @ 0x191;
2946"2384
2947[; ;pic12f1840.h: 2384: asm("EEADR equ 0191h");
2948[; <" EEADR equ 0191h ;# ">
2949[; ;pic12f1840.h: 2388: extern volatile unsigned char EEADRL @ 0x191;
2950"2390
2951[; ;pic12f1840.h: 2390: asm("EEADRL equ 0191h");
2952[; <" EEADRL equ 0191h ;# ">
2953[; ;pic12f1840.h: 2393: typedef union {
2954[; ;pic12f1840.h: 2394: struct {
2955[; ;pic12f1840.h: 2395: unsigned EEADRL :8;
2956[; ;pic12f1840.h: 2396: };
2957[; ;pic12f1840.h: 2397: } EEADRLbits_t;
2958[; ;pic12f1840.h: 2398: extern volatile EEADRLbits_t EEADRLbits @ 0x191;
2959[; ;pic12f1840.h: 2407: extern volatile unsigned char EEADRH @ 0x192;
2960"2409
2961[; ;pic12f1840.h: 2409: asm("EEADRH equ 0192h");
2962[; <" EEADRH equ 0192h ;# ">
2963[; ;pic12f1840.h: 2412: typedef union {
2964[; ;pic12f1840.h: 2413: struct {
2965[; ;pic12f1840.h: 2414: unsigned EEADRH :7;
2966[; ;pic12f1840.h: 2415: };
2967[; ;pic12f1840.h: 2416: } EEADRHbits_t;
2968[; ;pic12f1840.h: 2417: extern volatile EEADRHbits_t EEADRHbits @ 0x192;
2969[; ;pic12f1840.h: 2426: extern volatile unsigned short EEDAT @ 0x193;
2970"2428
2971[; ;pic12f1840.h: 2428: asm("EEDAT equ 0193h");
2972[; <" EEDAT equ 0193h ;# ">
2973[; ;pic12f1840.h: 2432: extern volatile unsigned char EEDATL @ 0x193;
2974"2434
2975[; ;pic12f1840.h: 2434: asm("EEDATL equ 0193h");
2976[; <" EEDATL equ 0193h ;# ">
2977[; ;pic12f1840.h: 2437: extern volatile unsigned char EEDATA @ 0x193;
2978"2439
2979[; ;pic12f1840.h: 2439: asm("EEDATA equ 0193h");
2980[; <" EEDATA equ 0193h ;# ">
2981[; ;pic12f1840.h: 2442: typedef union {
2982[; ;pic12f1840.h: 2443: struct {
2983[; ;pic12f1840.h: 2444: unsigned EEDATL :8;
2984[; ;pic12f1840.h: 2445: };
2985[; ;pic12f1840.h: 2446: } EEDATLbits_t;
2986[; ;pic12f1840.h: 2447: extern volatile EEDATLbits_t EEDATLbits @ 0x193;
2987[; ;pic12f1840.h: 2455: typedef union {
2988[; ;pic12f1840.h: 2456: struct {
2989[; ;pic12f1840.h: 2457: unsigned EEDATL :8;
2990[; ;pic12f1840.h: 2458: };
2991[; ;pic12f1840.h: 2459: } EEDATAbits_t;
2992[; ;pic12f1840.h: 2460: extern volatile EEDATAbits_t EEDATAbits @ 0x193;
2993[; ;pic12f1840.h: 2469: extern volatile unsigned char EEDATH @ 0x194;
2994"2471
2995[; ;pic12f1840.h: 2471: asm("EEDATH equ 0194h");
2996[; <" EEDATH equ 0194h ;# ">
2997[; ;pic12f1840.h: 2474: typedef union {
2998[; ;pic12f1840.h: 2475: struct {
2999[; ;pic12f1840.h: 2476: unsigned EEDATH :6;
3000[; ;pic12f1840.h: 2477: };
3001[; ;pic12f1840.h: 2478: } EEDATHbits_t;
3002[; ;pic12f1840.h: 2479: extern volatile EEDATHbits_t EEDATHbits @ 0x194;
3003[; ;pic12f1840.h: 2488: extern volatile unsigned char EECON1 @ 0x195;
3004"2490
3005[; ;pic12f1840.h: 2490: asm("EECON1 equ 0195h");
3006[; <" EECON1 equ 0195h ;# ">
3007[; ;pic12f1840.h: 2493: typedef union {
3008[; ;pic12f1840.h: 2494: struct {
3009[; ;pic12f1840.h: 2495: unsigned RD :1;
3010[; ;pic12f1840.h: 2496: unsigned WR :1;
3011[; ;pic12f1840.h: 2497: unsigned WREN :1;
3012[; ;pic12f1840.h: 2498: unsigned WRERR :1;
3013[; ;pic12f1840.h: 2499: unsigned FREE :1;
3014[; ;pic12f1840.h: 2500: unsigned LWLO :1;
3015[; ;pic12f1840.h: 2501: unsigned CFGS :1;
3016[; ;pic12f1840.h: 2502: unsigned EEPGD :1;
3017[; ;pic12f1840.h: 2503: };
3018[; ;pic12f1840.h: 2504: } EECON1bits_t;
3019[; ;pic12f1840.h: 2505: extern volatile EECON1bits_t EECON1bits @ 0x195;
3020[; ;pic12f1840.h: 2549: extern volatile unsigned char EECON2 @ 0x196;
3021"2551
3022[; ;pic12f1840.h: 2551: asm("EECON2 equ 0196h");
3023[; <" EECON2 equ 0196h ;# ">
3024[; ;pic12f1840.h: 2554: typedef union {
3025[; ;pic12f1840.h: 2555: struct {
3026[; ;pic12f1840.h: 2556: unsigned EECON2 :8;
3027[; ;pic12f1840.h: 2557: };
3028[; ;pic12f1840.h: 2558: } EECON2bits_t;
3029[; ;pic12f1840.h: 2559: extern volatile EECON2bits_t EECON2bits @ 0x196;
3030[; ;pic12f1840.h: 2568: extern volatile unsigned char VREGCON @ 0x197;
3031"2570
3032[; ;pic12f1840.h: 2570: asm("VREGCON equ 0197h");
3033[; <" VREGCON equ 0197h ;# ">
3034[; ;pic12f1840.h: 2573: typedef union {
3035[; ;pic12f1840.h: 2574: struct {
3036[; ;pic12f1840.h: 2575: unsigned VREGPM0 :1;
3037[; ;pic12f1840.h: 2576: unsigned VREGPM1 :1;
3038[; ;pic12f1840.h: 2577: };
3039[; ;pic12f1840.h: 2578: struct {
3040[; ;pic12f1840.h: 2579: unsigned VREGPM :2;
3041[; ;pic12f1840.h: 2580: };
3042[; ;pic12f1840.h: 2581: } VREGCONbits_t;
3043[; ;pic12f1840.h: 2582: extern volatile VREGCONbits_t VREGCONbits @ 0x197;
3044[; ;pic12f1840.h: 2601: extern volatile unsigned char RCREG @ 0x199;
3045"2603
3046[; ;pic12f1840.h: 2603: asm("RCREG equ 0199h");
3047[; <" RCREG equ 0199h ;# ">
3048[; ;pic12f1840.h: 2606: typedef union {
3049[; ;pic12f1840.h: 2607: struct {
3050[; ;pic12f1840.h: 2608: unsigned RCREG :8;
3051[; ;pic12f1840.h: 2609: };
3052[; ;pic12f1840.h: 2610: } RCREGbits_t;
3053[; ;pic12f1840.h: 2611: extern volatile RCREGbits_t RCREGbits @ 0x199;
3054[; ;pic12f1840.h: 2620: extern volatile unsigned char TXREG @ 0x19A;
3055"2622
3056[; ;pic12f1840.h: 2622: asm("TXREG equ 019Ah");
3057[; <" TXREG equ 019Ah ;# ">
3058[; ;pic12f1840.h: 2625: typedef union {
3059[; ;pic12f1840.h: 2626: struct {
3060[; ;pic12f1840.h: 2627: unsigned TXREG :8;
3061[; ;pic12f1840.h: 2628: };
3062[; ;pic12f1840.h: 2629: } TXREGbits_t;
3063[; ;pic12f1840.h: 2630: extern volatile TXREGbits_t TXREGbits @ 0x19A;
3064[; ;pic12f1840.h: 2639: extern volatile unsigned char SPBRGL @ 0x19B;
3065"2641
3066[; ;pic12f1840.h: 2641: asm("SPBRGL equ 019Bh");
3067[; <" SPBRGL equ 019Bh ;# ">
3068[; ;pic12f1840.h: 2644: extern volatile unsigned char SPBRG @ 0x19B;
3069"2646
3070[; ;pic12f1840.h: 2646: asm("SPBRG equ 019Bh");
3071[; <" SPBRG equ 019Bh ;# ">
3072[; ;pic12f1840.h: 2649: typedef union {
3073[; ;pic12f1840.h: 2650: struct {
3074[; ;pic12f1840.h: 2651: unsigned SPBRGL :8;
3075[; ;pic12f1840.h: 2652: };
3076[; ;pic12f1840.h: 2653: } SPBRGLbits_t;
3077[; ;pic12f1840.h: 2654: extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
3078[; ;pic12f1840.h: 2662: typedef union {
3079[; ;pic12f1840.h: 2663: struct {
3080[; ;pic12f1840.h: 2664: unsigned SPBRGL :8;
3081[; ;pic12f1840.h: 2665: };
3082[; ;pic12f1840.h: 2666: } SPBRGbits_t;
3083[; ;pic12f1840.h: 2667: extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
3084[; ;pic12f1840.h: 2676: extern volatile unsigned char SPBRGH @ 0x19C;
3085"2678
3086[; ;pic12f1840.h: 2678: asm("SPBRGH equ 019Ch");
3087[; <" SPBRGH equ 019Ch ;# ">
3088[; ;pic12f1840.h: 2681: typedef union {
3089[; ;pic12f1840.h: 2682: struct {
3090[; ;pic12f1840.h: 2683: unsigned SPBRGH :8;
3091[; ;pic12f1840.h: 2684: };
3092[; ;pic12f1840.h: 2685: } SPBRGHbits_t;
3093[; ;pic12f1840.h: 2686: extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
3094[; ;pic12f1840.h: 2695: extern volatile unsigned char RCSTA @ 0x19D;
3095"2697
3096[; ;pic12f1840.h: 2697: asm("RCSTA equ 019Dh");
3097[; <" RCSTA equ 019Dh ;# ">
3098[; ;pic12f1840.h: 2700: typedef union {
3099[; ;pic12f1840.h: 2701: struct {
3100[; ;pic12f1840.h: 2702: unsigned RX9D :1;
3101[; ;pic12f1840.h: 2703: unsigned OERR :1;
3102[; ;pic12f1840.h: 2704: unsigned FERR :1;
3103[; ;pic12f1840.h: 2705: unsigned ADDEN :1;
3104[; ;pic12f1840.h: 2706: unsigned CREN :1;
3105[; ;pic12f1840.h: 2707: unsigned SREN :1;
3106[; ;pic12f1840.h: 2708: unsigned RX9 :1;
3107[; ;pic12f1840.h: 2709: unsigned SPEN :1;
3108[; ;pic12f1840.h: 2710: };
3109[; ;pic12f1840.h: 2711: } RCSTAbits_t;
3110[; ;pic12f1840.h: 2712: extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
3111[; ;pic12f1840.h: 2756: extern volatile unsigned char TXSTA @ 0x19E;
3112"2758
3113[; ;pic12f1840.h: 2758: asm("TXSTA equ 019Eh");
3114[; <" TXSTA equ 019Eh ;# ">
3115[; ;pic12f1840.h: 2761: typedef union {
3116[; ;pic12f1840.h: 2762: struct {
3117[; ;pic12f1840.h: 2763: unsigned TX9D :1;
3118[; ;pic12f1840.h: 2764: unsigned TRMT :1;
3119[; ;pic12f1840.h: 2765: unsigned BRGH :1;
3120[; ;pic12f1840.h: 2766: unsigned SENDB :1;
3121[; ;pic12f1840.h: 2767: unsigned SYNC :1;
3122[; ;pic12f1840.h: 2768: unsigned TXEN :1;
3123[; ;pic12f1840.h: 2769: unsigned TX9 :1;
3124[; ;pic12f1840.h: 2770: unsigned CSRC :1;
3125[; ;pic12f1840.h: 2771: };
3126[; ;pic12f1840.h: 2772: } TXSTAbits_t;
3127[; ;pic12f1840.h: 2773: extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
3128[; ;pic12f1840.h: 2817: extern volatile unsigned char BAUDCON @ 0x19F;
3129"2819
3130[; ;pic12f1840.h: 2819: asm("BAUDCON equ 019Fh");
3131[; <" BAUDCON equ 019Fh ;# ">
3132[; ;pic12f1840.h: 2822: typedef union {
3133[; ;pic12f1840.h: 2823: struct {
3134[; ;pic12f1840.h: 2824: unsigned ABDEN :1;
3135[; ;pic12f1840.h: 2825: unsigned WUE :1;
3136[; ;pic12f1840.h: 2826: unsigned :1;
3137[; ;pic12f1840.h: 2827: unsigned BRG16 :1;
3138[; ;pic12f1840.h: 2828: unsigned SCKP :1;
3139[; ;pic12f1840.h: 2829: unsigned :1;
3140[; ;pic12f1840.h: 2830: unsigned RCIDL :1;
3141[; ;pic12f1840.h: 2831: unsigned ABDOVF :1;
3142[; ;pic12f1840.h: 2832: };
3143[; ;pic12f1840.h: 2833: } BAUDCONbits_t;
3144[; ;pic12f1840.h: 2834: extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
3145[; ;pic12f1840.h: 2868: extern volatile unsigned char WPUA @ 0x20C;
3146"2870
3147[; ;pic12f1840.h: 2870: asm("WPUA equ 020Ch");
3148[; <" WPUA equ 020Ch ;# ">
3149[; ;pic12f1840.h: 2873: typedef union {
3150[; ;pic12f1840.h: 2874: struct {
3151[; ;pic12f1840.h: 2875: unsigned WPUA0 :1;
3152[; ;pic12f1840.h: 2876: unsigned WPUA1 :1;
3153[; ;pic12f1840.h: 2877: unsigned WPUA2 :1;
3154[; ;pic12f1840.h: 2878: unsigned WPUA3 :1;
3155[; ;pic12f1840.h: 2879: unsigned WPUA4 :1;
3156[; ;pic12f1840.h: 2880: unsigned WPUA5 :1;
3157[; ;pic12f1840.h: 2881: };
3158[; ;pic12f1840.h: 2882: struct {
3159[; ;pic12f1840.h: 2883: unsigned WPUA :6;
3160[; ;pic12f1840.h: 2884: };
3161[; ;pic12f1840.h: 2885: } WPUAbits_t;
3162[; ;pic12f1840.h: 2886: extern volatile WPUAbits_t WPUAbits @ 0x20C;
3163[; ;pic12f1840.h: 2925: extern volatile unsigned char SSP1BUF @ 0x211;
3164"2927
3165[; ;pic12f1840.h: 2927: asm("SSP1BUF equ 0211h");
3166[; <" SSP1BUF equ 0211h ;# ">
3167[; ;pic12f1840.h: 2930: extern volatile unsigned char SSPBUF @ 0x211;
3168"2932
3169[; ;pic12f1840.h: 2932: asm("SSPBUF equ 0211h");
3170[; <" SSPBUF equ 0211h ;# ">
3171[; ;pic12f1840.h: 2935: typedef union {
3172[; ;pic12f1840.h: 2936: struct {
3173[; ;pic12f1840.h: 2937: unsigned SSPBUF :8;
3174[; ;pic12f1840.h: 2938: };
3175[; ;pic12f1840.h: 2939: } SSP1BUFbits_t;
3176[; ;pic12f1840.h: 2940: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
3177[; ;pic12f1840.h: 2948: typedef union {
3178[; ;pic12f1840.h: 2949: struct {
3179[; ;pic12f1840.h: 2950: unsigned SSPBUF :8;
3180[; ;pic12f1840.h: 2951: };
3181[; ;pic12f1840.h: 2952: } SSPBUFbits_t;
3182[; ;pic12f1840.h: 2953: extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
3183[; ;pic12f1840.h: 2962: extern volatile unsigned char SSP1ADD @ 0x212;
3184"2964
3185[; ;pic12f1840.h: 2964: asm("SSP1ADD equ 0212h");
3186[; <" SSP1ADD equ 0212h ;# ">
3187[; ;pic12f1840.h: 2967: extern volatile unsigned char SSPADD @ 0x212;
3188"2969
3189[; ;pic12f1840.h: 2969: asm("SSPADD equ 0212h");
3190[; <" SSPADD equ 0212h ;# ">
3191[; ;pic12f1840.h: 2972: typedef union {
3192[; ;pic12f1840.h: 2973: struct {
3193[; ;pic12f1840.h: 2974: unsigned SSPADD :8;
3194[; ;pic12f1840.h: 2975: };
3195[; ;pic12f1840.h: 2976: } SSP1ADDbits_t;
3196[; ;pic12f1840.h: 2977: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
3197[; ;pic12f1840.h: 2985: typedef union {
3198[; ;pic12f1840.h: 2986: struct {
3199[; ;pic12f1840.h: 2987: unsigned SSPADD :8;
3200[; ;pic12f1840.h: 2988: };
3201[; ;pic12f1840.h: 2989: } SSPADDbits_t;
3202[; ;pic12f1840.h: 2990: extern volatile SSPADDbits_t SSPADDbits @ 0x212;
3203[; ;pic12f1840.h: 2999: extern volatile unsigned char SSP1MSK @ 0x213;
3204"3001
3205[; ;pic12f1840.h: 3001: asm("SSP1MSK equ 0213h");
3206[; <" SSP1MSK equ 0213h ;# ">
3207[; ;pic12f1840.h: 3004: extern volatile unsigned char SSPMSK @ 0x213;
3208"3006
3209[; ;pic12f1840.h: 3006: asm("SSPMSK equ 0213h");
3210[; <" SSPMSK equ 0213h ;# ">
3211[; ;pic12f1840.h: 3009: typedef union {
3212[; ;pic12f1840.h: 3010: struct {
3213[; ;pic12f1840.h: 3011: unsigned SSPMSK :8;
3214[; ;pic12f1840.h: 3012: };
3215[; ;pic12f1840.h: 3013: } SSP1MSKbits_t;
3216[; ;pic12f1840.h: 3014: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
3217[; ;pic12f1840.h: 3022: typedef union {
3218[; ;pic12f1840.h: 3023: struct {
3219[; ;pic12f1840.h: 3024: unsigned SSPMSK :8;
3220[; ;pic12f1840.h: 3025: };
3221[; ;pic12f1840.h: 3026: } SSPMSKbits_t;
3222[; ;pic12f1840.h: 3027: extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
3223[; ;pic12f1840.h: 3036: extern volatile unsigned char SSP1STAT @ 0x214;
3224"3038
3225[; ;pic12f1840.h: 3038: asm("SSP1STAT equ 0214h");
3226[; <" SSP1STAT equ 0214h ;# ">
3227[; ;pic12f1840.h: 3041: extern volatile unsigned char SSPSTAT @ 0x214;
3228"3043
3229[; ;pic12f1840.h: 3043: asm("SSPSTAT equ 0214h");
3230[; <" SSPSTAT equ 0214h ;# ">
3231[; ;pic12f1840.h: 3046: typedef union {
3232[; ;pic12f1840.h: 3047: struct {
3233[; ;pic12f1840.h: 3048: unsigned BF :1;
3234[; ;pic12f1840.h: 3049: unsigned UA :1;
3235[; ;pic12f1840.h: 3050: unsigned R_nW :1;
3236[; ;pic12f1840.h: 3051: unsigned S :1;
3237[; ;pic12f1840.h: 3052: unsigned P :1;
3238[; ;pic12f1840.h: 3053: unsigned D_nA :1;
3239[; ;pic12f1840.h: 3054: unsigned CKE :1;
3240[; ;pic12f1840.h: 3055: unsigned SMP :1;
3241[; ;pic12f1840.h: 3056: };
3242[; ;pic12f1840.h: 3057: } SSP1STATbits_t;
3243[; ;pic12f1840.h: 3058: extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
3244[; ;pic12f1840.h: 3101: typedef union {
3245[; ;pic12f1840.h: 3102: struct {
3246[; ;pic12f1840.h: 3103: unsigned BF :1;
3247[; ;pic12f1840.h: 3104: unsigned UA :1;
3248[; ;pic12f1840.h: 3105: unsigned R_nW :1;
3249[; ;pic12f1840.h: 3106: unsigned S :1;
3250[; ;pic12f1840.h: 3107: unsigned P :1;
3251[; ;pic12f1840.h: 3108: unsigned D_nA :1;
3252[; ;pic12f1840.h: 3109: unsigned CKE :1;
3253[; ;pic12f1840.h: 3110: unsigned SMP :1;
3254[; ;pic12f1840.h: 3111: };
3255[; ;pic12f1840.h: 3112: } SSPSTATbits_t;
3256[; ;pic12f1840.h: 3113: extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
3257[; ;pic12f1840.h: 3157: extern volatile unsigned char SSP1CON1 @ 0x215;
3258"3159
3259[; ;pic12f1840.h: 3159: asm("SSP1CON1 equ 0215h");
3260[; <" SSP1CON1 equ 0215h ;# ">
3261[; ;pic12f1840.h: 3162: extern volatile unsigned char SSPCON1 @ 0x215;
3262"3164
3263[; ;pic12f1840.h: 3164: asm("SSPCON1 equ 0215h");
3264[; <" SSPCON1 equ 0215h ;# ">
3265[; ;pic12f1840.h: 3166: extern volatile unsigned char SSPCON @ 0x215;
3266"3168
3267[; ;pic12f1840.h: 3168: asm("SSPCON equ 0215h");
3268[; <" SSPCON equ 0215h ;# ">
3269[; ;pic12f1840.h: 3171: typedef union {
3270[; ;pic12f1840.h: 3172: struct {
3271[; ;pic12f1840.h: 3173: unsigned SSPM0 :1;
3272[; ;pic12f1840.h: 3174: unsigned SSPM1 :1;
3273[; ;pic12f1840.h: 3175: unsigned SSPM2 :1;
3274[; ;pic12f1840.h: 3176: unsigned SSPM3 :1;
3275[; ;pic12f1840.h: 3177: unsigned CKP :1;
3276[; ;pic12f1840.h: 3178: unsigned SSPEN :1;
3277[; ;pic12f1840.h: 3179: unsigned SSPOV :1;
3278[; ;pic12f1840.h: 3180: unsigned WCOL :1;
3279[; ;pic12f1840.h: 3181: };
3280[; ;pic12f1840.h: 3182: struct {
3281[; ;pic12f1840.h: 3183: unsigned SSPM :4;
3282[; ;pic12f1840.h: 3184: };
3283[; ;pic12f1840.h: 3185: } SSP1CON1bits_t;
3284[; ;pic12f1840.h: 3186: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
3285[; ;pic12f1840.h: 3234: typedef union {
3286[; ;pic12f1840.h: 3235: struct {
3287[; ;pic12f1840.h: 3236: unsigned SSPM0 :1;
3288[; ;pic12f1840.h: 3237: unsigned SSPM1 :1;
3289[; ;pic12f1840.h: 3238: unsigned SSPM2 :1;
3290[; ;pic12f1840.h: 3239: unsigned SSPM3 :1;
3291[; ;pic12f1840.h: 3240: unsigned CKP :1;
3292[; ;pic12f1840.h: 3241: unsigned SSPEN :1;
3293[; ;pic12f1840.h: 3242: unsigned SSPOV :1;
3294[; ;pic12f1840.h: 3243: unsigned WCOL :1;
3295[; ;pic12f1840.h: 3244: };
3296[; ;pic12f1840.h: 3245: struct {
3297[; ;pic12f1840.h: 3246: unsigned SSPM :4;
3298[; ;pic12f1840.h: 3247: };
3299[; ;pic12f1840.h: 3248: } SSPCON1bits_t;
3300[; ;pic12f1840.h: 3249: extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
3301[; ;pic12f1840.h: 3296: typedef union {
3302[; ;pic12f1840.h: 3297: struct {
3303[; ;pic12f1840.h: 3298: unsigned SSPM0 :1;
3304[; ;pic12f1840.h: 3299: unsigned SSPM1 :1;
3305[; ;pic12f1840.h: 3300: unsigned SSPM2 :1;
3306[; ;pic12f1840.h: 3301: unsigned SSPM3 :1;
3307[; ;pic12f1840.h: 3302: unsigned CKP :1;
3308[; ;pic12f1840.h: 3303: unsigned SSPEN :1;
3309[; ;pic12f1840.h: 3304: unsigned SSPOV :1;
3310[; ;pic12f1840.h: 3305: unsigned WCOL :1;
3311[; ;pic12f1840.h: 3306: };
3312[; ;pic12f1840.h: 3307: struct {
3313[; ;pic12f1840.h: 3308: unsigned SSPM :4;
3314[; ;pic12f1840.h: 3309: };
3315[; ;pic12f1840.h: 3310: } SSPCONbits_t;
3316[; ;pic12f1840.h: 3311: extern volatile SSPCONbits_t SSPCONbits @ 0x215;
3317[; ;pic12f1840.h: 3360: extern volatile unsigned char SSP1CON2 @ 0x216;
3318"3362
3319[; ;pic12f1840.h: 3362: asm("SSP1CON2 equ 0216h");
3320[; <" SSP1CON2 equ 0216h ;# ">
3321[; ;pic12f1840.h: 3365: extern volatile unsigned char SSPCON2 @ 0x216;
3322"3367
3323[; ;pic12f1840.h: 3367: asm("SSPCON2 equ 0216h");
3324[; <" SSPCON2 equ 0216h ;# ">
3325[; ;pic12f1840.h: 3370: typedef union {
3326[; ;pic12f1840.h: 3371: struct {
3327[; ;pic12f1840.h: 3372: unsigned SEN :1;
3328[; ;pic12f1840.h: 3373: unsigned RSEN :1;
3329[; ;pic12f1840.h: 3374: unsigned PEN :1;
3330[; ;pic12f1840.h: 3375: unsigned RCEN :1;
3331[; ;pic12f1840.h: 3376: unsigned ACKEN :1;
3332[; ;pic12f1840.h: 3377: unsigned ACKDT :1;
3333[; ;pic12f1840.h: 3378: unsigned ACKSTAT :1;
3334[; ;pic12f1840.h: 3379: unsigned GCEN :1;
3335[; ;pic12f1840.h: 3380: };
3336[; ;pic12f1840.h: 3381: } SSP1CON2bits_t;
3337[; ;pic12f1840.h: 3382: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
3338[; ;pic12f1840.h: 3425: typedef union {
3339[; ;pic12f1840.h: 3426: struct {
3340[; ;pic12f1840.h: 3427: unsigned SEN :1;
3341[; ;pic12f1840.h: 3428: unsigned RSEN :1;
3342[; ;pic12f1840.h: 3429: unsigned PEN :1;
3343[; ;pic12f1840.h: 3430: unsigned RCEN :1;
3344[; ;pic12f1840.h: 3431: unsigned ACKEN :1;
3345[; ;pic12f1840.h: 3432: unsigned ACKDT :1;
3346[; ;pic12f1840.h: 3433: unsigned ACKSTAT :1;
3347[; ;pic12f1840.h: 3434: unsigned GCEN :1;
3348[; ;pic12f1840.h: 3435: };
3349[; ;pic12f1840.h: 3436: } SSPCON2bits_t;
3350[; ;pic12f1840.h: 3437: extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
3351[; ;pic12f1840.h: 3481: extern volatile unsigned char SSP1CON3 @ 0x217;
3352"3483
3353[; ;pic12f1840.h: 3483: asm("SSP1CON3 equ 0217h");
3354[; <" SSP1CON3 equ 0217h ;# ">
3355[; ;pic12f1840.h: 3486: extern volatile unsigned char SSPCON3 @ 0x217;
3356"3488
3357[; ;pic12f1840.h: 3488: asm("SSPCON3 equ 0217h");
3358[; <" SSPCON3 equ 0217h ;# ">
3359[; ;pic12f1840.h: 3491: typedef union {
3360[; ;pic12f1840.h: 3492: struct {
3361[; ;pic12f1840.h: 3493: unsigned DHEN :1;
3362[; ;pic12f1840.h: 3494: unsigned AHEN :1;
3363[; ;pic12f1840.h: 3495: unsigned SBCDE :1;
3364[; ;pic12f1840.h: 3496: unsigned SDAHT :1;
3365[; ;pic12f1840.h: 3497: unsigned BOEN :1;
3366[; ;pic12f1840.h: 3498: unsigned SCIE :1;
3367[; ;pic12f1840.h: 3499: unsigned PCIE :1;
3368[; ;pic12f1840.h: 3500: unsigned ACKTIM :1;
3369[; ;pic12f1840.h: 3501: };
3370[; ;pic12f1840.h: 3502: } SSP1CON3bits_t;
3371[; ;pic12f1840.h: 3503: extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
3372[; ;pic12f1840.h: 3546: typedef union {
3373[; ;pic12f1840.h: 3547: struct {
3374[; ;pic12f1840.h: 3548: unsigned DHEN :1;
3375[; ;pic12f1840.h: 3549: unsigned AHEN :1;
3376[; ;pic12f1840.h: 3550: unsigned SBCDE :1;
3377[; ;pic12f1840.h: 3551: unsigned SDAHT :1;
3378[; ;pic12f1840.h: 3552: unsigned BOEN :1;
3379[; ;pic12f1840.h: 3553: unsigned SCIE :1;
3380[; ;pic12f1840.h: 3554: unsigned PCIE :1;
3381[; ;pic12f1840.h: 3555: unsigned ACKTIM :1;
3382[; ;pic12f1840.h: 3556: };
3383[; ;pic12f1840.h: 3557: } SSPCON3bits_t;
3384[; ;pic12f1840.h: 3558: extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
3385[; ;pic12f1840.h: 3602: extern volatile unsigned char CCPR1L @ 0x291;
3386"3604
3387[; ;pic12f1840.h: 3604: asm("CCPR1L equ 0291h");
3388[; <" CCPR1L equ 0291h ;# ">
3389[; ;pic12f1840.h: 3607: typedef union {
3390[; ;pic12f1840.h: 3608: struct {
3391[; ;pic12f1840.h: 3609: unsigned CCPR1L :8;
3392[; ;pic12f1840.h: 3610: };
3393[; ;pic12f1840.h: 3611: } CCPR1Lbits_t;
3394[; ;pic12f1840.h: 3612: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
3395[; ;pic12f1840.h: 3621: extern volatile unsigned char CCPR1H @ 0x292;
3396"3623
3397[; ;pic12f1840.h: 3623: asm("CCPR1H equ 0292h");
3398[; <" CCPR1H equ 0292h ;# ">
3399[; ;pic12f1840.h: 3626: typedef union {
3400[; ;pic12f1840.h: 3627: struct {
3401[; ;pic12f1840.h: 3628: unsigned CCPR1H :8;
3402[; ;pic12f1840.h: 3629: };
3403[; ;pic12f1840.h: 3630: } CCPR1Hbits_t;
3404[; ;pic12f1840.h: 3631: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
3405[; ;pic12f1840.h: 3640: extern volatile unsigned char CCP1CON @ 0x293;
3406"3642
3407[; ;pic12f1840.h: 3642: asm("CCP1CON equ 0293h");
3408[; <" CCP1CON equ 0293h ;# ">
3409[; ;pic12f1840.h: 3645: typedef union {
3410[; ;pic12f1840.h: 3646: struct {
3411[; ;pic12f1840.h: 3647: unsigned CCP1M0 :1;
3412[; ;pic12f1840.h: 3648: unsigned CCP1M1 :1;
3413[; ;pic12f1840.h: 3649: unsigned CCP1M2 :1;
3414[; ;pic12f1840.h: 3650: unsigned CCP1M3 :1;
3415[; ;pic12f1840.h: 3651: unsigned DC1B0 :1;
3416[; ;pic12f1840.h: 3652: unsigned DC1B1 :1;
3417[; ;pic12f1840.h: 3653: unsigned P1M0 :1;
3418[; ;pic12f1840.h: 3654: unsigned P1M1 :1;
3419[; ;pic12f1840.h: 3655: };
3420[; ;pic12f1840.h: 3656: struct {
3421[; ;pic12f1840.h: 3657: unsigned CCP1M :4;
3422[; ;pic12f1840.h: 3658: unsigned DC1B :2;
3423[; ;pic12f1840.h: 3659: unsigned P1M :2;
3424[; ;pic12f1840.h: 3660: };
3425[; ;pic12f1840.h: 3661: } CCP1CONbits_t;
3426[; ;pic12f1840.h: 3662: extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
3427[; ;pic12f1840.h: 3721: extern volatile unsigned char PWM1CON @ 0x294;
3428"3723
3429[; ;pic12f1840.h: 3723: asm("PWM1CON equ 0294h");
3430[; <" PWM1CON equ 0294h ;# ">
3431[; ;pic12f1840.h: 3726: typedef union {
3432[; ;pic12f1840.h: 3727: struct {
3433[; ;pic12f1840.h: 3728: unsigned P1DC0 :1;
3434[; ;pic12f1840.h: 3729: unsigned P1DC1 :1;
3435[; ;pic12f1840.h: 3730: unsigned P1DC2 :1;
3436[; ;pic12f1840.h: 3731: unsigned P1DC3 :1;
3437[; ;pic12f1840.h: 3732: unsigned P1DC4 :1;
3438[; ;pic12f1840.h: 3733: unsigned P1DC5 :1;
3439[; ;pic12f1840.h: 3734: unsigned P1DC6 :1;
3440[; ;pic12f1840.h: 3735: unsigned P1RSEN :1;
3441[; ;pic12f1840.h: 3736: };
3442[; ;pic12f1840.h: 3737: struct {
3443[; ;pic12f1840.h: 3738: unsigned P1DC :7;
3444[; ;pic12f1840.h: 3739: };
3445[; ;pic12f1840.h: 3740: } PWM1CONbits_t;
3446[; ;pic12f1840.h: 3741: extern volatile PWM1CONbits_t PWM1CONbits @ 0x294;
3447[; ;pic12f1840.h: 3790: extern volatile unsigned char CCP1AS @ 0x295;
3448"3792
3449[; ;pic12f1840.h: 3792: asm("CCP1AS equ 0295h");
3450[; <" CCP1AS equ 0295h ;# ">
3451[; ;pic12f1840.h: 3795: extern volatile unsigned char ECCP1AS @ 0x295;
3452"3797
3453[; ;pic12f1840.h: 3797: asm("ECCP1AS equ 0295h");
3454[; <" ECCP1AS equ 0295h ;# ">
3455[; ;pic12f1840.h: 3800: typedef union {
3456[; ;pic12f1840.h: 3801: struct {
3457[; ;pic12f1840.h: 3802: unsigned PSS1BD0 :1;
3458[; ;pic12f1840.h: 3803: unsigned PSS1BD1 :1;
3459[; ;pic12f1840.h: 3804: unsigned PSS1AC0 :1;
3460[; ;pic12f1840.h: 3805: unsigned PSS1AC1 :1;
3461[; ;pic12f1840.h: 3806: unsigned CCP1AS0 :1;
3462[; ;pic12f1840.h: 3807: unsigned CCP1AS1 :1;
3463[; ;pic12f1840.h: 3808: unsigned CCP1AS2 :1;
3464[; ;pic12f1840.h: 3809: unsigned CCP1ASE :1;
3465[; ;pic12f1840.h: 3810: };
3466[; ;pic12f1840.h: 3811: struct {
3467[; ;pic12f1840.h: 3812: unsigned PSS1BD :2;
3468[; ;pic12f1840.h: 3813: unsigned PSS1AC :2;
3469[; ;pic12f1840.h: 3814: unsigned CCP1AS :3;
3470[; ;pic12f1840.h: 3815: };
3471[; ;pic12f1840.h: 3816: } CCP1ASbits_t;
3472[; ;pic12f1840.h: 3817: extern volatile CCP1ASbits_t CCP1ASbits @ 0x295;
3473[; ;pic12f1840.h: 3875: typedef union {
3474[; ;pic12f1840.h: 3876: struct {
3475[; ;pic12f1840.h: 3877: unsigned PSS1BD0 :1;
3476[; ;pic12f1840.h: 3878: unsigned PSS1BD1 :1;
3477[; ;pic12f1840.h: 3879: unsigned PSS1AC0 :1;
3478[; ;pic12f1840.h: 3880: unsigned PSS1AC1 :1;
3479[; ;pic12f1840.h: 3881: unsigned CCP1AS0 :1;
3480[; ;pic12f1840.h: 3882: unsigned CCP1AS1 :1;
3481[; ;pic12f1840.h: 3883: unsigned CCP1AS2 :1;
3482[; ;pic12f1840.h: 3884: unsigned CCP1ASE :1;
3483[; ;pic12f1840.h: 3885: };
3484[; ;pic12f1840.h: 3886: struct {
3485[; ;pic12f1840.h: 3887: unsigned PSS1BD :2;
3486[; ;pic12f1840.h: 3888: unsigned PSS1AC :2;
3487[; ;pic12f1840.h: 3889: unsigned CCP1AS :3;
3488[; ;pic12f1840.h: 3890: };
3489[; ;pic12f1840.h: 3891: } ECCP1ASbits_t;
3490[; ;pic12f1840.h: 3892: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0x295;
3491[; ;pic12f1840.h: 3951: extern volatile unsigned char PSTR1CON @ 0x296;
3492"3953
3493[; ;pic12f1840.h: 3953: asm("PSTR1CON equ 0296h");
3494[; <" PSTR1CON equ 0296h ;# ">
3495[; ;pic12f1840.h: 3956: typedef union {
3496[; ;pic12f1840.h: 3957: struct {
3497[; ;pic12f1840.h: 3958: unsigned STR1A :1;
3498[; ;pic12f1840.h: 3959: unsigned STR1B :1;
3499[; ;pic12f1840.h: 3960: unsigned :1;
3500[; ;pic12f1840.h: 3961: unsigned :1;
3501[; ;pic12f1840.h: 3962: unsigned STR1SYNC :1;
3502[; ;pic12f1840.h: 3963: };
3503[; ;pic12f1840.h: 3964: } PSTR1CONbits_t;
3504[; ;pic12f1840.h: 3965: extern volatile PSTR1CONbits_t PSTR1CONbits @ 0x296;
3505[; ;pic12f1840.h: 3984: extern volatile unsigned char IOCAP @ 0x391;
3506"3986
3507[; ;pic12f1840.h: 3986: asm("IOCAP equ 0391h");
3508[; <" IOCAP equ 0391h ;# ">
3509[; ;pic12f1840.h: 3989: typedef union {
3510[; ;pic12f1840.h: 3990: struct {
3511[; ;pic12f1840.h: 3991: unsigned IOCAP0 :1;
3512[; ;pic12f1840.h: 3992: unsigned IOCAP1 :1;
3513[; ;pic12f1840.h: 3993: unsigned IOCAP2 :1;
3514[; ;pic12f1840.h: 3994: unsigned IOCAP3 :1;
3515[; ;pic12f1840.h: 3995: unsigned IOCAP4 :1;
3516[; ;pic12f1840.h: 3996: unsigned IOCAP5 :1;
3517[; ;pic12f1840.h: 3997: };
3518[; ;pic12f1840.h: 3998: struct {
3519[; ;pic12f1840.h: 3999: unsigned IOCAP :6;
3520[; ;pic12f1840.h: 4000: };
3521[; ;pic12f1840.h: 4001: } IOCAPbits_t;
3522[; ;pic12f1840.h: 4002: extern volatile IOCAPbits_t IOCAPbits @ 0x391;
3523[; ;pic12f1840.h: 4041: extern volatile unsigned char IOCAN @ 0x392;
3524"4043
3525[; ;pic12f1840.h: 4043: asm("IOCAN equ 0392h");
3526[; <" IOCAN equ 0392h ;# ">
3527[; ;pic12f1840.h: 4046: typedef union {
3528[; ;pic12f1840.h: 4047: struct {
3529[; ;pic12f1840.h: 4048: unsigned IOCAN0 :1;
3530[; ;pic12f1840.h: 4049: unsigned IOCAN1 :1;
3531[; ;pic12f1840.h: 4050: unsigned IOCAN2 :1;
3532[; ;pic12f1840.h: 4051: unsigned IOCAN3 :1;
3533[; ;pic12f1840.h: 4052: unsigned IOCAN4 :1;
3534[; ;pic12f1840.h: 4053: unsigned IOCAN5 :1;
3535[; ;pic12f1840.h: 4054: };
3536[; ;pic12f1840.h: 4055: struct {
3537[; ;pic12f1840.h: 4056: unsigned IOCAN :6;
3538[; ;pic12f1840.h: 4057: };
3539[; ;pic12f1840.h: 4058: } IOCANbits_t;
3540[; ;pic12f1840.h: 4059: extern volatile IOCANbits_t IOCANbits @ 0x392;
3541[; ;pic12f1840.h: 4098: extern volatile unsigned char IOCAF @ 0x393;
3542"4100
3543[; ;pic12f1840.h: 4100: asm("IOCAF equ 0393h");
3544[; <" IOCAF equ 0393h ;# ">
3545[; ;pic12f1840.h: 4103: typedef union {
3546[; ;pic12f1840.h: 4104: struct {
3547[; ;pic12f1840.h: 4105: unsigned IOCAF0 :1;
3548[; ;pic12f1840.h: 4106: unsigned IOCAF1 :1;
3549[; ;pic12f1840.h: 4107: unsigned IOCAF2 :1;
3550[; ;pic12f1840.h: 4108: unsigned IOCAF3 :1;
3551[; ;pic12f1840.h: 4109: unsigned IOCAF4 :1;
3552[; ;pic12f1840.h: 4110: unsigned IOCAF5 :1;
3553[; ;pic12f1840.h: 4111: };
3554[; ;pic12f1840.h: 4112: struct {
3555[; ;pic12f1840.h: 4113: unsigned IOCAF :6;
3556[; ;pic12f1840.h: 4114: };
3557[; ;pic12f1840.h: 4115: } IOCAFbits_t;
3558[; ;pic12f1840.h: 4116: extern volatile IOCAFbits_t IOCAFbits @ 0x393;
3559[; ;pic12f1840.h: 4155: extern volatile unsigned char CLKRCON @ 0x39A;
3560"4157
3561[; ;pic12f1840.h: 4157: asm("CLKRCON equ 039Ah");
3562[; <" CLKRCON equ 039Ah ;# ">
3563[; ;pic12f1840.h: 4160: typedef union {
3564[; ;pic12f1840.h: 4161: struct {
3565[; ;pic12f1840.h: 4162: unsigned CLKRDIV0 :1;
3566[; ;pic12f1840.h: 4163: unsigned CLKRDIV1 :1;
3567[; ;pic12f1840.h: 4164: unsigned CLKRDIV2 :1;
3568[; ;pic12f1840.h: 4165: unsigned CLKRDC0 :1;
3569[; ;pic12f1840.h: 4166: unsigned CLKRDC1 :1;
3570[; ;pic12f1840.h: 4167: unsigned CLKRSLR :1;
3571[; ;pic12f1840.h: 4168: unsigned CLKROE :1;
3572[; ;pic12f1840.h: 4169: unsigned CLKREN :1;
3573[; ;pic12f1840.h: 4170: };
3574[; ;pic12f1840.h: 4171: struct {
3575[; ;pic12f1840.h: 4172: unsigned CLKRDIV :3;
3576[; ;pic12f1840.h: 4173: unsigned CLKRDC :2;
3577[; ;pic12f1840.h: 4174: };
3578[; ;pic12f1840.h: 4175: } CLKRCONbits_t;
3579[; ;pic12f1840.h: 4176: extern volatile CLKRCONbits_t CLKRCONbits @ 0x39A;
3580[; ;pic12f1840.h: 4230: extern volatile unsigned char MDCON @ 0x39C;
3581"4232
3582[; ;pic12f1840.h: 4232: asm("MDCON equ 039Ch");
3583[; <" MDCON equ 039Ch ;# ">
3584[; ;pic12f1840.h: 4235: typedef union {
3585[; ;pic12f1840.h: 4236: struct {
3586[; ;pic12f1840.h: 4237: unsigned MDBIT :1;
3587[; ;pic12f1840.h: 4238: unsigned :2;
3588[; ;pic12f1840.h: 4239: unsigned MDOUT :1;
3589[; ;pic12f1840.h: 4240: unsigned MDOPOL :1;
3590[; ;pic12f1840.h: 4241: unsigned MDSLR :1;
3591[; ;pic12f1840.h: 4242: unsigned MDOE :1;
3592[; ;pic12f1840.h: 4243: unsigned MDEN :1;
3593[; ;pic12f1840.h: 4244: };
3594[; ;pic12f1840.h: 4245: } MDCONbits_t;
3595[; ;pic12f1840.h: 4246: extern volatile MDCONbits_t MDCONbits @ 0x39C;
3596[; ;pic12f1840.h: 4280: extern volatile unsigned char MDSRC @ 0x39D;
3597"4282
3598[; ;pic12f1840.h: 4282: asm("MDSRC equ 039Dh");
3599[; <" MDSRC equ 039Dh ;# ">
3600[; ;pic12f1840.h: 4285: typedef union {
3601[; ;pic12f1840.h: 4286: struct {
3602[; ;pic12f1840.h: 4287: unsigned MDMS0 :1;
3603[; ;pic12f1840.h: 4288: unsigned MDMS1 :1;
3604[; ;pic12f1840.h: 4289: unsigned MDMS2 :1;
3605[; ;pic12f1840.h: 4290: unsigned MDMS3 :1;
3606[; ;pic12f1840.h: 4291: unsigned :3;
3607[; ;pic12f1840.h: 4292: unsigned MDMSODIS :1;
3608[; ;pic12f1840.h: 4293: };
3609[; ;pic12f1840.h: 4294: struct {
3610[; ;pic12f1840.h: 4295: unsigned MDMS :4;
3611[; ;pic12f1840.h: 4296: };
3612[; ;pic12f1840.h: 4297: } MDSRCbits_t;
3613[; ;pic12f1840.h: 4298: extern volatile MDSRCbits_t MDSRCbits @ 0x39D;
3614[; ;pic12f1840.h: 4332: extern volatile unsigned char MDCARL @ 0x39E;
3615"4334
3616[; ;pic12f1840.h: 4334: asm("MDCARL equ 039Eh");
3617[; <" MDCARL equ 039Eh ;# ">
3618[; ;pic12f1840.h: 4337: typedef union {
3619[; ;pic12f1840.h: 4338: struct {
3620[; ;pic12f1840.h: 4339: unsigned MDCL0 :1;
3621[; ;pic12f1840.h: 4340: unsigned MDCL1 :1;
3622[; ;pic12f1840.h: 4341: unsigned MDCL2 :1;
3623[; ;pic12f1840.h: 4342: unsigned MDCL3 :1;
3624[; ;pic12f1840.h: 4343: unsigned :1;
3625[; ;pic12f1840.h: 4344: unsigned MDCLSYNC :1;
3626[; ;pic12f1840.h: 4345: unsigned MDCLPOL :1;
3627[; ;pic12f1840.h: 4346: unsigned MDCLODIS :1;
3628[; ;pic12f1840.h: 4347: };
3629[; ;pic12f1840.h: 4348: struct {
3630[; ;pic12f1840.h: 4349: unsigned MDCL :4;
3631[; ;pic12f1840.h: 4350: };
3632[; ;pic12f1840.h: 4351: } MDCARLbits_t;
3633[; ;pic12f1840.h: 4352: extern volatile MDCARLbits_t MDCARLbits @ 0x39E;
3634[; ;pic12f1840.h: 4396: extern volatile unsigned char MDCARH @ 0x39F;
3635"4398
3636[; ;pic12f1840.h: 4398: asm("MDCARH equ 039Fh");
3637[; <" MDCARH equ 039Fh ;# ">
3638[; ;pic12f1840.h: 4401: typedef union {
3639[; ;pic12f1840.h: 4402: struct {
3640[; ;pic12f1840.h: 4403: unsigned MDCH0 :1;
3641[; ;pic12f1840.h: 4404: unsigned MDCH1 :1;
3642[; ;pic12f1840.h: 4405: unsigned MDCH2 :1;
3643[; ;pic12f1840.h: 4406: unsigned MDCH3 :1;
3644[; ;pic12f1840.h: 4407: unsigned :1;
3645[; ;pic12f1840.h: 4408: unsigned MDCHSYNC :1;
3646[; ;pic12f1840.h: 4409: unsigned MDCHPOL :1;
3647[; ;pic12f1840.h: 4410: unsigned MDCHODIS :1;
3648[; ;pic12f1840.h: 4411: };
3649[; ;pic12f1840.h: 4412: struct {
3650[; ;pic12f1840.h: 4413: unsigned MDCH :4;
3651[; ;pic12f1840.h: 4414: };
3652[; ;pic12f1840.h: 4415: } MDCARHbits_t;
3653[; ;pic12f1840.h: 4416: extern volatile MDCARHbits_t MDCARHbits @ 0x39F;
3654[; ;pic12f1840.h: 4460: extern volatile unsigned char STATUS_SHAD @ 0xFE4;
3655"4462
3656[; ;pic12f1840.h: 4462: asm("STATUS_SHAD equ 0FE4h");
3657[; <" STATUS_SHAD equ 0FE4h ;# ">
3658[; ;pic12f1840.h: 4465: typedef union {
3659[; ;pic12f1840.h: 4466: struct {
3660[; ;pic12f1840.h: 4467: unsigned C_SHAD :1;
3661[; ;pic12f1840.h: 4468: unsigned DC_SHAD :1;
3662[; ;pic12f1840.h: 4469: unsigned Z_SHAD :1;
3663[; ;pic12f1840.h: 4470: };
3664[; ;pic12f1840.h: 4471: } STATUS_SHADbits_t;
3665[; ;pic12f1840.h: 4472: extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
3666[; ;pic12f1840.h: 4491: extern volatile unsigned char WREG_SHAD @ 0xFE5;
3667"4493
3668[; ;pic12f1840.h: 4493: asm("WREG_SHAD equ 0FE5h");
3669[; <" WREG_SHAD equ 0FE5h ;# ">
3670[; ;pic12f1840.h: 4496: typedef union {
3671[; ;pic12f1840.h: 4497: struct {
3672[; ;pic12f1840.h: 4498: unsigned WREG_SHAD :8;
3673[; ;pic12f1840.h: 4499: };
3674[; ;pic12f1840.h: 4500: } WREG_SHADbits_t;
3675[; ;pic12f1840.h: 4501: extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
3676[; ;pic12f1840.h: 4510: extern volatile unsigned char BSR_SHAD @ 0xFE6;
3677"4512
3678[; ;pic12f1840.h: 4512: asm("BSR_SHAD equ 0FE6h");
3679[; <" BSR_SHAD equ 0FE6h ;# ">
3680[; ;pic12f1840.h: 4515: typedef union {
3681[; ;pic12f1840.h: 4516: struct {
3682[; ;pic12f1840.h: 4517: unsigned BSR_SHAD :5;
3683[; ;pic12f1840.h: 4518: };
3684[; ;pic12f1840.h: 4519: } BSR_SHADbits_t;
3685[; ;pic12f1840.h: 4520: extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
3686[; ;pic12f1840.h: 4529: extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
3687"4531
3688[; ;pic12f1840.h: 4531: asm("PCLATH_SHAD equ 0FE7h");
3689[; <" PCLATH_SHAD equ 0FE7h ;# ">
3690[; ;pic12f1840.h: 4534: typedef union {
3691[; ;pic12f1840.h: 4535: struct {
3692[; ;pic12f1840.h: 4536: unsigned PCLATH_SHAD :7;
3693[; ;pic12f1840.h: 4537: };
3694[; ;pic12f1840.h: 4538: } PCLATH_SHADbits_t;
3695[; ;pic12f1840.h: 4539: extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
3696[; ;pic12f1840.h: 4548: extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
3697"4550
3698[; ;pic12f1840.h: 4550: asm("FSR0L_SHAD equ 0FE8h");
3699[; <" FSR0L_SHAD equ 0FE8h ;# ">
3700[; ;pic12f1840.h: 4553: typedef union {
3701[; ;pic12f1840.h: 4554: struct {
3702[; ;pic12f1840.h: 4555: unsigned FSR0L_SHAD :8;
3703[; ;pic12f1840.h: 4556: };
3704[; ;pic12f1840.h: 4557: } FSR0L_SHADbits_t;
3705[; ;pic12f1840.h: 4558: extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
3706[; ;pic12f1840.h: 4567: extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
3707"4569
3708[; ;pic12f1840.h: 4569: asm("FSR0H_SHAD equ 0FE9h");
3709[; <" FSR0H_SHAD equ 0FE9h ;# ">
3710[; ;pic12f1840.h: 4572: typedef union {
3711[; ;pic12f1840.h: 4573: struct {
3712[; ;pic12f1840.h: 4574: unsigned FSR0H_SHAD :8;
3713[; ;pic12f1840.h: 4575: };
3714[; ;pic12f1840.h: 4576: } FSR0H_SHADbits_t;
3715[; ;pic12f1840.h: 4577: extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
3716[; ;pic12f1840.h: 4586: extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
3717"4588
3718[; ;pic12f1840.h: 4588: asm("FSR1L_SHAD equ 0FEAh");
3719[; <" FSR1L_SHAD equ 0FEAh ;# ">
3720[; ;pic12f1840.h: 4591: typedef union {
3721[; ;pic12f1840.h: 4592: struct {
3722[; ;pic12f1840.h: 4593: unsigned FSR1L_SHAD :8;
3723[; ;pic12f1840.h: 4594: };
3724[; ;pic12f1840.h: 4595: } FSR1L_SHADbits_t;
3725[; ;pic12f1840.h: 4596: extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
3726[; ;pic12f1840.h: 4605: extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
3727"4607
3728[; ;pic12f1840.h: 4607: asm("FSR1H_SHAD equ 0FEBh");
3729[; <" FSR1H_SHAD equ 0FEBh ;# ">
3730[; ;pic12f1840.h: 4610: typedef union {
3731[; ;pic12f1840.h: 4611: struct {
3732[; ;pic12f1840.h: 4612: unsigned FSR1H_SHAD :8;
3733[; ;pic12f1840.h: 4613: };
3734[; ;pic12f1840.h: 4614: } FSR1H_SHADbits_t;
3735[; ;pic12f1840.h: 4615: extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
3736[; ;pic12f1840.h: 4624: extern volatile unsigned char STKPTR @ 0xFED;
3737"4626
3738[; ;pic12f1840.h: 4626: asm("STKPTR equ 0FEDh");
3739[; <" STKPTR equ 0FEDh ;# ">
3740[; ;pic12f1840.h: 4629: typedef union {
3741[; ;pic12f1840.h: 4630: struct {
3742[; ;pic12f1840.h: 4631: unsigned STKPTR :5;
3743[; ;pic12f1840.h: 4632: };
3744[; ;pic12f1840.h: 4633: } STKPTRbits_t;
3745[; ;pic12f1840.h: 4634: extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
3746[; ;pic12f1840.h: 4643: extern volatile unsigned char TOSL @ 0xFEE;
3747"4645
3748[; ;pic12f1840.h: 4645: asm("TOSL equ 0FEEh");
3749[; <" TOSL equ 0FEEh ;# ">
3750[; ;pic12f1840.h: 4648: typedef union {
3751[; ;pic12f1840.h: 4649: struct {
3752[; ;pic12f1840.h: 4650: unsigned TOSL :8;
3753[; ;pic12f1840.h: 4651: };
3754[; ;pic12f1840.h: 4652: } TOSLbits_t;
3755[; ;pic12f1840.h: 4653: extern volatile TOSLbits_t TOSLbits @ 0xFEE;
3756[; ;pic12f1840.h: 4662: extern volatile unsigned char TOSH @ 0xFEF;
3757"4664
3758[; ;pic12f1840.h: 4664: asm("TOSH equ 0FEFh");
3759[; <" TOSH equ 0FEFh ;# ">
3760[; ;pic12f1840.h: 4667: typedef union {
3761[; ;pic12f1840.h: 4668: struct {
3762[; ;pic12f1840.h: 4669: unsigned TOSH :7;
3763[; ;pic12f1840.h: 4670: };
3764[; ;pic12f1840.h: 4671: } TOSHbits_t;
3765[; ;pic12f1840.h: 4672: extern volatile TOSHbits_t TOSHbits @ 0xFEF;
3766[; ;pic12f1840.h: 4687: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
3767[; ;pic12f1840.h: 4689: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
3768[; ;pic12f1840.h: 4691: extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
3769[; ;pic12f1840.h: 4693: extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
3770[; ;pic12f1840.h: 4695: extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
3771[; ;pic12f1840.h: 4697: extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
3772[; ;pic12f1840.h: 4699: extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 4;
3773[; ;pic12f1840.h: 4701: extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 5;
3774[; ;pic12f1840.h: 4703: extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
3775[; ;pic12f1840.h: 4705: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
3776[; ;pic12f1840.h: 4707: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
3777[; ;pic12f1840.h: 4709: extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
3778[; ;pic12f1840.h: 4711: extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
3779[; ;pic12f1840.h: 4713: extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
3780[; ;pic12f1840.h: 4715: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
3781[; ;pic12f1840.h: 4717: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
3782[; ;pic12f1840.h: 4719: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
3783[; ;pic12f1840.h: 4721: extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
3784[; ;pic12f1840.h: 4723: extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
3785[; ;pic12f1840.h: 4725: extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
3786[; ;pic12f1840.h: 4727: extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
3787[; ;pic12f1840.h: 4729: extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
3788[; ;pic12f1840.h: 4731: extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
3789[; ;pic12f1840.h: 4733: extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
3790[; ;pic12f1840.h: 4735: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
3791[; ;pic12f1840.h: 4737: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
3792[; ;pic12f1840.h: 4739: extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
3793[; ;pic12f1840.h: 4741: extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
3794[; ;pic12f1840.h: 4743: extern volatile __bit BORFS @ (((unsigned) &BORCON)*8) + 6;
3795[; ;pic12f1840.h: 4745: extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
3796[; ;pic12f1840.h: 4747: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
3797[; ;pic12f1840.h: 4749: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
3798[; ;pic12f1840.h: 4751: extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
3799[; ;pic12f1840.h: 4753: extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
3800[; ;pic12f1840.h: 4755: extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
3801[; ;pic12f1840.h: 4757: extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
3802[; ;pic12f1840.h: 4759: extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
3803[; ;pic12f1840.h: 4761: extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
3804[; ;pic12f1840.h: 4763: extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
3805[; ;pic12f1840.h: 4765: extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
3806[; ;pic12f1840.h: 4767: extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
3807[; ;pic12f1840.h: 4769: extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
3808[; ;pic12f1840.h: 4771: extern volatile __bit C1NCH @ (((unsigned) &CM1CON1)*8) + 0;
3809[; ;pic12f1840.h: 4773: extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
3810[; ;pic12f1840.h: 4775: extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
3811[; ;pic12f1840.h: 4777: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
3812[; ;pic12f1840.h: 4779: extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 6;
3813[; ;pic12f1840.h: 4781: extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
3814[; ;pic12f1840.h: 4783: extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
3815[; ;pic12f1840.h: 4785: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
3816[; ;pic12f1840.h: 4787: extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
3817[; ;pic12f1840.h: 4789: extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
3818[; ;pic12f1840.h: 4791: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
3819[; ;pic12f1840.h: 4793: extern volatile __bit CCP1AS0 @ (((unsigned) &CCP1AS)*8) + 4;
3820[; ;pic12f1840.h: 4795: extern volatile __bit CCP1AS1 @ (((unsigned) &CCP1AS)*8) + 5;
3821[; ;pic12f1840.h: 4797: extern volatile __bit CCP1AS2 @ (((unsigned) &CCP1AS)*8) + 6;
3822[; ;pic12f1840.h: 4799: extern volatile __bit CCP1ASE @ (((unsigned) &CCP1AS)*8) + 7;
3823[; ;pic12f1840.h: 4801: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
3824[; ;pic12f1840.h: 4803: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
3825[; ;pic12f1840.h: 4805: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
3826[; ;pic12f1840.h: 4807: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
3827[; ;pic12f1840.h: 4809: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
3828[; ;pic12f1840.h: 4811: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
3829[; ;pic12f1840.h: 4813: extern volatile __bit CCP1SEL @ (((unsigned) &APFCON)*8) + 0;
3830[; ;pic12f1840.h: 4815: extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
3831[; ;pic12f1840.h: 4817: extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
3832[; ;pic12f1840.h: 4819: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;
3833[; ;pic12f1840.h: 4821: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
3834[; ;pic12f1840.h: 4823: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
3835[; ;pic12f1840.h: 4825: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
3836[; ;pic12f1840.h: 4827: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
3837[; ;pic12f1840.h: 4829: extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
3838[; ;pic12f1840.h: 4831: extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
3839[; ;pic12f1840.h: 4833: extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
3840[; ;pic12f1840.h: 4835: extern volatile __bit CLKRDC0 @ (((unsigned) &CLKRCON)*8) + 3;
3841[; ;pic12f1840.h: 4837: extern volatile __bit CLKRDC1 @ (((unsigned) &CLKRCON)*8) + 4;
3842[; ;pic12f1840.h: 4839: extern volatile __bit CLKRDIV0 @ (((unsigned) &CLKRCON)*8) + 0;
3843[; ;pic12f1840.h: 4841: extern volatile __bit CLKRDIV1 @ (((unsigned) &CLKRCON)*8) + 1;
3844[; ;pic12f1840.h: 4843: extern volatile __bit CLKRDIV2 @ (((unsigned) &CLKRCON)*8) + 2;
3845[; ;pic12f1840.h: 4845: extern volatile __bit CLKREN @ (((unsigned) &CLKRCON)*8) + 7;
3846[; ;pic12f1840.h: 4847: extern volatile __bit CLKROE @ (((unsigned) &CLKRCON)*8) + 6;
3847[; ;pic12f1840.h: 4849: extern volatile __bit CLKRSLR @ (((unsigned) &CLKRCON)*8) + 5;
3848[; ;pic12f1840.h: 4851: extern volatile __bit CPSCH0 @ (((unsigned) &CPSCON1)*8) + 0;
3849[; ;pic12f1840.h: 4853: extern volatile __bit CPSCH1 @ (((unsigned) &CPSCON1)*8) + 1;
3850[; ;pic12f1840.h: 4855: extern volatile __bit CPSON @ (((unsigned) &CPSCON0)*8) + 7;
3851[; ;pic12f1840.h: 4857: extern volatile __bit CPSOUT @ (((unsigned) &CPSCON0)*8) + 1;
3852[; ;pic12f1840.h: 4859: extern volatile __bit CPSRM @ (((unsigned) &CPSCON0)*8) + 6;
3853[; ;pic12f1840.h: 4861: extern volatile __bit CPSRNG0 @ (((unsigned) &CPSCON0)*8) + 2;
3854[; ;pic12f1840.h: 4863: extern volatile __bit CPSRNG1 @ (((unsigned) &CPSCON0)*8) + 3;
3855[; ;pic12f1840.h: 4865: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
3856[; ;pic12f1840.h: 4867: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
3857[; ;pic12f1840.h: 4869: extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
3858[; ;pic12f1840.h: 4871: extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
3859[; ;pic12f1840.h: 4873: extern volatile __bit DACLPS @ (((unsigned) &DACCON0)*8) + 6;
3860[; ;pic12f1840.h: 4875: extern volatile __bit DACOE @ (((unsigned) &DACCON0)*8) + 5;
3861[; ;pic12f1840.h: 4877: extern volatile __bit DACPSS0 @ (((unsigned) &DACCON0)*8) + 2;
3862[; ;pic12f1840.h: 4879: extern volatile __bit DACPSS1 @ (((unsigned) &DACCON0)*8) + 3;
3863[; ;pic12f1840.h: 4881: extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
3864[; ;pic12f1840.h: 4883: extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
3865[; ;pic12f1840.h: 4885: extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
3866[; ;pic12f1840.h: 4887: extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
3867[; ;pic12f1840.h: 4889: extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
3868[; ;pic12f1840.h: 4891: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
3869[; ;pic12f1840.h: 4893: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
3870[; ;pic12f1840.h: 4895: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
3871[; ;pic12f1840.h: 4897: extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
3872[; ;pic12f1840.h: 4899: extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
3873[; ;pic12f1840.h: 4901: extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
3874[; ;pic12f1840.h: 4903: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;
3875[; ;pic12f1840.h: 4905: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;
3876[; ;pic12f1840.h: 4907: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
3877[; ;pic12f1840.h: 4909: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
3878[; ;pic12f1840.h: 4911: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
3879[; ;pic12f1840.h: 4913: extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
3880[; ;pic12f1840.h: 4915: extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
3881[; ;pic12f1840.h: 4917: extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
3882[; ;pic12f1840.h: 4919: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
3883[; ;pic12f1840.h: 4921: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
3884[; ;pic12f1840.h: 4923: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
3885[; ;pic12f1840.h: 4925: extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
3886[; ;pic12f1840.h: 4927: extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
3887[; ;pic12f1840.h: 4929: extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
3888[; ;pic12f1840.h: 4931: extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
3889[; ;pic12f1840.h: 4933: extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
3890[; ;pic12f1840.h: 4935: extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
3891[; ;pic12f1840.h: 4937: extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
3892[; ;pic12f1840.h: 4939: extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
3893[; ;pic12f1840.h: 4941: extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
3894[; ;pic12f1840.h: 4943: extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
3895[; ;pic12f1840.h: 4945: extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
3896[; ;pic12f1840.h: 4947: extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
3897[; ;pic12f1840.h: 4949: extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
3898[; ;pic12f1840.h: 4951: extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
3899[; ;pic12f1840.h: 4953: extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
3900[; ;pic12f1840.h: 4955: extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
3901[; ;pic12f1840.h: 4957: extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
3902[; ;pic12f1840.h: 4959: extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
3903[; ;pic12f1840.h: 4961: extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
3904[; ;pic12f1840.h: 4963: extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
3905[; ;pic12f1840.h: 4965: extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
3906[; ;pic12f1840.h: 4967: extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
3907[; ;pic12f1840.h: 4969: extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
3908[; ;pic12f1840.h: 4971: extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
3909[; ;pic12f1840.h: 4973: extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
3910[; ;pic12f1840.h: 4975: extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
3911[; ;pic12f1840.h: 4977: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
3912[; ;pic12f1840.h: 4979: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
3913[; ;pic12f1840.h: 4981: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
3914[; ;pic12f1840.h: 4983: extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
3915[; ;pic12f1840.h: 4985: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
3916[; ;pic12f1840.h: 4987: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
3917[; ;pic12f1840.h: 4989: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
3918[; ;pic12f1840.h: 4991: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
3919[; ;pic12f1840.h: 4993: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
3920[; ;pic12f1840.h: 4995: extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
3921[; ;pic12f1840.h: 4997: extern volatile __bit LWLO @ (((unsigned) &EECON1)*8) + 5;
3922[; ;pic12f1840.h: 4999: extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
3923[; ;pic12f1840.h: 5001: extern volatile __bit MDBIT @ (((unsigned) &MDCON)*8) + 0;
3924[; ;pic12f1840.h: 5003: extern volatile __bit MDCH0 @ (((unsigned) &MDCARH)*8) + 0;
3925[; ;pic12f1840.h: 5005: extern volatile __bit MDCH1 @ (((unsigned) &MDCARH)*8) + 1;
3926[; ;pic12f1840.h: 5007: extern volatile __bit MDCH2 @ (((unsigned) &MDCARH)*8) + 2;
3927[; ;pic12f1840.h: 5009: extern volatile __bit MDCH3 @ (((unsigned) &MDCARH)*8) + 3;
3928[; ;pic12f1840.h: 5011: extern volatile __bit MDCHODIS @ (((unsigned) &MDCARH)*8) + 7;
3929[; ;pic12f1840.h: 5013: extern volatile __bit MDCHPOL @ (((unsigned) &MDCARH)*8) + 6;
3930[; ;pic12f1840.h: 5015: extern volatile __bit MDCHSYNC @ (((unsigned) &MDCARH)*8) + 5;
3931[; ;pic12f1840.h: 5017: extern volatile __bit MDCL0 @ (((unsigned) &MDCARL)*8) + 0;
3932[; ;pic12f1840.h: 5019: extern volatile __bit MDCL1 @ (((unsigned) &MDCARL)*8) + 1;
3933[; ;pic12f1840.h: 5021: extern volatile __bit MDCL2 @ (((unsigned) &MDCARL)*8) + 2;
3934[; ;pic12f1840.h: 5023: extern volatile __bit MDCL3 @ (((unsigned) &MDCARL)*8) + 3;
3935[; ;pic12f1840.h: 5025: extern volatile __bit MDCLODIS @ (((unsigned) &MDCARL)*8) + 7;
3936[; ;pic12f1840.h: 5027: extern volatile __bit MDCLPOL @ (((unsigned) &MDCARL)*8) + 6;
3937[; ;pic12f1840.h: 5029: extern volatile __bit MDCLSYNC @ (((unsigned) &MDCARL)*8) + 5;
3938[; ;pic12f1840.h: 5031: extern volatile __bit MDEN @ (((unsigned) &MDCON)*8) + 7;
3939[; ;pic12f1840.h: 5033: extern volatile __bit MDMS0 @ (((unsigned) &MDSRC)*8) + 0;
3940[; ;pic12f1840.h: 5035: extern volatile __bit MDMS1 @ (((unsigned) &MDSRC)*8) + 1;
3941[; ;pic12f1840.h: 5037: extern volatile __bit MDMS2 @ (((unsigned) &MDSRC)*8) + 2;
3942[; ;pic12f1840.h: 5039: extern volatile __bit MDMS3 @ (((unsigned) &MDSRC)*8) + 3;
3943[; ;pic12f1840.h: 5041: extern volatile __bit MDMSODIS @ (((unsigned) &MDSRC)*8) + 7;
3944[; ;pic12f1840.h: 5043: extern volatile __bit MDOE @ (((unsigned) &MDCON)*8) + 6;
3945[; ;pic12f1840.h: 5045: extern volatile __bit MDOPOL @ (((unsigned) &MDCON)*8) + 4;
3946[; ;pic12f1840.h: 5047: extern volatile __bit MDOUT @ (((unsigned) &MDCON)*8) + 3;
3947[; ;pic12f1840.h: 5049: extern volatile __bit MDSLR @ (((unsigned) &MDCON)*8) + 5;
3948[; ;pic12f1840.h: 5051: extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
3949[; ;pic12f1840.h: 5053: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
3950[; ;pic12f1840.h: 5055: extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
3951[; ;pic12f1840.h: 5057: extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
3952[; ;pic12f1840.h: 5059: extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
3953[; ;pic12f1840.h: 5061: extern volatile __bit P1BSEL @ (((unsigned) &APFCON)*8) + 1;
3954[; ;pic12f1840.h: 5063: extern volatile __bit P1DC0 @ (((unsigned) &PWM1CON)*8) + 0;
3955[; ;pic12f1840.h: 5065: extern volatile __bit P1DC1 @ (((unsigned) &PWM1CON)*8) + 1;
3956[; ;pic12f1840.h: 5067: extern volatile __bit P1DC2 @ (((unsigned) &PWM1CON)*8) + 2;
3957[; ;pic12f1840.h: 5069: extern volatile __bit P1DC3 @ (((unsigned) &PWM1CON)*8) + 3;
3958[; ;pic12f1840.h: 5071: extern volatile __bit P1DC4 @ (((unsigned) &PWM1CON)*8) + 4;
3959[; ;pic12f1840.h: 5073: extern volatile __bit P1DC5 @ (((unsigned) &PWM1CON)*8) + 5;
3960[; ;pic12f1840.h: 5075: extern volatile __bit P1DC6 @ (((unsigned) &PWM1CON)*8) + 6;
3961[; ;pic12f1840.h: 5077: extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
3962[; ;pic12f1840.h: 5079: extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
3963[; ;pic12f1840.h: 5081: extern volatile __bit P1RSEN @ (((unsigned) &PWM1CON)*8) + 7;
3964[; ;pic12f1840.h: 5083: extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
3965[; ;pic12f1840.h: 5085: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
3966[; ;pic12f1840.h: 5087: extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
3967[; ;pic12f1840.h: 5089: extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
3968[; ;pic12f1840.h: 5091: extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
3969[; ;pic12f1840.h: 5093: extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
3970[; ;pic12f1840.h: 5095: extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
3971[; ;pic12f1840.h: 5097: extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
3972[; ;pic12f1840.h: 5099: extern volatile __bit PSS1AC0 @ (((unsigned) &CCP1AS)*8) + 2;
3973[; ;pic12f1840.h: 5101: extern volatile __bit PSS1AC1 @ (((unsigned) &CCP1AS)*8) + 3;
3974[; ;pic12f1840.h: 5103: extern volatile __bit PSS1BD0 @ (((unsigned) &CCP1AS)*8) + 0;
3975[; ;pic12f1840.h: 5105: extern volatile __bit PSS1BD1 @ (((unsigned) &CCP1AS)*8) + 1;
3976[; ;pic12f1840.h: 5107: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
3977[; ;pic12f1840.h: 5109: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
3978[; ;pic12f1840.h: 5111: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
3979[; ;pic12f1840.h: 5113: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
3980[; ;pic12f1840.h: 5115: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
3981[; ;pic12f1840.h: 5117: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
3982[; ;pic12f1840.h: 5119: extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
3983[; ;pic12f1840.h: 5121: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
3984[; ;pic12f1840.h: 5123: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
3985[; ;pic12f1840.h: 5125: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
3986[; ;pic12f1840.h: 5127: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;
3987[; ;pic12f1840.h: 5129: extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
3988[; ;pic12f1840.h: 5131: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
3989[; ;pic12f1840.h: 5133: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
3990[; ;pic12f1840.h: 5135: extern volatile __bit RXDTSEL @ (((unsigned) &APFCON)*8) + 7;
3991[; ;pic12f1840.h: 5137: extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
3992[; ;pic12f1840.h: 5139: extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
3993[; ;pic12f1840.h: 5141: extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
3994[; ;pic12f1840.h: 5143: extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
3995[; ;pic12f1840.h: 5145: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
3996[; ;pic12f1840.h: 5147: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
3997[; ;pic12f1840.h: 5149: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
3998[; ;pic12f1840.h: 5151: extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
3999[; ;pic12f1840.h: 5153: extern volatile __bit SDO1SEL @ (((unsigned) &APFCON)*8) + 6;
4000[; ;pic12f1840.h: 5155: extern volatile __bit SDOSEL @ (((unsigned) &APFCON)*8) + 6;
4001[; ;pic12f1840.h: 5157: extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
4002[; ;pic12f1840.h: 5159: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
4003[; ;pic12f1840.h: 5161: extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
4004[; ;pic12f1840.h: 5163: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
4005[; ;pic12f1840.h: 5165: extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
4006[; ;pic12f1840.h: 5167: extern volatile __bit SRCLK0 @ (((unsigned) &SRCON0)*8) + 4;
4007[; ;pic12f1840.h: 5169: extern volatile __bit SRCLK1 @ (((unsigned) &SRCON0)*8) + 5;
4008[; ;pic12f1840.h: 5171: extern volatile __bit SRCLK2 @ (((unsigned) &SRCON0)*8) + 6;
4009[; ;pic12f1840.h: 5173: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
4010[; ;pic12f1840.h: 5175: extern volatile __bit SRLEN @ (((unsigned) &SRCON0)*8) + 7;
4011[; ;pic12f1840.h: 5177: extern volatile __bit SRNQEN @ (((unsigned) &SRCON0)*8) + 2;
4012[; ;pic12f1840.h: 5179: extern volatile __bit SRPR @ (((unsigned) &SRCON0)*8) + 0;
4013[; ;pic12f1840.h: 5181: extern volatile __bit SRPS @ (((unsigned) &SRCON0)*8) + 1;
4014[; ;pic12f1840.h: 5183: extern volatile __bit SRQEN @ (((unsigned) &SRCON0)*8) + 3;
4015[; ;pic12f1840.h: 5185: extern volatile __bit SRRC1E @ (((unsigned) &SRCON1)*8) + 0;
4016[; ;pic12f1840.h: 5187: extern volatile __bit SRRCKE @ (((unsigned) &SRCON1)*8) + 2;
4017[; ;pic12f1840.h: 5189: extern volatile __bit SRRPE @ (((unsigned) &SRCON1)*8) + 3;
4018[; ;pic12f1840.h: 5191: extern volatile __bit SRSC1E @ (((unsigned) &SRCON1)*8) + 4;
4019[; ;pic12f1840.h: 5193: extern volatile __bit SRSCKE @ (((unsigned) &SRCON1)*8) + 6;
4020[; ;pic12f1840.h: 5195: extern volatile __bit SRSPE @ (((unsigned) &SRCON1)*8) + 7;
4021[; ;pic12f1840.h: 5197: extern volatile __bit SS1SEL @ (((unsigned) &APFCON)*8) + 5;
4022[; ;pic12f1840.h: 5199: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
4023[; ;pic12f1840.h: 5201: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
4024[; ;pic12f1840.h: 5203: extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
4025[; ;pic12f1840.h: 5205: extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
4026[; ;pic12f1840.h: 5207: extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
4027[; ;pic12f1840.h: 5209: extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
4028[; ;pic12f1840.h: 5211: extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
4029[; ;pic12f1840.h: 5213: extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
4030[; ;pic12f1840.h: 5215: extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 5;
4031[; ;pic12f1840.h: 5217: extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
4032[; ;pic12f1840.h: 5219: extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
4033[; ;pic12f1840.h: 5221: extern volatile __bit STR1A @ (((unsigned) &PSTR1CON)*8) + 0;
4034[; ;pic12f1840.h: 5223: extern volatile __bit STR1B @ (((unsigned) &PSTR1CON)*8) + 1;
4035[; ;pic12f1840.h: 5225: extern volatile __bit STR1SYNC @ (((unsigned) &PSTR1CON)*8) + 4;
4036[; ;pic12f1840.h: 5227: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
4037[; ;pic12f1840.h: 5229: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
4038[; ;pic12f1840.h: 5231: extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
4039[; ;pic12f1840.h: 5233: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
4040[; ;pic12f1840.h: 5235: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
4041[; ;pic12f1840.h: 5237: extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
4042[; ;pic12f1840.h: 5239: extern volatile __bit T0XCS @ (((unsigned) &CPSCON0)*8) + 0;
4043[; ;pic12f1840.h: 5241: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
4044[; ;pic12f1840.h: 5243: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
4045[; ;pic12f1840.h: 5245: extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
4046[; ;pic12f1840.h: 5247: extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
4047[; ;pic12f1840.h: 5249: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
4048[; ;pic12f1840.h: 5251: extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
4049[; ;pic12f1840.h: 5253: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
4050[; ;pic12f1840.h: 5255: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
4051[; ;pic12f1840.h: 5257: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
4052[; ;pic12f1840.h: 5259: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
4053[; ;pic12f1840.h: 5261: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
4054[; ;pic12f1840.h: 5263: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
4055[; ;pic12f1840.h: 5265: extern volatile __bit T1OSCR @ (((unsigned) &OSCSTAT)*8) + 7;
4056[; ;pic12f1840.h: 5267: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
4057[; ;pic12f1840.h: 5269: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
4058[; ;pic12f1840.h: 5271: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
4059[; ;pic12f1840.h: 5273: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
4060[; ;pic12f1840.h: 5275: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
4061[; ;pic12f1840.h: 5277: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
4062[; ;pic12f1840.h: 5279: extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
4063[; ;pic12f1840.h: 5281: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
4064[; ;pic12f1840.h: 5283: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
4065[; ;pic12f1840.h: 5285: extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
4066[; ;pic12f1840.h: 5287: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
4067[; ;pic12f1840.h: 5289: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
4068[; ;pic12f1840.h: 5291: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
4069[; ;pic12f1840.h: 5293: extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
4070[; ;pic12f1840.h: 5295: extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
4071[; ;pic12f1840.h: 5297: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
4072[; ;pic12f1840.h: 5299: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
4073[; ;pic12f1840.h: 5301: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
4074[; ;pic12f1840.h: 5303: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
4075[; ;pic12f1840.h: 5305: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
4076[; ;pic12f1840.h: 5307: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
4077[; ;pic12f1840.h: 5309: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
4078[; ;pic12f1840.h: 5311: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
4079[; ;pic12f1840.h: 5313: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
4080[; ;pic12f1840.h: 5315: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
4081[; ;pic12f1840.h: 5317: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
4082[; ;pic12f1840.h: 5319: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
4083[; ;pic12f1840.h: 5321: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
4084[; ;pic12f1840.h: 5323: extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
4085[; ;pic12f1840.h: 5325: extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
4086[; ;pic12f1840.h: 5327: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
4087[; ;pic12f1840.h: 5329: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
4088[; ;pic12f1840.h: 5331: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
4089[; ;pic12f1840.h: 5333: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
4090[; ;pic12f1840.h: 5335: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
4091[; ;pic12f1840.h: 5337: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
4092[; ;pic12f1840.h: 5339: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
4093[; ;pic12f1840.h: 5341: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
4094[; ;pic12f1840.h: 5343: extern volatile __bit TXCKSEL @ (((unsigned) &APFCON)*8) + 2;
4095[; ;pic12f1840.h: 5345: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
4096[; ;pic12f1840.h: 5347: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
4097[; ;pic12f1840.h: 5349: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
4098[; ;pic12f1840.h: 5351: extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
4099[; ;pic12f1840.h: 5353: extern volatile __bit VREGPM0 @ (((unsigned) &VREGCON)*8) + 0;
4100[; ;pic12f1840.h: 5355: extern volatile __bit VREGPM1 @ (((unsigned) &VREGCON)*8) + 1;
4101[; ;pic12f1840.h: 5357: extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
4102[; ;pic12f1840.h: 5359: extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
4103[; ;pic12f1840.h: 5361: extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
4104[; ;pic12f1840.h: 5363: extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
4105[; ;pic12f1840.h: 5365: extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
4106[; ;pic12f1840.h: 5367: extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
4107[; ;pic12f1840.h: 5369: extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
4108[; ;pic12f1840.h: 5371: extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
4109[; ;pic12f1840.h: 5373: extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
4110[; ;pic12f1840.h: 5375: extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
4111[; ;pic12f1840.h: 5377: extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
4112[; ;pic12f1840.h: 5379: extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
4113[; ;pic12f1840.h: 5381: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
4114[; ;pic12f1840.h: 5383: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
4115[; ;pic12f1840.h: 5385: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
4116[; ;pic12f1840.h: 5387: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
4117[; ;pic12f1840.h: 5389: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
4118[; ;pic12f1840.h: 5391: extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
4119[; ;pic12f1840.h: 5393: extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
4120[; ;pic12f1840.h: 5395: extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
4121[; ;pic12f1840.h: 5397: extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
4122[; ;pic12f1840.h: 5399: extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
4123[; ;pic12f1840.h: 5401: extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
4124[; ;pic12f1840.h: 5403: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
4125[; ;pic12f1840.h: 5405: extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
4126[; ;pic12f1840.h: 5407: extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
4127[; ;system.h: 31: void ConfigureOscillator(void);
4128"19 system.c
4129[v _ConfigureOscillator `(v ~T0 @X0 1 ef ]
4130{
4131[; ;system.c: 18: void ConfigureOscillator(void)
4132[; ;system.c: 19: {
4133[e :U _ConfigureOscillator ]
4134[f ]
4135[; ;system.c: 22: OSCCONbits.SPLLEN = 0;
4136"22
4137[e = . . _OSCCONbits 0 7 -> -> 0 `i `uc ]
4138[; ;system.c: 23: OSCCONbits.IRCF = 0b1101;
4139"23
4140[e = . . _OSCCONbits 1 2 -> -> 13 `i `uc ]
4141[; ;system.c: 24: OSCCONbits.SCS = 0b00;
4142"24
4143[e = . . _OSCCONbits 1 0 -> -> 0 `i `uc ]
4144[; ;system.c: 26: }
4145"26
4146[e :UE 524 ]
4147}
1-Wire to USB Bridge