git://stoneship.org.uk / onewire / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Initial import of onewire-to-usb bridge
[onewire] / build / XC8_12F1822 / production / onewire.p1
CommitLineData
bba33fe1
JM		 1Version 3.2 HI-TECH Software Intermediate Code
2[s S30 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
3[n S30 . RA0 RA1 RA2 RA3 RA4 RA5 ]
4[s S31 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
5[n S31 . AN0 AN1 AN2 . AN3 ]
6[s S32 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
7[n S32 . CPS0 CPS1 CPS2 . CPS3 ]
8[s S33 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
9[n S33 . C1INP C1IN0N C1OUT . C1IN1N ]
10[s S34 :1 `uc 1 :1 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]
11[n S34 . DACOUT SRI SRQ . SRNQ ]
12[s S35 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
13[n S35 . . SCK T0CKI . T1OSO T1CKI ]
14[s S36 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
15[n S36 . . SCL SDA nMCLR CLKR T1OSI ]
16[s S37 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
17[n S37 . MDOUT MDMIN MDCIN1 . MDCIN2 ]
18[s S38 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
19[n S38 . . SDI . OSC2 OSC1 ]
20[s S39 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
21[n S39 . . FLT0 . CLKOUT CLKIN ]
22[u S29 `S30 1 `S31 1 `S32 1 `S33 1 `S34 1 `S35 1 `S36 1 `S37 1 `S38 1 `S39 1 ]
23[n S29 . . . . . . . . . . . ]
24"489 /opt/microchip/xc8/v1.12/include/pic12f1822.h
25[v _PORTAbits `VS29 ~T0 @X0 0 e@12 ]
26[s S70 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
27[n S70 . TRISA0 TRISA1 TRISA2 TRISA3 TRISA4 TRISA5 ]
28[u S69 `S70 1 ]
29[n S69 . . ]
30"1223
31[v _TRISAbits `VS69 ~T0 @X0 0 e@140 ]
32"151 /opt/microchip/xc8/v1.12/include/pic.h
33[v __delay `(v ~T0 @X0 0 ef1`ul ]
34[p i __delay ]
35"28
36[v __nop `(v ~T0 @X0 0 ef ]
37[p i __nop ]
38"24 user.h
39[v _int_disable `(v ~T0 @X0 0 ef ]
40"15
41[v _msg_write `(v ~T0 @X0 0 ef1`*Cuc ]
42"25
43[v _int_enable `(v ~T0 @X0 0 ef ]
44[; ;pic12f1822.h: 44: extern volatile unsigned char INDF0 @ 0x000;
45"46 /opt/microchip/xc8/v1.12/include/pic12f1822.h
46[; ;pic12f1822.h: 46: asm("INDF0 equ 00h");
47[; <" INDF0 equ 00h ;# ">
48[; ;pic12f1822.h: 49: typedef union {
49[; ;pic12f1822.h: 50: struct {
50[; ;pic12f1822.h: 51: unsigned INDF0 :8;
51[; ;pic12f1822.h: 52: };
52[; ;pic12f1822.h: 53: } INDF0bits_t;
53[; ;pic12f1822.h: 54: extern volatile INDF0bits_t INDF0bits @ 0x000;
54[; ;pic12f1822.h: 63: extern volatile unsigned char INDF1 @ 0x001;
55"65
56[; ;pic12f1822.h: 65: asm("INDF1 equ 01h");
57[; <" INDF1 equ 01h ;# ">
58[; ;pic12f1822.h: 68: typedef union {
59[; ;pic12f1822.h: 69: struct {
60[; ;pic12f1822.h: 70: unsigned INDF1 :8;
61[; ;pic12f1822.h: 71: };
62[; ;pic12f1822.h: 72: } INDF1bits_t;
63[; ;pic12f1822.h: 73: extern volatile INDF1bits_t INDF1bits @ 0x001;
64[; ;pic12f1822.h: 82: extern volatile unsigned char PCL @ 0x002;
65"84
66[; ;pic12f1822.h: 84: asm("PCL equ 02h");
67[; <" PCL equ 02h ;# ">
68[; ;pic12f1822.h: 87: typedef union {
69[; ;pic12f1822.h: 88: struct {
70[; ;pic12f1822.h: 89: unsigned PCL :8;
71[; ;pic12f1822.h: 90: };
72[; ;pic12f1822.h: 91: } PCLbits_t;
73[; ;pic12f1822.h: 92: extern volatile PCLbits_t PCLbits @ 0x002;
74[; ;pic12f1822.h: 101: extern volatile unsigned char STATUS @ 0x003;
75"103
76[; ;pic12f1822.h: 103: asm("STATUS equ 03h");
77[; <" STATUS equ 03h ;# ">
78[; ;pic12f1822.h: 106: typedef union {
79[; ;pic12f1822.h: 107: struct {
80[; ;pic12f1822.h: 108: unsigned C :1;
81[; ;pic12f1822.h: 109: unsigned DC :1;
82[; ;pic12f1822.h: 110: unsigned Z :1;
83[; ;pic12f1822.h: 111: unsigned nPD :1;
84[; ;pic12f1822.h: 112: unsigned nTO :1;
85[; ;pic12f1822.h: 113: };
86[; ;pic12f1822.h: 114: struct {
87[; ;pic12f1822.h: 115: unsigned CARRY :1;
88[; ;pic12f1822.h: 116: };
89[; ;pic12f1822.h: 117: struct {
90[; ;pic12f1822.h: 118: unsigned :2;
91[; ;pic12f1822.h: 119: unsigned ZERO :1;
92[; ;pic12f1822.h: 120: };
93[; ;pic12f1822.h: 121: } STATUSbits_t;
94[; ;pic12f1822.h: 122: extern volatile STATUSbits_t STATUSbits @ 0x003;
95[; ;pic12f1822.h: 161: extern volatile unsigned short FSR0 @ 0x004;
96[; ;pic12f1822.h: 164: extern volatile unsigned char FSR0L @ 0x004;
97"166
98[; ;pic12f1822.h: 166: asm("FSR0L equ 04h");
99[; <" FSR0L equ 04h ;# ">
100[; ;pic12f1822.h: 169: typedef union {
101[; ;pic12f1822.h: 170: struct {
102[; ;pic12f1822.h: 171: unsigned FSR0L :8;
103[; ;pic12f1822.h: 172: };
104[; ;pic12f1822.h: 173: } FSR0Lbits_t;
105[; ;pic12f1822.h: 174: extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
106[; ;pic12f1822.h: 183: extern volatile unsigned char FSR0H @ 0x005;
107"185
108[; ;pic12f1822.h: 185: asm("FSR0H equ 05h");
109[; <" FSR0H equ 05h ;# ">
110[; ;pic12f1822.h: 188: typedef union {
111[; ;pic12f1822.h: 189: struct {
112[; ;pic12f1822.h: 190: unsigned FSR0H :8;
113[; ;pic12f1822.h: 191: };
114[; ;pic12f1822.h: 192: } FSR0Hbits_t;
115[; ;pic12f1822.h: 193: extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
116[; ;pic12f1822.h: 202: extern volatile unsigned short FSR1 @ 0x006;
117[; ;pic12f1822.h: 205: extern volatile unsigned char FSR1L @ 0x006;
118"207
119[; ;pic12f1822.h: 207: asm("FSR1L equ 06h");
120[; <" FSR1L equ 06h ;# ">
121[; ;pic12f1822.h: 210: typedef union {
122[; ;pic12f1822.h: 211: struct {
123[; ;pic12f1822.h: 212: unsigned FSR1L :8;
124[; ;pic12f1822.h: 213: };
125[; ;pic12f1822.h: 214: } FSR1Lbits_t;
126[; ;pic12f1822.h: 215: extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
127[; ;pic12f1822.h: 224: extern volatile unsigned char FSR1H @ 0x007;
128"226
129[; ;pic12f1822.h: 226: asm("FSR1H equ 07h");
130[; <" FSR1H equ 07h ;# ">
131[; ;pic12f1822.h: 229: typedef union {
132[; ;pic12f1822.h: 230: struct {
133[; ;pic12f1822.h: 231: unsigned FSR1H :8;
134[; ;pic12f1822.h: 232: };
135[; ;pic12f1822.h: 233: } FSR1Hbits_t;
136[; ;pic12f1822.h: 234: extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
137[; ;pic12f1822.h: 243: extern volatile unsigned char BSR @ 0x008;
138"245
139[; ;pic12f1822.h: 245: asm("BSR equ 08h");
140[; <" BSR equ 08h ;# ">
141[; ;pic12f1822.h: 248: typedef union {
142[; ;pic12f1822.h: 249: struct {
143[; ;pic12f1822.h: 250: unsigned BSR0 :1;
144[; ;pic12f1822.h: 251: unsigned BSR1 :1;
145[; ;pic12f1822.h: 252: unsigned BSR2 :1;
146[; ;pic12f1822.h: 253: unsigned BSR3 :1;
147[; ;pic12f1822.h: 254: unsigned BSR4 :1;
148[; ;pic12f1822.h: 255: };
149[; ;pic12f1822.h: 256: struct {
150[; ;pic12f1822.h: 257: unsigned BSR :5;
151[; ;pic12f1822.h: 258: };
152[; ;pic12f1822.h: 259: } BSRbits_t;
153[; ;pic12f1822.h: 260: extern volatile BSRbits_t BSRbits @ 0x008;
154[; ;pic12f1822.h: 294: extern volatile unsigned char WREG @ 0x009;
155"296
156[; ;pic12f1822.h: 296: asm("WREG equ 09h");
157[; <" WREG equ 09h ;# ">
158[; ;pic12f1822.h: 299: typedef union {
159[; ;pic12f1822.h: 300: struct {
160[; ;pic12f1822.h: 301: unsigned WREG0 :8;
161[; ;pic12f1822.h: 302: };
162[; ;pic12f1822.h: 303: } WREGbits_t;
163[; ;pic12f1822.h: 304: extern volatile WREGbits_t WREGbits @ 0x009;
164[; ;pic12f1822.h: 313: extern volatile unsigned char PCLATH @ 0x00A;
165"315
166[; ;pic12f1822.h: 315: asm("PCLATH equ 0Ah");
167[; <" PCLATH equ 0Ah ;# ">
168[; ;pic12f1822.h: 318: typedef union {
169[; ;pic12f1822.h: 319: struct {
170[; ;pic12f1822.h: 320: unsigned PCLATH :7;
171[; ;pic12f1822.h: 321: };
172[; ;pic12f1822.h: 322: } PCLATHbits_t;
173[; ;pic12f1822.h: 323: extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
174[; ;pic12f1822.h: 332: extern volatile unsigned char INTCON @ 0x00B;
175"334
176[; ;pic12f1822.h: 334: asm("INTCON equ 0Bh");
177[; <" INTCON equ 0Bh ;# ">
178[; ;pic12f1822.h: 337: typedef union {
179[; ;pic12f1822.h: 338: struct {
180[; ;pic12f1822.h: 339: unsigned IOCIF :1;
181[; ;pic12f1822.h: 340: unsigned INTF :1;
182[; ;pic12f1822.h: 341: unsigned TMR0IF :1;
183[; ;pic12f1822.h: 342: unsigned IOCIE :1;
184[; ;pic12f1822.h: 343: unsigned INTE :1;
185[; ;pic12f1822.h: 344: unsigned TMR0IE :1;
186[; ;pic12f1822.h: 345: unsigned PEIE :1;
187[; ;pic12f1822.h: 346: unsigned GIE :1;
188[; ;pic12f1822.h: 347: };
189[; ;pic12f1822.h: 348: struct {
190[; ;pic12f1822.h: 349: unsigned :2;
191[; ;pic12f1822.h: 350: unsigned T0IF :1;
192[; ;pic12f1822.h: 351: unsigned :2;
193[; ;pic12f1822.h: 352: unsigned T0IE :1;
194[; ;pic12f1822.h: 353: };
195[; ;pic12f1822.h: 354: } INTCONbits_t;
196[; ;pic12f1822.h: 355: extern volatile INTCONbits_t INTCONbits @ 0x00B;
197[; ;pic12f1822.h: 409: extern volatile unsigned char PORTA @ 0x00C;
198"411
199[; ;pic12f1822.h: 411: asm("PORTA equ 0Ch");
200[; <" PORTA equ 0Ch ;# ">
201[; ;pic12f1822.h: 414: typedef union {
202[; ;pic12f1822.h: 415: struct {
203[; ;pic12f1822.h: 416: unsigned RA0 :1;
204[; ;pic12f1822.h: 417: unsigned RA1 :1;
205[; ;pic12f1822.h: 418: unsigned RA2 :1;
206[; ;pic12f1822.h: 419: unsigned RA3 :1;
207[; ;pic12f1822.h: 420: unsigned RA4 :1;
208[; ;pic12f1822.h: 421: unsigned RA5 :1;
209[; ;pic12f1822.h: 422: };
210[; ;pic12f1822.h: 423: struct {
211[; ;pic12f1822.h: 424: unsigned AN0 :1;
212[; ;pic12f1822.h: 425: unsigned AN1 :1;
213[; ;pic12f1822.h: 426: unsigned AN2 :1;
214[; ;pic12f1822.h: 427: unsigned :1;
215[; ;pic12f1822.h: 428: unsigned AN3 :1;
216[; ;pic12f1822.h: 429: };
217[; ;pic12f1822.h: 430: struct {
218[; ;pic12f1822.h: 431: unsigned CPS0 :1;
219[; ;pic12f1822.h: 432: unsigned CPS1 :1;
220[; ;pic12f1822.h: 433: unsigned CPS2 :1;
221[; ;pic12f1822.h: 434: unsigned :1;
222[; ;pic12f1822.h: 435: unsigned CPS3 :1;
223[; ;pic12f1822.h: 436: };
224[; ;pic12f1822.h: 437: struct {
225[; ;pic12f1822.h: 438: unsigned C1INP :1;
226[; ;pic12f1822.h: 439: unsigned C1IN0N :1;
227[; ;pic12f1822.h: 440: unsigned C1OUT :1;
228[; ;pic12f1822.h: 441: unsigned :1;
229[; ;pic12f1822.h: 442: unsigned C1IN1N :1;
230[; ;pic12f1822.h: 443: };
231[; ;pic12f1822.h: 444: struct {
232[; ;pic12f1822.h: 445: unsigned DACOUT :1;
233[; ;pic12f1822.h: 446: unsigned SRI :1;
234[; ;pic12f1822.h: 447: unsigned SRQ :1;
235[; ;pic12f1822.h: 448: unsigned :2;
236[; ;pic12f1822.h: 449: unsigned SRNQ :1;
237[; ;pic12f1822.h: 450: };
238[; ;pic12f1822.h: 451: struct {
239[; ;pic12f1822.h: 452: unsigned :1;
240[; ;pic12f1822.h: 453: unsigned SCK :1;
241[; ;pic12f1822.h: 454: unsigned T0CKI :1;
242[; ;pic12f1822.h: 455: unsigned :1;
243[; ;pic12f1822.h: 456: unsigned T1OSO :1;
244[; ;pic12f1822.h: 457: unsigned T1CKI :1;
245[; ;pic12f1822.h: 458: };
246[; ;pic12f1822.h: 459: struct {
247[; ;pic12f1822.h: 460: unsigned :1;
248[; ;pic12f1822.h: 461: unsigned SCL :1;
249[; ;pic12f1822.h: 462: unsigned SDA :1;
250[; ;pic12f1822.h: 463: unsigned nMCLR :1;
251[; ;pic12f1822.h: 464: unsigned CLKR :1;
252[; ;pic12f1822.h: 465: unsigned T1OSI :1;
253[; ;pic12f1822.h: 466: };
254[; ;pic12f1822.h: 467: struct {
255[; ;pic12f1822.h: 468: unsigned MDOUT :1;
256[; ;pic12f1822.h: 469: unsigned MDMIN :1;
257[; ;pic12f1822.h: 470: unsigned MDCIN1 :1;
258[; ;pic12f1822.h: 471: unsigned :1;
259[; ;pic12f1822.h: 472: unsigned MDCIN2 :1;
260[; ;pic12f1822.h: 473: };
261[; ;pic12f1822.h: 474: struct {
262[; ;pic12f1822.h: 475: unsigned :2;
263[; ;pic12f1822.h: 476: unsigned SDI :1;
264[; ;pic12f1822.h: 477: unsigned :1;
265[; ;pic12f1822.h: 478: unsigned OSC2 :1;
266[; ;pic12f1822.h: 479: unsigned OSC1 :1;
267[; ;pic12f1822.h: 480: };
268[; ;pic12f1822.h: 481: struct {
269[; ;pic12f1822.h: 482: unsigned :2;
270[; ;pic12f1822.h: 483: unsigned FLT0 :1;
271[; ;pic12f1822.h: 484: unsigned :1;
272[; ;pic12f1822.h: 485: unsigned CLKOUT :1;
273[; ;pic12f1822.h: 486: unsigned CLKIN :1;
274[; ;pic12f1822.h: 487: };
275[; ;pic12f1822.h: 488: } PORTAbits_t;
276[; ;pic12f1822.h: 489: extern volatile PORTAbits_t PORTAbits @ 0x00C;
277[; ;pic12f1822.h: 698: extern volatile unsigned char PIR1 @ 0x011;
278"700
279[; ;pic12f1822.h: 700: asm("PIR1 equ 011h");
280[; <" PIR1 equ 011h ;# ">
281[; ;pic12f1822.h: 703: typedef union {
282[; ;pic12f1822.h: 704: struct {
283[; ;pic12f1822.h: 705: unsigned TMR1IF :1;
284[; ;pic12f1822.h: 706: unsigned TMR2IF :1;
285[; ;pic12f1822.h: 707: unsigned CCP1IF :1;
286[; ;pic12f1822.h: 708: unsigned SSP1IF :1;
287[; ;pic12f1822.h: 709: unsigned TXIF :1;
288[; ;pic12f1822.h: 710: unsigned RCIF :1;
289[; ;pic12f1822.h: 711: unsigned ADIF :1;
290[; ;pic12f1822.h: 712: unsigned TMR1GIF :1;
291[; ;pic12f1822.h: 713: };
292[; ;pic12f1822.h: 714: } PIR1bits_t;
293[; ;pic12f1822.h: 715: extern volatile PIR1bits_t PIR1bits @ 0x011;
294[; ;pic12f1822.h: 759: extern volatile unsigned char PIR2 @ 0x012;
295"761
296[; ;pic12f1822.h: 761: asm("PIR2 equ 012h");
297[; <" PIR2 equ 012h ;# ">
298[; ;pic12f1822.h: 764: typedef union {
299[; ;pic12f1822.h: 765: struct {
300[; ;pic12f1822.h: 766: unsigned :3;
301[; ;pic12f1822.h: 767: unsigned BCL1IF :1;
302[; ;pic12f1822.h: 768: unsigned EEIF :1;
303[; ;pic12f1822.h: 769: unsigned C1IF :1;
304[; ;pic12f1822.h: 770: unsigned :1;
305[; ;pic12f1822.h: 771: unsigned OSFIF :1;
306[; ;pic12f1822.h: 772: };
307[; ;pic12f1822.h: 773: } PIR2bits_t;
308[; ;pic12f1822.h: 774: extern volatile PIR2bits_t PIR2bits @ 0x012;
309[; ;pic12f1822.h: 798: extern volatile unsigned char TMR0 @ 0x015;
310"800
311[; ;pic12f1822.h: 800: asm("TMR0 equ 015h");
312[; <" TMR0 equ 015h ;# ">
313[; ;pic12f1822.h: 803: typedef union {
314[; ;pic12f1822.h: 804: struct {
315[; ;pic12f1822.h: 805: unsigned TMR0 :8;
316[; ;pic12f1822.h: 806: };
317[; ;pic12f1822.h: 807: } TMR0bits_t;
318[; ;pic12f1822.h: 808: extern volatile TMR0bits_t TMR0bits @ 0x015;
319[; ;pic12f1822.h: 817: extern volatile unsigned short TMR1 @ 0x016;
320"819
321[; ;pic12f1822.h: 819: asm("TMR1 equ 016h");
322[; <" TMR1 equ 016h ;# ">
323[; ;pic12f1822.h: 823: extern volatile unsigned char TMR1L @ 0x016;
324"825
325[; ;pic12f1822.h: 825: asm("TMR1L equ 016h");
326[; <" TMR1L equ 016h ;# ">
327[; ;pic12f1822.h: 828: typedef union {
328[; ;pic12f1822.h: 829: struct {
329[; ;pic12f1822.h: 830: unsigned TMR1L :8;
330[; ;pic12f1822.h: 831: };
331[; ;pic12f1822.h: 832: } TMR1Lbits_t;
332[; ;pic12f1822.h: 833: extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
333[; ;pic12f1822.h: 842: extern volatile unsigned char TMR1H @ 0x017;
334"844
335[; ;pic12f1822.h: 844: asm("TMR1H equ 017h");
336[; <" TMR1H equ 017h ;# ">
337[; ;pic12f1822.h: 847: typedef union {
338[; ;pic12f1822.h: 848: struct {
339[; ;pic12f1822.h: 849: unsigned TMR1H :8;
340[; ;pic12f1822.h: 850: };
341[; ;pic12f1822.h: 851: } TMR1Hbits_t;
342[; ;pic12f1822.h: 852: extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
343[; ;pic12f1822.h: 861: extern volatile unsigned char T1CON @ 0x018;
344"863
345[; ;pic12f1822.h: 863: asm("T1CON equ 018h");
346[; <" T1CON equ 018h ;# ">
347[; ;pic12f1822.h: 866: typedef union {
348[; ;pic12f1822.h: 867: struct {
349[; ;pic12f1822.h: 868: unsigned TMR1ON :1;
350[; ;pic12f1822.h: 869: unsigned :1;
351[; ;pic12f1822.h: 870: unsigned nT1SYNC :1;
352[; ;pic12f1822.h: 871: unsigned T1OSCEN :1;
353[; ;pic12f1822.h: 872: unsigned T1CKPS0 :1;
354[; ;pic12f1822.h: 873: unsigned T1CKPS1 :1;
355[; ;pic12f1822.h: 874: unsigned TMR1CS0 :1;
356[; ;pic12f1822.h: 875: unsigned TMR1CS1 :1;
357[; ;pic12f1822.h: 876: };
358[; ;pic12f1822.h: 877: struct {
359[; ;pic12f1822.h: 878: unsigned :4;
360[; ;pic12f1822.h: 879: unsigned T1CKPS :2;
361[; ;pic12f1822.h: 880: unsigned TMR1CS :2;
362[; ;pic12f1822.h: 881: };
363[; ;pic12f1822.h: 882: } T1CONbits_t;
364[; ;pic12f1822.h: 883: extern volatile T1CONbits_t T1CONbits @ 0x018;
365[; ;pic12f1822.h: 932: extern volatile unsigned char T1GCON @ 0x019;
366"934
367[; ;pic12f1822.h: 934: asm("T1GCON equ 019h");
368[; <" T1GCON equ 019h ;# ">
369[; ;pic12f1822.h: 937: typedef union {
370[; ;pic12f1822.h: 938: struct {
371[; ;pic12f1822.h: 939: unsigned T1GSS0 :1;
372[; ;pic12f1822.h: 940: unsigned T1GSS1 :1;
373[; ;pic12f1822.h: 941: unsigned T1GVAL :1;
374[; ;pic12f1822.h: 942: unsigned T1GGO_nDONE :1;
375[; ;pic12f1822.h: 943: unsigned T1GSPM :1;
376[; ;pic12f1822.h: 944: unsigned T1GTM :1;
377[; ;pic12f1822.h: 945: unsigned T1GPOL :1;
378[; ;pic12f1822.h: 946: unsigned TMR1GE :1;
379[; ;pic12f1822.h: 947: };
380[; ;pic12f1822.h: 948: struct {
381[; ;pic12f1822.h: 949: unsigned T1GSS :2;
382[; ;pic12f1822.h: 950: unsigned :1;
383[; ;pic12f1822.h: 951: unsigned T1GGO :1;
384[; ;pic12f1822.h: 952: };
385[; ;pic12f1822.h: 953: } T1GCONbits_t;
386[; ;pic12f1822.h: 954: extern volatile T1GCONbits_t T1GCONbits @ 0x019;
387[; ;pic12f1822.h: 1008: extern volatile unsigned char TMR2 @ 0x01A;
388"1010
389[; ;pic12f1822.h: 1010: asm("TMR2 equ 01Ah");
390[; <" TMR2 equ 01Ah ;# ">
391[; ;pic12f1822.h: 1013: typedef union {
392[; ;pic12f1822.h: 1014: struct {
393[; ;pic12f1822.h: 1015: unsigned TMR2 :8;
394[; ;pic12f1822.h: 1016: };
395[; ;pic12f1822.h: 1017: } TMR2bits_t;
396[; ;pic12f1822.h: 1018: extern volatile TMR2bits_t TMR2bits @ 0x01A;
397[; ;pic12f1822.h: 1027: extern volatile unsigned char PR2 @ 0x01B;
398"1029
399[; ;pic12f1822.h: 1029: asm("PR2 equ 01Bh");
400[; <" PR2 equ 01Bh ;# ">
401[; ;pic12f1822.h: 1032: typedef union {
402[; ;pic12f1822.h: 1033: struct {
403[; ;pic12f1822.h: 1034: unsigned PR2 :8;
404[; ;pic12f1822.h: 1035: };
405[; ;pic12f1822.h: 1036: } PR2bits_t;
406[; ;pic12f1822.h: 1037: extern volatile PR2bits_t PR2bits @ 0x01B;
407[; ;pic12f1822.h: 1046: extern volatile unsigned char T2CON @ 0x01C;
408"1048
409[; ;pic12f1822.h: 1048: asm("T2CON equ 01Ch");
410[; <" T2CON equ 01Ch ;# ">
411[; ;pic12f1822.h: 1051: typedef union {
412[; ;pic12f1822.h: 1052: struct {
413[; ;pic12f1822.h: 1053: unsigned T2CKPS0 :1;
414[; ;pic12f1822.h: 1054: unsigned T2CKPS1 :1;
415[; ;pic12f1822.h: 1055: unsigned TMR2ON :1;
416[; ;pic12f1822.h: 1056: unsigned T2OUTPS0 :1;
417[; ;pic12f1822.h: 1057: unsigned T2OUTPS1 :1;
418[; ;pic12f1822.h: 1058: unsigned T2OUTPS2 :1;
419[; ;pic12f1822.h: 1059: unsigned T2OUTPS3 :1;
420[; ;pic12f1822.h: 1060: };
421[; ;pic12f1822.h: 1061: struct {
422[; ;pic12f1822.h: 1062: unsigned T2CKPS :2;
423[; ;pic12f1822.h: 1063: unsigned :1;
424[; ;pic12f1822.h: 1064: unsigned T2OUTPS :4;
425[; ;pic12f1822.h: 1065: };
426[; ;pic12f1822.h: 1066: } T2CONbits_t;
427[; ;pic12f1822.h: 1067: extern volatile T2CONbits_t T2CONbits @ 0x01C;
428[; ;pic12f1822.h: 1116: extern volatile unsigned char CPSCON0 @ 0x01E;
429"1118
430[; ;pic12f1822.h: 1118: asm("CPSCON0 equ 01Eh");
431[; <" CPSCON0 equ 01Eh ;# ">
432[; ;pic12f1822.h: 1121: typedef union {
433[; ;pic12f1822.h: 1122: struct {
434[; ;pic12f1822.h: 1123: unsigned T0XCS :1;
435[; ;pic12f1822.h: 1124: unsigned CPSOUT :1;
436[; ;pic12f1822.h: 1125: unsigned CPSRNG0 :1;
437[; ;pic12f1822.h: 1126: unsigned CPSRNG1 :1;
438[; ;pic12f1822.h: 1127: unsigned :2;
439[; ;pic12f1822.h: 1128: unsigned CPSRM :1;
440[; ;pic12f1822.h: 1129: unsigned CPSON :1;
441[; ;pic12f1822.h: 1130: };
442[; ;pic12f1822.h: 1131: struct {
443[; ;pic12f1822.h: 1132: unsigned :2;
444[; ;pic12f1822.h: 1133: unsigned CPSRNG :2;
445[; ;pic12f1822.h: 1134: };
446[; ;pic12f1822.h: 1135: } CPSCON0bits_t;
447[; ;pic12f1822.h: 1136: extern volatile CPSCON0bits_t CPSCON0bits @ 0x01E;
448[; ;pic12f1822.h: 1175: extern volatile unsigned char CPSCON1 @ 0x01F;
449"1177
450[; ;pic12f1822.h: 1177: asm("CPSCON1 equ 01Fh");
451[; <" CPSCON1 equ 01Fh ;# ">
452[; ;pic12f1822.h: 1180: typedef union {
453[; ;pic12f1822.h: 1181: struct {
454[; ;pic12f1822.h: 1182: unsigned CPSCH0 :1;
455[; ;pic12f1822.h: 1183: unsigned CPSCH1 :1;
456[; ;pic12f1822.h: 1184: };
457[; ;pic12f1822.h: 1185: struct {
458[; ;pic12f1822.h: 1186: unsigned CPSCH :2;
459[; ;pic12f1822.h: 1187: };
460[; ;pic12f1822.h: 1188: } CPSCON1bits_t;
461[; ;pic12f1822.h: 1189: extern volatile CPSCON1bits_t CPSCON1bits @ 0x01F;
462[; ;pic12f1822.h: 1208: extern volatile unsigned char TRISA @ 0x08C;
463"1210
464[; ;pic12f1822.h: 1210: asm("TRISA equ 08Ch");
465[; <" TRISA equ 08Ch ;# ">
466[; ;pic12f1822.h: 1213: typedef union {
467[; ;pic12f1822.h: 1214: struct {
468[; ;pic12f1822.h: 1215: unsigned TRISA0 :1;
469[; ;pic12f1822.h: 1216: unsigned TRISA1 :1;
470[; ;pic12f1822.h: 1217: unsigned TRISA2 :1;
471[; ;pic12f1822.h: 1218: unsigned TRISA3 :1;
472[; ;pic12f1822.h: 1219: unsigned TRISA4 :1;
473[; ;pic12f1822.h: 1220: unsigned TRISA5 :1;
474[; ;pic12f1822.h: 1221: };
475[; ;pic12f1822.h: 1222: } TRISAbits_t;
476[; ;pic12f1822.h: 1223: extern volatile TRISAbits_t TRISAbits @ 0x08C;
477[; ;pic12f1822.h: 1257: extern volatile unsigned char PIE1 @ 0x091;
478"1259
479[; ;pic12f1822.h: 1259: asm("PIE1 equ 091h");
480[; <" PIE1 equ 091h ;# ">
481[; ;pic12f1822.h: 1262: typedef union {
482[; ;pic12f1822.h: 1263: struct {
483[; ;pic12f1822.h: 1264: unsigned TMR1IE :1;
484[; ;pic12f1822.h: 1265: unsigned TMR2IE :1;
485[; ;pic12f1822.h: 1266: unsigned CCP1IE :1;
486[; ;pic12f1822.h: 1267: unsigned SSP1IE :1;
487[; ;pic12f1822.h: 1268: unsigned TXIE :1;
488[; ;pic12f1822.h: 1269: unsigned RCIE :1;
489[; ;pic12f1822.h: 1270: unsigned ADIE :1;
490[; ;pic12f1822.h: 1271: unsigned TMR1GIE :1;
491[; ;pic12f1822.h: 1272: };
492[; ;pic12f1822.h: 1273: } PIE1bits_t;
493[; ;pic12f1822.h: 1274: extern volatile PIE1bits_t PIE1bits @ 0x091;
494[; ;pic12f1822.h: 1318: extern volatile unsigned char PIE2 @ 0x092;
495"1320
496[; ;pic12f1822.h: 1320: asm("PIE2 equ 092h");
497[; <" PIE2 equ 092h ;# ">
498[; ;pic12f1822.h: 1323: typedef union {
499[; ;pic12f1822.h: 1324: struct {
500[; ;pic12f1822.h: 1325: unsigned :3;
501[; ;pic12f1822.h: 1326: unsigned BCL1IE :1;
502[; ;pic12f1822.h: 1327: unsigned EEIE :1;
503[; ;pic12f1822.h: 1328: unsigned C1IE :1;
504[; ;pic12f1822.h: 1329: unsigned :1;
505[; ;pic12f1822.h: 1330: unsigned OSFIE :1;
506[; ;pic12f1822.h: 1331: };
507[; ;pic12f1822.h: 1332: } PIE2bits_t;
508[; ;pic12f1822.h: 1333: extern volatile PIE2bits_t PIE2bits @ 0x092;
509[; ;pic12f1822.h: 1357: extern volatile unsigned char OPTION_REG @ 0x095;
510"1359
511[; ;pic12f1822.h: 1359: asm("OPTION_REG equ 095h");
512[; <" OPTION_REG equ 095h ;# ">
513[; ;pic12f1822.h: 1362: typedef union {
514[; ;pic12f1822.h: 1363: struct {
515[; ;pic12f1822.h: 1364: unsigned PS0 :1;
516[; ;pic12f1822.h: 1365: unsigned PS1 :1;
517[; ;pic12f1822.h: 1366: unsigned PS2 :1;
518[; ;pic12f1822.h: 1367: unsigned PSA :1;
519[; ;pic12f1822.h: 1368: unsigned TMR0SE :1;
520[; ;pic12f1822.h: 1369: unsigned TMR0CS :1;
521[; ;pic12f1822.h: 1370: unsigned INTEDG :1;
522[; ;pic12f1822.h: 1371: unsigned nWPUEN :1;
523[; ;pic12f1822.h: 1372: };
524[; ;pic12f1822.h: 1373: struct {
525[; ;pic12f1822.h: 1374: unsigned PS :3;
526[; ;pic12f1822.h: 1375: unsigned :1;
527[; ;pic12f1822.h: 1376: unsigned T0SE :1;
528[; ;pic12f1822.h: 1377: unsigned T0CS :1;
529[; ;pic12f1822.h: 1378: };
530[; ;pic12f1822.h: 1379: } OPTION_REGbits_t;
531[; ;pic12f1822.h: 1380: extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
532[; ;pic12f1822.h: 1439: extern volatile unsigned char PCON @ 0x096;
533"1441
534[; ;pic12f1822.h: 1441: asm("PCON equ 096h");
535[; <" PCON equ 096h ;# ">
536[; ;pic12f1822.h: 1444: typedef union {
537[; ;pic12f1822.h: 1445: struct {
538[; ;pic12f1822.h: 1446: unsigned nBOR :1;
539[; ;pic12f1822.h: 1447: unsigned nPOR :1;
540[; ;pic12f1822.h: 1448: unsigned nRI :1;
541[; ;pic12f1822.h: 1449: unsigned nRMCLR :1;
542[; ;pic12f1822.h: 1450: unsigned :2;
543[; ;pic12f1822.h: 1451: unsigned STKUNF :1;
544[; ;pic12f1822.h: 1452: unsigned STKOVF :1;
545[; ;pic12f1822.h: 1453: };
546[; ;pic12f1822.h: 1454: } PCONbits_t;
547[; ;pic12f1822.h: 1455: extern volatile PCONbits_t PCONbits @ 0x096;
548[; ;pic12f1822.h: 1489: extern volatile unsigned char WDTCON @ 0x097;
549"1491
550[; ;pic12f1822.h: 1491: asm("WDTCON equ 097h");
551[; <" WDTCON equ 097h ;# ">
552[; ;pic12f1822.h: 1494: typedef union {
553[; ;pic12f1822.h: 1495: struct {
554[; ;pic12f1822.h: 1496: unsigned SWDTEN :1;
555[; ;pic12f1822.h: 1497: unsigned WDTPS0 :1;
556[; ;pic12f1822.h: 1498: unsigned WDTPS1 :1;
557[; ;pic12f1822.h: 1499: unsigned WDTPS2 :1;
558[; ;pic12f1822.h: 1500: unsigned WDTPS3 :1;
559[; ;pic12f1822.h: 1501: unsigned WDTPS4 :1;
560[; ;pic12f1822.h: 1502: };
561[; ;pic12f1822.h: 1503: struct {
562[; ;pic12f1822.h: 1504: unsigned :1;
563[; ;pic12f1822.h: 1505: unsigned WDTPS :5;
564[; ;pic12f1822.h: 1506: };
565[; ;pic12f1822.h: 1507: } WDTCONbits_t;
566[; ;pic12f1822.h: 1508: extern volatile WDTCONbits_t WDTCONbits @ 0x097;
567[; ;pic12f1822.h: 1547: extern volatile unsigned char OSCTUNE @ 0x098;
568"1549
569[; ;pic12f1822.h: 1549: asm("OSCTUNE equ 098h");
570[; <" OSCTUNE equ 098h ;# ">
571[; ;pic12f1822.h: 1552: typedef union {
572[; ;pic12f1822.h: 1553: struct {
573[; ;pic12f1822.h: 1554: unsigned TUN0 :1;
574[; ;pic12f1822.h: 1555: unsigned TUN1 :1;
575[; ;pic12f1822.h: 1556: unsigned TUN2 :1;
576[; ;pic12f1822.h: 1557: unsigned TUN3 :1;
577[; ;pic12f1822.h: 1558: unsigned TUN4 :1;
578[; ;pic12f1822.h: 1559: unsigned TUN5 :1;
579[; ;pic12f1822.h: 1560: };
580[; ;pic12f1822.h: 1561: struct {
581[; ;pic12f1822.h: 1562: unsigned TUN :6;
582[; ;pic12f1822.h: 1563: };
583[; ;pic12f1822.h: 1564: } OSCTUNEbits_t;
584[; ;pic12f1822.h: 1565: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
585[; ;pic12f1822.h: 1604: extern volatile unsigned char OSCCON @ 0x099;
586"1606
587[; ;pic12f1822.h: 1606: asm("OSCCON equ 099h");
588[; <" OSCCON equ 099h ;# ">
589[; ;pic12f1822.h: 1609: typedef union {
590[; ;pic12f1822.h: 1610: struct {
591[; ;pic12f1822.h: 1611: unsigned SCS0 :1;
592[; ;pic12f1822.h: 1612: unsigned SCS1 :1;
593[; ;pic12f1822.h: 1613: unsigned :1;
594[; ;pic12f1822.h: 1614: unsigned IRCF0 :1;
595[; ;pic12f1822.h: 1615: unsigned IRCF1 :1;
596[; ;pic12f1822.h: 1616: unsigned IRCF2 :1;
597[; ;pic12f1822.h: 1617: unsigned IRCF3 :1;
598[; ;pic12f1822.h: 1618: unsigned SPLLEN :1;
599[; ;pic12f1822.h: 1619: };
600[; ;pic12f1822.h: 1620: struct {
601[; ;pic12f1822.h: 1621: unsigned SCS :2;
602[; ;pic12f1822.h: 1622: unsigned :1;
603[; ;pic12f1822.h: 1623: unsigned IRCF :4;
604[; ;pic12f1822.h: 1624: };
605[; ;pic12f1822.h: 1625: } OSCCONbits_t;
606[; ;pic12f1822.h: 1626: extern volatile OSCCONbits_t OSCCONbits @ 0x099;
607[; ;pic12f1822.h: 1675: extern volatile unsigned char OSCSTAT @ 0x09A;
608"1677
609[; ;pic12f1822.h: 1677: asm("OSCSTAT equ 09Ah");
610[; <" OSCSTAT equ 09Ah ;# ">
611[; ;pic12f1822.h: 1680: typedef union {
612[; ;pic12f1822.h: 1681: struct {
613[; ;pic12f1822.h: 1682: unsigned HFIOFS :1;
614[; ;pic12f1822.h: 1683: unsigned LFIOFR :1;
615[; ;pic12f1822.h: 1684: unsigned MFIOFR :1;
616[; ;pic12f1822.h: 1685: unsigned HFIOFL :1;
617[; ;pic12f1822.h: 1686: unsigned HFIOFR :1;
618[; ;pic12f1822.h: 1687: unsigned OSTS :1;
619[; ;pic12f1822.h: 1688: unsigned PLLR :1;
620[; ;pic12f1822.h: 1689: unsigned T1OSCR :1;
621[; ;pic12f1822.h: 1690: };
622[; ;pic12f1822.h: 1691: } OSCSTATbits_t;
623[; ;pic12f1822.h: 1692: extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
624[; ;pic12f1822.h: 1736: extern volatile unsigned short ADRES @ 0x09B;
625"1738
626[; ;pic12f1822.h: 1738: asm("ADRES equ 09Bh");
627[; <" ADRES equ 09Bh ;# ">
628[; ;pic12f1822.h: 1742: extern volatile unsigned char ADRESL @ 0x09B;
629"1744
630[; ;pic12f1822.h: 1744: asm("ADRESL equ 09Bh");
631[; <" ADRESL equ 09Bh ;# ">
632[; ;pic12f1822.h: 1747: typedef union {
633[; ;pic12f1822.h: 1748: struct {
634[; ;pic12f1822.h: 1749: unsigned ADRESL :8;
635[; ;pic12f1822.h: 1750: };
636[; ;pic12f1822.h: 1751: } ADRESLbits_t;
637[; ;pic12f1822.h: 1752: extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
638[; ;pic12f1822.h: 1761: extern volatile unsigned char ADRESH @ 0x09C;
639"1763
640[; ;pic12f1822.h: 1763: asm("ADRESH equ 09Ch");
641[; <" ADRESH equ 09Ch ;# ">
642[; ;pic12f1822.h: 1766: typedef union {
643[; ;pic12f1822.h: 1767: struct {
644[; ;pic12f1822.h: 1768: unsigned ADRESH :8;
645[; ;pic12f1822.h: 1769: };
646[; ;pic12f1822.h: 1770: } ADRESHbits_t;
647[; ;pic12f1822.h: 1771: extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
648[; ;pic12f1822.h: 1780: extern volatile unsigned char ADCON0 @ 0x09D;
649"1782
650[; ;pic12f1822.h: 1782: asm("ADCON0 equ 09Dh");
651[; <" ADCON0 equ 09Dh ;# ">
652[; ;pic12f1822.h: 1785: typedef union {
653[; ;pic12f1822.h: 1786: struct {
654[; ;pic12f1822.h: 1787: unsigned ADON :1;
655[; ;pic12f1822.h: 1788: unsigned GO_nDONE :1;
656[; ;pic12f1822.h: 1789: unsigned CHS0 :1;
657[; ;pic12f1822.h: 1790: unsigned CHS1 :1;
658[; ;pic12f1822.h: 1791: unsigned CHS2 :1;
659[; ;pic12f1822.h: 1792: unsigned CHS3 :1;
660[; ;pic12f1822.h: 1793: unsigned CHS4 :1;
661[; ;pic12f1822.h: 1794: };
662[; ;pic12f1822.h: 1795: struct {
663[; ;pic12f1822.h: 1796: unsigned :1;
664[; ;pic12f1822.h: 1797: unsigned ADGO :1;
665[; ;pic12f1822.h: 1798: unsigned CHS :5;
666[; ;pic12f1822.h: 1799: };
667[; ;pic12f1822.h: 1800: struct {
668[; ;pic12f1822.h: 1801: unsigned :1;
669[; ;pic12f1822.h: 1802: unsigned GO :1;
670[; ;pic12f1822.h: 1803: };
671[; ;pic12f1822.h: 1804: struct {
672[; ;pic12f1822.h: 1805: unsigned :1;
673[; ;pic12f1822.h: 1806: unsigned nDONE :1;
674[; ;pic12f1822.h: 1807: };
675[; ;pic12f1822.h: 1808: } ADCON0bits_t;
676[; ;pic12f1822.h: 1809: extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
677[; ;pic12f1822.h: 1868: extern volatile unsigned char ADCON1 @ 0x09E;
678"1870
679[; ;pic12f1822.h: 1870: asm("ADCON1 equ 09Eh");
680[; <" ADCON1 equ 09Eh ;# ">
681[; ;pic12f1822.h: 1873: typedef union {
682[; ;pic12f1822.h: 1874: struct {
683[; ;pic12f1822.h: 1875: unsigned ADPREF0 :1;
684[; ;pic12f1822.h: 1876: unsigned ADPREF1 :1;
685[; ;pic12f1822.h: 1877: unsigned :2;
686[; ;pic12f1822.h: 1878: unsigned ADCS0 :1;
687[; ;pic12f1822.h: 1879: unsigned ADCS1 :1;
688[; ;pic12f1822.h: 1880: unsigned ADCS2 :1;
689[; ;pic12f1822.h: 1881: unsigned ADFM :1;
690[; ;pic12f1822.h: 1882: };
691[; ;pic12f1822.h: 1883: struct {
692[; ;pic12f1822.h: 1884: unsigned ADPREF :2;
693[; ;pic12f1822.h: 1885: unsigned :2;
694[; ;pic12f1822.h: 1886: unsigned ADCS :3;
695[; ;pic12f1822.h: 1887: };
696[; ;pic12f1822.h: 1888: } ADCON1bits_t;
697[; ;pic12f1822.h: 1889: extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
698[; ;pic12f1822.h: 1933: extern volatile unsigned char LATA @ 0x10C;
699"1935
700[; ;pic12f1822.h: 1935: asm("LATA equ 010Ch");
701[; <" LATA equ 010Ch ;# ">
702[; ;pic12f1822.h: 1938: typedef union {
703[; ;pic12f1822.h: 1939: struct {
704[; ;pic12f1822.h: 1940: unsigned LATA0 :1;
705[; ;pic12f1822.h: 1941: unsigned LATA1 :1;
706[; ;pic12f1822.h: 1942: unsigned LATA2 :1;
707[; ;pic12f1822.h: 1943: unsigned :1;
708[; ;pic12f1822.h: 1944: unsigned LATA4 :1;
709[; ;pic12f1822.h: 1945: unsigned LATA5 :1;
710[; ;pic12f1822.h: 1946: };
711[; ;pic12f1822.h: 1947: } LATAbits_t;
712[; ;pic12f1822.h: 1948: extern volatile LATAbits_t LATAbits @ 0x10C;
713[; ;pic12f1822.h: 1977: extern volatile unsigned char CM1CON0 @ 0x111;
714"1979
715[; ;pic12f1822.h: 1979: asm("CM1CON0 equ 0111h");
716[; <" CM1CON0 equ 0111h ;# ">
717[; ;pic12f1822.h: 1982: typedef union {
718[; ;pic12f1822.h: 1983: struct {
719[; ;pic12f1822.h: 1984: unsigned C1SYNC :1;
720[; ;pic12f1822.h: 1985: unsigned C1HYS :1;
721[; ;pic12f1822.h: 1986: unsigned C1SP :1;
722[; ;pic12f1822.h: 1987: unsigned :1;
723[; ;pic12f1822.h: 1988: unsigned C1POL :1;
724[; ;pic12f1822.h: 1989: unsigned C1OE :1;
725[; ;pic12f1822.h: 1990: unsigned C1OUT :1;
726[; ;pic12f1822.h: 1991: unsigned C1ON :1;
727[; ;pic12f1822.h: 1992: };
728[; ;pic12f1822.h: 1993: } CM1CON0bits_t;
729[; ;pic12f1822.h: 1994: extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
730[; ;pic12f1822.h: 2033: extern volatile unsigned char CM1CON1 @ 0x112;
731"2035
732[; ;pic12f1822.h: 2035: asm("CM1CON1 equ 0112h");
733[; <" CM1CON1 equ 0112h ;# ">
734[; ;pic12f1822.h: 2038: typedef union {
735[; ;pic12f1822.h: 2039: struct {
736[; ;pic12f1822.h: 2040: unsigned C1NCH0 :1;
737[; ;pic12f1822.h: 2041: unsigned :3;
738[; ;pic12f1822.h: 2042: unsigned C1PCH0 :1;
739[; ;pic12f1822.h: 2043: unsigned C1PCH1 :1;
740[; ;pic12f1822.h: 2044: unsigned C1INTN :1;
741[; ;pic12f1822.h: 2045: unsigned C1INTP :1;
742[; ;pic12f1822.h: 2046: };
743[; ;pic12f1822.h: 2047: struct {
744[; ;pic12f1822.h: 2048: unsigned :4;
745[; ;pic12f1822.h: 2049: unsigned C1PCH :2;
746[; ;pic12f1822.h: 2050: };
747[; ;pic12f1822.h: 2051: } CM1CON1bits_t;
748[; ;pic12f1822.h: 2052: extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
749[; ;pic12f1822.h: 2086: extern volatile unsigned char CMOUT @ 0x115;
750"2088
751[; ;pic12f1822.h: 2088: asm("CMOUT equ 0115h");
752[; <" CMOUT equ 0115h ;# ">
753[; ;pic12f1822.h: 2091: typedef union {
754[; ;pic12f1822.h: 2092: struct {
755[; ;pic12f1822.h: 2093: unsigned MC1OUT :1;
756[; ;pic12f1822.h: 2094: };
757[; ;pic12f1822.h: 2095: } CMOUTbits_t;
758[; ;pic12f1822.h: 2096: extern volatile CMOUTbits_t CMOUTbits @ 0x115;
759[; ;pic12f1822.h: 2105: extern volatile unsigned char BORCON @ 0x116;
760"2107
761[; ;pic12f1822.h: 2107: asm("BORCON equ 0116h");
762[; <" BORCON equ 0116h ;# ">
763[; ;pic12f1822.h: 2110: typedef union {
764[; ;pic12f1822.h: 2111: struct {
765[; ;pic12f1822.h: 2112: unsigned BORRDY :1;
766[; ;pic12f1822.h: 2113: unsigned :6;
767[; ;pic12f1822.h: 2114: unsigned SBOREN :1;
768[; ;pic12f1822.h: 2115: };
769[; ;pic12f1822.h: 2116: } BORCONbits_t;
770[; ;pic12f1822.h: 2117: extern volatile BORCONbits_t BORCONbits @ 0x116;
771[; ;pic12f1822.h: 2131: extern volatile unsigned char FVRCON @ 0x117;
772"2133
773[; ;pic12f1822.h: 2133: asm("FVRCON equ 0117h");
774[; <" FVRCON equ 0117h ;# ">
775[; ;pic12f1822.h: 2136: typedef union {
776[; ;pic12f1822.h: 2137: struct {
777[; ;pic12f1822.h: 2138: unsigned ADFVR0 :1;
778[; ;pic12f1822.h: 2139: unsigned ADFVR1 :1;
779[; ;pic12f1822.h: 2140: unsigned CDAFVR0 :1;
780[; ;pic12f1822.h: 2141: unsigned CDAFVR1 :1;
781[; ;pic12f1822.h: 2142: unsigned TSRNG :1;
782[; ;pic12f1822.h: 2143: unsigned TSEN :1;
783[; ;pic12f1822.h: 2144: unsigned FVRRDY :1;
784[; ;pic12f1822.h: 2145: unsigned FVREN :1;
785[; ;pic12f1822.h: 2146: };
786[; ;pic12f1822.h: 2147: struct {
787[; ;pic12f1822.h: 2148: unsigned ADFVR :2;
788[; ;pic12f1822.h: 2149: unsigned CDAFVR :2;
789[; ;pic12f1822.h: 2150: };
790[; ;pic12f1822.h: 2151: } FVRCONbits_t;
791[; ;pic12f1822.h: 2152: extern volatile FVRCONbits_t FVRCONbits @ 0x117;
792[; ;pic12f1822.h: 2206: extern volatile unsigned char DACCON0 @ 0x118;
793"2208
794[; ;pic12f1822.h: 2208: asm("DACCON0 equ 0118h");
795[; <" DACCON0 equ 0118h ;# ">
796[; ;pic12f1822.h: 2211: typedef union {
797[; ;pic12f1822.h: 2212: struct {
798[; ;pic12f1822.h: 2213: unsigned :2;
799[; ;pic12f1822.h: 2214: unsigned DACPSS0 :1;
800[; ;pic12f1822.h: 2215: unsigned DACPSS1 :1;
801[; ;pic12f1822.h: 2216: unsigned :1;
802[; ;pic12f1822.h: 2217: unsigned DACOE :1;
803[; ;pic12f1822.h: 2218: unsigned DACLPS :1;
804[; ;pic12f1822.h: 2219: unsigned DACEN :1;
805[; ;pic12f1822.h: 2220: };
806[; ;pic12f1822.h: 2221: struct {
807[; ;pic12f1822.h: 2222: unsigned :2;
808[; ;pic12f1822.h: 2223: unsigned DACPSS :2;
809[; ;pic12f1822.h: 2224: };
810[; ;pic12f1822.h: 2225: } DACCON0bits_t;
811[; ;pic12f1822.h: 2226: extern volatile DACCON0bits_t DACCON0bits @ 0x118;
812[; ;pic12f1822.h: 2260: extern volatile unsigned char DACCON1 @ 0x119;
813"2262
814[; ;pic12f1822.h: 2262: asm("DACCON1 equ 0119h");
815[; <" DACCON1 equ 0119h ;# ">
816[; ;pic12f1822.h: 2265: typedef union {
817[; ;pic12f1822.h: 2266: struct {
818[; ;pic12f1822.h: 2267: unsigned DACR0 :1;
819[; ;pic12f1822.h: 2268: unsigned DACR1 :1;
820[; ;pic12f1822.h: 2269: unsigned DACR2 :1;
821[; ;pic12f1822.h: 2270: unsigned DACR3 :1;
822[; ;pic12f1822.h: 2271: unsigned DACR4 :1;
823[; ;pic12f1822.h: 2272: };
824[; ;pic12f1822.h: 2273: struct {
825[; ;pic12f1822.h: 2274: unsigned DACR :5;
826[; ;pic12f1822.h: 2275: };
827[; ;pic12f1822.h: 2276: } DACCON1bits_t;
828[; ;pic12f1822.h: 2277: extern volatile DACCON1bits_t DACCON1bits @ 0x119;
829[; ;pic12f1822.h: 2311: extern volatile unsigned char SRCON0 @ 0x11A;
830"2313
831[; ;pic12f1822.h: 2313: asm("SRCON0 equ 011Ah");
832[; <" SRCON0 equ 011Ah ;# ">
833[; ;pic12f1822.h: 2316: typedef union {
834[; ;pic12f1822.h: 2317: struct {
835[; ;pic12f1822.h: 2318: unsigned SRPR :1;
836[; ;pic12f1822.h: 2319: unsigned SRPS :1;
837[; ;pic12f1822.h: 2320: unsigned SRNQEN :1;
838[; ;pic12f1822.h: 2321: unsigned SRQEN :1;
839[; ;pic12f1822.h: 2322: unsigned SRCLK0 :1;
840[; ;pic12f1822.h: 2323: unsigned SRCLK1 :1;
841[; ;pic12f1822.h: 2324: unsigned SRCLK2 :1;
842[; ;pic12f1822.h: 2325: unsigned SRLEN :1;
843[; ;pic12f1822.h: 2326: };
844[; ;pic12f1822.h: 2327: struct {
845[; ;pic12f1822.h: 2328: unsigned :4;
846[; ;pic12f1822.h: 2329: unsigned SRCLK :3;
847[; ;pic12f1822.h: 2330: };
848[; ;pic12f1822.h: 2331: } SRCON0bits_t;
849[; ;pic12f1822.h: 2332: extern volatile SRCON0bits_t SRCON0bits @ 0x11A;
850[; ;pic12f1822.h: 2381: extern volatile unsigned char SRCON1 @ 0x11B;
851"2383
852[; ;pic12f1822.h: 2383: asm("SRCON1 equ 011Bh");
853[; <" SRCON1 equ 011Bh ;# ">
854[; ;pic12f1822.h: 2386: typedef union {
855[; ;pic12f1822.h: 2387: struct {
856[; ;pic12f1822.h: 2388: unsigned SRRC1E :1;
857[; ;pic12f1822.h: 2389: unsigned :1;
858[; ;pic12f1822.h: 2390: unsigned SRRCKE :1;
859[; ;pic12f1822.h: 2391: unsigned SRRPE :1;
860[; ;pic12f1822.h: 2392: unsigned SRSC1E :1;
861[; ;pic12f1822.h: 2393: unsigned :1;
862[; ;pic12f1822.h: 2394: unsigned SRSCKE :1;
863[; ;pic12f1822.h: 2395: unsigned SRSPE :1;
864[; ;pic12f1822.h: 2396: };
865[; ;pic12f1822.h: 2397: } SRCON1bits_t;
866[; ;pic12f1822.h: 2398: extern volatile SRCON1bits_t SRCON1bits @ 0x11B;
867[; ;pic12f1822.h: 2432: extern volatile unsigned char APFCON @ 0x11D;
868"2434
869[; ;pic12f1822.h: 2434: asm("APFCON equ 011Dh");
870[; <" APFCON equ 011Dh ;# ">
871[; ;pic12f1822.h: 2437: extern volatile unsigned char APFCON0 @ 0x11D;
872"2439
873[; ;pic12f1822.h: 2439: asm("APFCON0 equ 011Dh");
874[; <" APFCON0 equ 011Dh ;# ">
875[; ;pic12f1822.h: 2442: typedef union {
876[; ;pic12f1822.h: 2443: struct {
877[; ;pic12f1822.h: 2444: unsigned CCP1SEL :1;
878[; ;pic12f1822.h: 2445: unsigned P1BSEL :1;
879[; ;pic12f1822.h: 2446: unsigned TXCKSEL :1;
880[; ;pic12f1822.h: 2447: unsigned T1GSEL :1;
881[; ;pic12f1822.h: 2448: unsigned :1;
882[; ;pic12f1822.h: 2449: unsigned SSSEL :1;
883[; ;pic12f1822.h: 2450: unsigned SDOSEL :1;
884[; ;pic12f1822.h: 2451: unsigned RXDTSEL :1;
885[; ;pic12f1822.h: 2452: };
886[; ;pic12f1822.h: 2453: struct {
887[; ;pic12f1822.h: 2454: unsigned :5;
888[; ;pic12f1822.h: 2455: unsigned SS1SEL :1;
889[; ;pic12f1822.h: 2456: unsigned SDO1SEL :1;
890[; ;pic12f1822.h: 2457: };
891[; ;pic12f1822.h: 2458: } APFCONbits_t;
892[; ;pic12f1822.h: 2459: extern volatile APFCONbits_t APFCONbits @ 0x11D;
893[; ;pic12f1822.h: 2507: typedef union {
894[; ;pic12f1822.h: 2508: struct {
895[; ;pic12f1822.h: 2509: unsigned CCP1SEL :1;
896[; ;pic12f1822.h: 2510: unsigned P1BSEL :1;
897[; ;pic12f1822.h: 2511: unsigned TXCKSEL :1;
898[; ;pic12f1822.h: 2512: unsigned T1GSEL :1;
899[; ;pic12f1822.h: 2513: unsigned :1;
900[; ;pic12f1822.h: 2514: unsigned SSSEL :1;
901[; ;pic12f1822.h: 2515: unsigned SDOSEL :1;
902[; ;pic12f1822.h: 2516: unsigned RXDTSEL :1;
903[; ;pic12f1822.h: 2517: };
904[; ;pic12f1822.h: 2518: struct {
905[; ;pic12f1822.h: 2519: unsigned :5;
906[; ;pic12f1822.h: 2520: unsigned SS1SEL :1;
907[; ;pic12f1822.h: 2521: unsigned SDO1SEL :1;
908[; ;pic12f1822.h: 2522: };
909[; ;pic12f1822.h: 2523: } APFCON0bits_t;
910[; ;pic12f1822.h: 2524: extern volatile APFCON0bits_t APFCON0bits @ 0x11D;
911[; ;pic12f1822.h: 2573: extern volatile unsigned char ANSELA @ 0x18C;
912"2575
913[; ;pic12f1822.h: 2575: asm("ANSELA equ 018Ch");
914[; <" ANSELA equ 018Ch ;# ">
915[; ;pic12f1822.h: 2578: typedef union {
916[; ;pic12f1822.h: 2579: struct {
917[; ;pic12f1822.h: 2580: unsigned ANSA0 :1;
918[; ;pic12f1822.h: 2581: unsigned ANSA1 :1;
919[; ;pic12f1822.h: 2582: unsigned ANSA2 :1;
920[; ;pic12f1822.h: 2583: unsigned :1;
921[; ;pic12f1822.h: 2584: unsigned ANSA4 :1;
922[; ;pic12f1822.h: 2585: };
923[; ;pic12f1822.h: 2586: struct {
924[; ;pic12f1822.h: 2587: unsigned ANSELA :5;
925[; ;pic12f1822.h: 2588: };
926[; ;pic12f1822.h: 2589: } ANSELAbits_t;
927[; ;pic12f1822.h: 2590: extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
928[; ;pic12f1822.h: 2619: extern volatile unsigned short EEADR @ 0x191;
929"2621
930[; ;pic12f1822.h: 2621: asm("EEADR equ 0191h");
931[; <" EEADR equ 0191h ;# ">
932[; ;pic12f1822.h: 2625: extern volatile unsigned char EEADRL @ 0x191;
933"2627
934[; ;pic12f1822.h: 2627: asm("EEADRL equ 0191h");
935[; <" EEADRL equ 0191h ;# ">
936[; ;pic12f1822.h: 2630: typedef union {
937[; ;pic12f1822.h: 2631: struct {
938[; ;pic12f1822.h: 2632: unsigned EEADRL :8;
939[; ;pic12f1822.h: 2633: };
940[; ;pic12f1822.h: 2634: } EEADRLbits_t;
941[; ;pic12f1822.h: 2635: extern volatile EEADRLbits_t EEADRLbits @ 0x191;
942[; ;pic12f1822.h: 2644: extern volatile unsigned char EEADRH @ 0x192;
943"2646
944[; ;pic12f1822.h: 2646: asm("EEADRH equ 0192h");
945[; <" EEADRH equ 0192h ;# ">
946[; ;pic12f1822.h: 2649: typedef union {
947[; ;pic12f1822.h: 2650: struct {
948[; ;pic12f1822.h: 2651: unsigned EEADRH :7;
949[; ;pic12f1822.h: 2652: };
950[; ;pic12f1822.h: 2653: } EEADRHbits_t;
951[; ;pic12f1822.h: 2654: extern volatile EEADRHbits_t EEADRHbits @ 0x192;
952[; ;pic12f1822.h: 2663: extern volatile unsigned short EEDAT @ 0x193;
953"2665
954[; ;pic12f1822.h: 2665: asm("EEDAT equ 0193h");
955[; <" EEDAT equ 0193h ;# ">
956[; ;pic12f1822.h: 2669: extern volatile unsigned char EEDATL @ 0x193;
957"2671
958[; ;pic12f1822.h: 2671: asm("EEDATL equ 0193h");
959[; <" EEDATL equ 0193h ;# ">
960[; ;pic12f1822.h: 2674: extern volatile unsigned char EEDATA @ 0x193;
961"2676
962[; ;pic12f1822.h: 2676: asm("EEDATA equ 0193h");
963[; <" EEDATA equ 0193h ;# ">
964[; ;pic12f1822.h: 2679: typedef union {
965[; ;pic12f1822.h: 2680: struct {
966[; ;pic12f1822.h: 2681: unsigned EEDATL :8;
967[; ;pic12f1822.h: 2682: };
968[; ;pic12f1822.h: 2683: } EEDATLbits_t;
969[; ;pic12f1822.h: 2684: extern volatile EEDATLbits_t EEDATLbits @ 0x193;
970[; ;pic12f1822.h: 2692: typedef union {
971[; ;pic12f1822.h: 2693: struct {
972[; ;pic12f1822.h: 2694: unsigned EEDATL :8;
973[; ;pic12f1822.h: 2695: };
974[; ;pic12f1822.h: 2696: } EEDATAbits_t;
975[; ;pic12f1822.h: 2697: extern volatile EEDATAbits_t EEDATAbits @ 0x193;
976[; ;pic12f1822.h: 2706: extern volatile unsigned char EEDATH @ 0x194;
977"2708
978[; ;pic12f1822.h: 2708: asm("EEDATH equ 0194h");
979[; <" EEDATH equ 0194h ;# ">
980[; ;pic12f1822.h: 2711: typedef union {
981[; ;pic12f1822.h: 2712: struct {
982[; ;pic12f1822.h: 2713: unsigned EEDATH :6;
983[; ;pic12f1822.h: 2714: };
984[; ;pic12f1822.h: 2715: } EEDATHbits_t;
985[; ;pic12f1822.h: 2716: extern volatile EEDATHbits_t EEDATHbits @ 0x194;
986[; ;pic12f1822.h: 2725: extern volatile unsigned char EECON1 @ 0x195;
987"2727
988[; ;pic12f1822.h: 2727: asm("EECON1 equ 0195h");
989[; <" EECON1 equ 0195h ;# ">
990[; ;pic12f1822.h: 2730: typedef union {
991[; ;pic12f1822.h: 2731: struct {
992[; ;pic12f1822.h: 2732: unsigned RD :1;
993[; ;pic12f1822.h: 2733: unsigned WR :1;
994[; ;pic12f1822.h: 2734: unsigned WREN :1;
995[; ;pic12f1822.h: 2735: unsigned WRERR :1;
996[; ;pic12f1822.h: 2736: unsigned FREE :1;
997[; ;pic12f1822.h: 2737: unsigned LWLO :1;
998[; ;pic12f1822.h: 2738: unsigned CFGS :1;
999[; ;pic12f1822.h: 2739: unsigned EEPGD :1;
1000[; ;pic12f1822.h: 2740: };
1001[; ;pic12f1822.h: 2741: } EECON1bits_t;
1002[; ;pic12f1822.h: 2742: extern volatile EECON1bits_t EECON1bits @ 0x195;
1003[; ;pic12f1822.h: 2786: extern volatile unsigned char EECON2 @ 0x196;
1004"2788
1005[; ;pic12f1822.h: 2788: asm("EECON2 equ 0196h");
1006[; <" EECON2 equ 0196h ;# ">
1007[; ;pic12f1822.h: 2791: typedef union {
1008[; ;pic12f1822.h: 2792: struct {
1009[; ;pic12f1822.h: 2793: unsigned EECON2 :8;
1010[; ;pic12f1822.h: 2794: };
1011[; ;pic12f1822.h: 2795: } EECON2bits_t;
1012[; ;pic12f1822.h: 2796: extern volatile EECON2bits_t EECON2bits @ 0x196;
1013[; ;pic12f1822.h: 2805: extern volatile unsigned char RCREG @ 0x199;
1014"2807
1015[; ;pic12f1822.h: 2807: asm("RCREG equ 0199h");
1016[; <" RCREG equ 0199h ;# ">
1017[; ;pic12f1822.h: 2810: typedef union {
1018[; ;pic12f1822.h: 2811: struct {
1019[; ;pic12f1822.h: 2812: unsigned RCREG :8;
1020[; ;pic12f1822.h: 2813: };
1021[; ;pic12f1822.h: 2814: } RCREGbits_t;
1022[; ;pic12f1822.h: 2815: extern volatile RCREGbits_t RCREGbits @ 0x199;
1023[; ;pic12f1822.h: 2824: extern volatile unsigned char TXREG @ 0x19A;
1024"2826
1025[; ;pic12f1822.h: 2826: asm("TXREG equ 019Ah");
1026[; <" TXREG equ 019Ah ;# ">
1027[; ;pic12f1822.h: 2829: typedef union {
1028[; ;pic12f1822.h: 2830: struct {
1029[; ;pic12f1822.h: 2831: unsigned TXREG :8;
1030[; ;pic12f1822.h: 2832: };
1031[; ;pic12f1822.h: 2833: } TXREGbits_t;
1032[; ;pic12f1822.h: 2834: extern volatile TXREGbits_t TXREGbits @ 0x19A;
1033[; ;pic12f1822.h: 2843: extern volatile unsigned char SPBRGL @ 0x19B;
1034"2845
1035[; ;pic12f1822.h: 2845: asm("SPBRGL equ 019Bh");
1036[; <" SPBRGL equ 019Bh ;# ">
1037[; ;pic12f1822.h: 2848: extern volatile unsigned char SPBRG @ 0x19B;
1038"2850
1039[; ;pic12f1822.h: 2850: asm("SPBRG equ 019Bh");
1040[; <" SPBRG equ 019Bh ;# ">
1041[; ;pic12f1822.h: 2853: typedef union {
1042[; ;pic12f1822.h: 2854: struct {
1043[; ;pic12f1822.h: 2855: unsigned SPBRGL :8;
1044[; ;pic12f1822.h: 2856: };
1045[; ;pic12f1822.h: 2857: } SPBRGLbits_t;
1046[; ;pic12f1822.h: 2858: extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
1047[; ;pic12f1822.h: 2866: typedef union {
1048[; ;pic12f1822.h: 2867: struct {
1049[; ;pic12f1822.h: 2868: unsigned SPBRGL :8;
1050[; ;pic12f1822.h: 2869: };
1051[; ;pic12f1822.h: 2870: } SPBRGbits_t;
1052[; ;pic12f1822.h: 2871: extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
1053[; ;pic12f1822.h: 2880: extern volatile unsigned char SPBRGH @ 0x19C;
1054"2882
1055[; ;pic12f1822.h: 2882: asm("SPBRGH equ 019Ch");
1056[; <" SPBRGH equ 019Ch ;# ">
1057[; ;pic12f1822.h: 2885: typedef union {
1058[; ;pic12f1822.h: 2886: struct {
1059[; ;pic12f1822.h: 2887: unsigned SPBRGH :8;
1060[; ;pic12f1822.h: 2888: };
1061[; ;pic12f1822.h: 2889: } SPBRGHbits_t;
1062[; ;pic12f1822.h: 2890: extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
1063[; ;pic12f1822.h: 2899: extern volatile unsigned char RCSTA @ 0x19D;
1064"2901
1065[; ;pic12f1822.h: 2901: asm("RCSTA equ 019Dh");
1066[; <" RCSTA equ 019Dh ;# ">
1067[; ;pic12f1822.h: 2904: typedef union {
1068[; ;pic12f1822.h: 2905: struct {
1069[; ;pic12f1822.h: 2906: unsigned RX9D :1;
1070[; ;pic12f1822.h: 2907: unsigned OERR :1;
1071[; ;pic12f1822.h: 2908: unsigned FERR :1;
1072[; ;pic12f1822.h: 2909: unsigned ADDEN :1;
1073[; ;pic12f1822.h: 2910: unsigned CREN :1;
1074[; ;pic12f1822.h: 2911: unsigned SREN :1;
1075[; ;pic12f1822.h: 2912: unsigned RX9 :1;
1076[; ;pic12f1822.h: 2913: unsigned SPEN :1;
1077[; ;pic12f1822.h: 2914: };
1078[; ;pic12f1822.h: 2915: } RCSTAbits_t;
1079[; ;pic12f1822.h: 2916: extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
1080[; ;pic12f1822.h: 2960: extern volatile unsigned char TXSTA @ 0x19E;
1081"2962
1082[; ;pic12f1822.h: 2962: asm("TXSTA equ 019Eh");
1083[; <" TXSTA equ 019Eh ;# ">
1084[; ;pic12f1822.h: 2965: typedef union {
1085[; ;pic12f1822.h: 2966: struct {
1086[; ;pic12f1822.h: 2967: unsigned TX9D :1;
1087[; ;pic12f1822.h: 2968: unsigned TRMT :1;
1088[; ;pic12f1822.h: 2969: unsigned BRGH :1;
1089[; ;pic12f1822.h: 2970: unsigned SENDB :1;
1090[; ;pic12f1822.h: 2971: unsigned SYNC :1;
1091[; ;pic12f1822.h: 2972: unsigned TXEN :1;
1092[; ;pic12f1822.h: 2973: unsigned TX9 :1;
1093[; ;pic12f1822.h: 2974: unsigned CSRC :1;
1094[; ;pic12f1822.h: 2975: };
1095[; ;pic12f1822.h: 2976: } TXSTAbits_t;
1096[; ;pic12f1822.h: 2977: extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
1097[; ;pic12f1822.h: 3021: extern volatile unsigned char BAUDCON @ 0x19F;
1098"3023
1099[; ;pic12f1822.h: 3023: asm("BAUDCON equ 019Fh");
1100[; <" BAUDCON equ 019Fh ;# ">
1101[; ;pic12f1822.h: 3026: typedef union {
1102[; ;pic12f1822.h: 3027: struct {
1103[; ;pic12f1822.h: 3028: unsigned ABDEN :1;
1104[; ;pic12f1822.h: 3029: unsigned WUE :1;
1105[; ;pic12f1822.h: 3030: unsigned :1;
1106[; ;pic12f1822.h: 3031: unsigned BRG16 :1;
1107[; ;pic12f1822.h: 3032: unsigned SCKP :1;
1108[; ;pic12f1822.h: 3033: unsigned :1;
1109[; ;pic12f1822.h: 3034: unsigned RCIDL :1;
1110[; ;pic12f1822.h: 3035: unsigned ABDOVF :1;
1111[; ;pic12f1822.h: 3036: };
1112[; ;pic12f1822.h: 3037: } BAUDCONbits_t;
1113[; ;pic12f1822.h: 3038: extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
1114[; ;pic12f1822.h: 3072: extern volatile unsigned char WPUA @ 0x20C;
1115"3074
1116[; ;pic12f1822.h: 3074: asm("WPUA equ 020Ch");
1117[; <" WPUA equ 020Ch ;# ">
1118[; ;pic12f1822.h: 3077: typedef union {
1119[; ;pic12f1822.h: 3078: struct {
1120[; ;pic12f1822.h: 3079: unsigned WPUA0 :1;
1121[; ;pic12f1822.h: 3080: unsigned WPUA1 :1;
1122[; ;pic12f1822.h: 3081: unsigned WPUA2 :1;
1123[; ;pic12f1822.h: 3082: unsigned WPUA3 :1;
1124[; ;pic12f1822.h: 3083: unsigned WPUA4 :1;
1125[; ;pic12f1822.h: 3084: unsigned WPUA5 :1;
1126[; ;pic12f1822.h: 3085: };
1127[; ;pic12f1822.h: 3086: struct {
1128[; ;pic12f1822.h: 3087: unsigned WPUA :6;
1129[; ;pic12f1822.h: 3088: };
1130[; ;pic12f1822.h: 3089: } WPUAbits_t;
1131[; ;pic12f1822.h: 3090: extern volatile WPUAbits_t WPUAbits @ 0x20C;
1132[; ;pic12f1822.h: 3129: extern volatile unsigned char SSP1BUF @ 0x211;
1133"3131
1134[; ;pic12f1822.h: 3131: asm("SSP1BUF equ 0211h");
1135[; <" SSP1BUF equ 0211h ;# ">
1136[; ;pic12f1822.h: 3134: extern volatile unsigned char SSPBUF @ 0x211;
1137"3136
1138[; ;pic12f1822.h: 3136: asm("SSPBUF equ 0211h");
1139[; <" SSPBUF equ 0211h ;# ">
1140[; ;pic12f1822.h: 3139: typedef union {
1141[; ;pic12f1822.h: 3140: struct {
1142[; ;pic12f1822.h: 3141: unsigned SSPBUF :8;
1143[; ;pic12f1822.h: 3142: };
1144[; ;pic12f1822.h: 3143: } SSP1BUFbits_t;
1145[; ;pic12f1822.h: 3144: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
1146[; ;pic12f1822.h: 3152: typedef union {
1147[; ;pic12f1822.h: 3153: struct {
1148[; ;pic12f1822.h: 3154: unsigned SSPBUF :8;
1149[; ;pic12f1822.h: 3155: };
1150[; ;pic12f1822.h: 3156: } SSPBUFbits_t;
1151[; ;pic12f1822.h: 3157: extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
1152[; ;pic12f1822.h: 3166: extern volatile unsigned char SSP1ADD @ 0x212;
1153"3168
1154[; ;pic12f1822.h: 3168: asm("SSP1ADD equ 0212h");
1155[; <" SSP1ADD equ 0212h ;# ">
1156[; ;pic12f1822.h: 3171: extern volatile unsigned char SSPADD @ 0x212;
1157"3173
1158[; ;pic12f1822.h: 3173: asm("SSPADD equ 0212h");
1159[; <" SSPADD equ 0212h ;# ">
1160[; ;pic12f1822.h: 3176: typedef union {
1161[; ;pic12f1822.h: 3177: struct {
1162[; ;pic12f1822.h: 3178: unsigned SSPADD :8;
1163[; ;pic12f1822.h: 3179: };
1164[; ;pic12f1822.h: 3180: } SSP1ADDbits_t;
1165[; ;pic12f1822.h: 3181: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
1166[; ;pic12f1822.h: 3189: typedef union {
1167[; ;pic12f1822.h: 3190: struct {
1168[; ;pic12f1822.h: 3191: unsigned SSPADD :8;
1169[; ;pic12f1822.h: 3192: };
1170[; ;pic12f1822.h: 3193: } SSPADDbits_t;
1171[; ;pic12f1822.h: 3194: extern volatile SSPADDbits_t SSPADDbits @ 0x212;
1172[; ;pic12f1822.h: 3203: extern volatile unsigned char SSP1MSK @ 0x213;
1173"3205
1174[; ;pic12f1822.h: 3205: asm("SSP1MSK equ 0213h");
1175[; <" SSP1MSK equ 0213h ;# ">
1176[; ;pic12f1822.h: 3208: extern volatile unsigned char SSPMSK @ 0x213;
1177"3210
1178[; ;pic12f1822.h: 3210: asm("SSPMSK equ 0213h");
1179[; <" SSPMSK equ 0213h ;# ">
1180[; ;pic12f1822.h: 3213: typedef union {
1181[; ;pic12f1822.h: 3214: struct {
1182[; ;pic12f1822.h: 3215: unsigned SSPMSK :8;
1183[; ;pic12f1822.h: 3216: };
1184[; ;pic12f1822.h: 3217: } SSP1MSKbits_t;
1185[; ;pic12f1822.h: 3218: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
1186[; ;pic12f1822.h: 3226: typedef union {
1187[; ;pic12f1822.h: 3227: struct {
1188[; ;pic12f1822.h: 3228: unsigned SSPMSK :8;
1189[; ;pic12f1822.h: 3229: };
1190[; ;pic12f1822.h: 3230: } SSPMSKbits_t;
1191[; ;pic12f1822.h: 3231: extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
1192[; ;pic12f1822.h: 3240: extern volatile unsigned char SSP1STAT @ 0x214;
1193"3242
1194[; ;pic12f1822.h: 3242: asm("SSP1STAT equ 0214h");
1195[; <" SSP1STAT equ 0214h ;# ">
1196[; ;pic12f1822.h: 3245: extern volatile unsigned char SSPSTAT @ 0x214;
1197"3247
1198[; ;pic12f1822.h: 3247: asm("SSPSTAT equ 0214h");
1199[; <" SSPSTAT equ 0214h ;# ">
1200[; ;pic12f1822.h: 3250: typedef union {
1201[; ;pic12f1822.h: 3251: struct {
1202[; ;pic12f1822.h: 3252: unsigned BF :1;
1203[; ;pic12f1822.h: 3253: unsigned UA :1;
1204[; ;pic12f1822.h: 3254: unsigned R_nW :1;
1205[; ;pic12f1822.h: 3255: unsigned S :1;
1206[; ;pic12f1822.h: 3256: unsigned P :1;
1207[; ;pic12f1822.h: 3257: unsigned D_nA :1;
1208[; ;pic12f1822.h: 3258: unsigned CKE :1;
1209[; ;pic12f1822.h: 3259: unsigned SMP :1;
1210[; ;pic12f1822.h: 3260: };
1211[; ;pic12f1822.h: 3261: } SSP1STATbits_t;
1212[; ;pic12f1822.h: 3262: extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
1213[; ;pic12f1822.h: 3305: typedef union {
1214[; ;pic12f1822.h: 3306: struct {
1215[; ;pic12f1822.h: 3307: unsigned BF :1;
1216[; ;pic12f1822.h: 3308: unsigned UA :1;
1217[; ;pic12f1822.h: 3309: unsigned R_nW :1;
1218[; ;pic12f1822.h: 3310: unsigned S :1;
1219[; ;pic12f1822.h: 3311: unsigned P :1;
1220[; ;pic12f1822.h: 3312: unsigned D_nA :1;
1221[; ;pic12f1822.h: 3313: unsigned CKE :1;
1222[; ;pic12f1822.h: 3314: unsigned SMP :1;
1223[; ;pic12f1822.h: 3315: };
1224[; ;pic12f1822.h: 3316: } SSPSTATbits_t;
1225[; ;pic12f1822.h: 3317: extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
1226[; ;pic12f1822.h: 3361: extern volatile unsigned char SSP1CON1 @ 0x215;
1227"3363
1228[; ;pic12f1822.h: 3363: asm("SSP1CON1 equ 0215h");
1229[; <" SSP1CON1 equ 0215h ;# ">
1230[; ;pic12f1822.h: 3366: extern volatile unsigned char SSPCON1 @ 0x215;
1231"3368
1232[; ;pic12f1822.h: 3368: asm("SSPCON1 equ 0215h");
1233[; <" SSPCON1 equ 0215h ;# ">
1234[; ;pic12f1822.h: 3370: extern volatile unsigned char SSPCON @ 0x215;
1235"3372
1236[; ;pic12f1822.h: 3372: asm("SSPCON equ 0215h");
1237[; <" SSPCON equ 0215h ;# ">
1238[; ;pic12f1822.h: 3375: typedef union {
1239[; ;pic12f1822.h: 3376: struct {
1240[; ;pic12f1822.h: 3377: unsigned SSPM0 :1;
1241[; ;pic12f1822.h: 3378: unsigned SSPM1 :1;
1242[; ;pic12f1822.h: 3379: unsigned SSPM2 :1;
1243[; ;pic12f1822.h: 3380: unsigned SSPM3 :1;
1244[; ;pic12f1822.h: 3381: unsigned CKP :1;
1245[; ;pic12f1822.h: 3382: unsigned SSPEN :1;
1246[; ;pic12f1822.h: 3383: unsigned SSPOV :1;
1247[; ;pic12f1822.h: 3384: unsigned WCOL :1;
1248[; ;pic12f1822.h: 3385: };
1249[; ;pic12f1822.h: 3386: struct {
1250[; ;pic12f1822.h: 3387: unsigned SSPM :4;
1251[; ;pic12f1822.h: 3388: };
1252[; ;pic12f1822.h: 3389: } SSP1CON1bits_t;
1253[; ;pic12f1822.h: 3390: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
1254[; ;pic12f1822.h: 3438: typedef union {
1255[; ;pic12f1822.h: 3439: struct {
1256[; ;pic12f1822.h: 3440: unsigned SSPM0 :1;
1257[; ;pic12f1822.h: 3441: unsigned SSPM1 :1;
1258[; ;pic12f1822.h: 3442: unsigned SSPM2 :1;
1259[; ;pic12f1822.h: 3443: unsigned SSPM3 :1;
1260[; ;pic12f1822.h: 3444: unsigned CKP :1;
1261[; ;pic12f1822.h: 3445: unsigned SSPEN :1;
1262[; ;pic12f1822.h: 3446: unsigned SSPOV :1;
1263[; ;pic12f1822.h: 3447: unsigned WCOL :1;
1264[; ;pic12f1822.h: 3448: };
1265[; ;pic12f1822.h: 3449: struct {
1266[; ;pic12f1822.h: 3450: unsigned SSPM :4;
1267[; ;pic12f1822.h: 3451: };
1268[; ;pic12f1822.h: 3452: } SSPCON1bits_t;
1269[; ;pic12f1822.h: 3453: extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
1270[; ;pic12f1822.h: 3500: typedef union {
1271[; ;pic12f1822.h: 3501: struct {
1272[; ;pic12f1822.h: 3502: unsigned SSPM0 :1;
1273[; ;pic12f1822.h: 3503: unsigned SSPM1 :1;
1274[; ;pic12f1822.h: 3504: unsigned SSPM2 :1;
1275[; ;pic12f1822.h: 3505: unsigned SSPM3 :1;
1276[; ;pic12f1822.h: 3506: unsigned CKP :1;
1277[; ;pic12f1822.h: 3507: unsigned SSPEN :1;
1278[; ;pic12f1822.h: 3508: unsigned SSPOV :1;
1279[; ;pic12f1822.h: 3509: unsigned WCOL :1;
1280[; ;pic12f1822.h: 3510: };
1281[; ;pic12f1822.h: 3511: struct {
1282[; ;pic12f1822.h: 3512: unsigned SSPM :4;
1283[; ;pic12f1822.h: 3513: };
1284[; ;pic12f1822.h: 3514: } SSPCONbits_t;
1285[; ;pic12f1822.h: 3515: extern volatile SSPCONbits_t SSPCONbits @ 0x215;
1286[; ;pic12f1822.h: 3564: extern volatile unsigned char SSP1CON2 @ 0x216;
1287"3566
1288[; ;pic12f1822.h: 3566: asm("SSP1CON2 equ 0216h");
1289[; <" SSP1CON2 equ 0216h ;# ">
1290[; ;pic12f1822.h: 3569: extern volatile unsigned char SSPCON2 @ 0x216;
1291"3571
1292[; ;pic12f1822.h: 3571: asm("SSPCON2 equ 0216h");
1293[; <" SSPCON2 equ 0216h ;# ">
1294[; ;pic12f1822.h: 3574: typedef union {
1295[; ;pic12f1822.h: 3575: struct {
1296[; ;pic12f1822.h: 3576: unsigned SEN :1;
1297[; ;pic12f1822.h: 3577: unsigned RSEN :1;
1298[; ;pic12f1822.h: 3578: unsigned PEN :1;
1299[; ;pic12f1822.h: 3579: unsigned RCEN :1;
1300[; ;pic12f1822.h: 3580: unsigned ACKEN :1;
1301[; ;pic12f1822.h: 3581: unsigned ACKDT :1;
1302[; ;pic12f1822.h: 3582: unsigned ACKSTAT :1;
1303[; ;pic12f1822.h: 3583: unsigned GCEN :1;
1304[; ;pic12f1822.h: 3584: };
1305[; ;pic12f1822.h: 3585: } SSP1CON2bits_t;
1306[; ;pic12f1822.h: 3586: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
1307[; ;pic12f1822.h: 3629: typedef union {
1308[; ;pic12f1822.h: 3630: struct {
1309[; ;pic12f1822.h: 3631: unsigned SEN :1;
1310[; ;pic12f1822.h: 3632: unsigned RSEN :1;
1311[; ;pic12f1822.h: 3633: unsigned PEN :1;
1312[; ;pic12f1822.h: 3634: unsigned RCEN :1;
1313[; ;pic12f1822.h: 3635: unsigned ACKEN :1;
1314[; ;pic12f1822.h: 3636: unsigned ACKDT :1;
1315[; ;pic12f1822.h: 3637: unsigned ACKSTAT :1;
1316[; ;pic12f1822.h: 3638: unsigned GCEN :1;
1317[; ;pic12f1822.h: 3639: };
1318[; ;pic12f1822.h: 3640: } SSPCON2bits_t;
1319[; ;pic12f1822.h: 3641: extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
1320[; ;pic12f1822.h: 3685: extern volatile unsigned char SSP1CON3 @ 0x217;
1321"3687
1322[; ;pic12f1822.h: 3687: asm("SSP1CON3 equ 0217h");
1323[; <" SSP1CON3 equ 0217h ;# ">
1324[; ;pic12f1822.h: 3690: extern volatile unsigned char SSPCON3 @ 0x217;
1325"3692
1326[; ;pic12f1822.h: 3692: asm("SSPCON3 equ 0217h");
1327[; <" SSPCON3 equ 0217h ;# ">
1328[; ;pic12f1822.h: 3695: typedef union {
1329[; ;pic12f1822.h: 3696: struct {
1330[; ;pic12f1822.h: 3697: unsigned DHEN :1;
1331[; ;pic12f1822.h: 3698: unsigned AHEN :1;
1332[; ;pic12f1822.h: 3699: unsigned SBCDE :1;
1333[; ;pic12f1822.h: 3700: unsigned SDAHT :1;
1334[; ;pic12f1822.h: 3701: unsigned BOEN :1;
1335[; ;pic12f1822.h: 3702: unsigned SCIE :1;
1336[; ;pic12f1822.h: 3703: unsigned PCIE :1;
1337[; ;pic12f1822.h: 3704: unsigned ACKTIM :1;
1338[; ;pic12f1822.h: 3705: };
1339[; ;pic12f1822.h: 3706: } SSP1CON3bits_t;
1340[; ;pic12f1822.h: 3707: extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
1341[; ;pic12f1822.h: 3750: typedef union {
1342[; ;pic12f1822.h: 3751: struct {
1343[; ;pic12f1822.h: 3752: unsigned DHEN :1;
1344[; ;pic12f1822.h: 3753: unsigned AHEN :1;
1345[; ;pic12f1822.h: 3754: unsigned SBCDE :1;
1346[; ;pic12f1822.h: 3755: unsigned SDAHT :1;
1347[; ;pic12f1822.h: 3756: unsigned BOEN :1;
1348[; ;pic12f1822.h: 3757: unsigned SCIE :1;
1349[; ;pic12f1822.h: 3758: unsigned PCIE :1;
1350[; ;pic12f1822.h: 3759: unsigned ACKTIM :1;
1351[; ;pic12f1822.h: 3760: };
1352[; ;pic12f1822.h: 3761: } SSPCON3bits_t;
1353[; ;pic12f1822.h: 3762: extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
1354[; ;pic12f1822.h: 3806: extern volatile unsigned char CCPR1L @ 0x291;
1355"3808
1356[; ;pic12f1822.h: 3808: asm("CCPR1L equ 0291h");
1357[; <" CCPR1L equ 0291h ;# ">
1358[; ;pic12f1822.h: 3811: typedef union {
1359[; ;pic12f1822.h: 3812: struct {
1360[; ;pic12f1822.h: 3813: unsigned CCPR1L :8;
1361[; ;pic12f1822.h: 3814: };
1362[; ;pic12f1822.h: 3815: } CCPR1Lbits_t;
1363[; ;pic12f1822.h: 3816: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
1364[; ;pic12f1822.h: 3825: extern volatile unsigned char CCPR1H @ 0x292;
1365"3827
1366[; ;pic12f1822.h: 3827: asm("CCPR1H equ 0292h");
1367[; <" CCPR1H equ 0292h ;# ">
1368[; ;pic12f1822.h: 3830: typedef union {
1369[; ;pic12f1822.h: 3831: struct {
1370[; ;pic12f1822.h: 3832: unsigned CCPR1H :8;
1371[; ;pic12f1822.h: 3833: };
1372[; ;pic12f1822.h: 3834: } CCPR1Hbits_t;
1373[; ;pic12f1822.h: 3835: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
1374[; ;pic12f1822.h: 3844: extern volatile unsigned char CCP1CON @ 0x293;
1375"3846
1376[; ;pic12f1822.h: 3846: asm("CCP1CON equ 0293h");
1377[; <" CCP1CON equ 0293h ;# ">
1378[; ;pic12f1822.h: 3849: typedef union {
1379[; ;pic12f1822.h: 3850: struct {
1380[; ;pic12f1822.h: 3851: unsigned CCP1M0 :1;
1381[; ;pic12f1822.h: 3852: unsigned CCP1M1 :1;
1382[; ;pic12f1822.h: 3853: unsigned CCP1M2 :1;
1383[; ;pic12f1822.h: 3854: unsigned CCP1M3 :1;
1384[; ;pic12f1822.h: 3855: unsigned DC1B0 :1;
1385[; ;pic12f1822.h: 3856: unsigned DC1B1 :1;
1386[; ;pic12f1822.h: 3857: unsigned P1M0 :1;
1387[; ;pic12f1822.h: 3858: unsigned P1M1 :1;
1388[; ;pic12f1822.h: 3859: };
1389[; ;pic12f1822.h: 3860: struct {
1390[; ;pic12f1822.h: 3861: unsigned CCP1M :4;
1391[; ;pic12f1822.h: 3862: unsigned DC1B :2;
1392[; ;pic12f1822.h: 3863: unsigned P1M :2;
1393[; ;pic12f1822.h: 3864: };
1394[; ;pic12f1822.h: 3865: } CCP1CONbits_t;
1395[; ;pic12f1822.h: 3866: extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
1396[; ;pic12f1822.h: 3925: extern volatile unsigned char PWM1CON @ 0x294;
1397"3927
1398[; ;pic12f1822.h: 3927: asm("PWM1CON equ 0294h");
1399[; <" PWM1CON equ 0294h ;# ">
1400[; ;pic12f1822.h: 3930: typedef union {
1401[; ;pic12f1822.h: 3931: struct {
1402[; ;pic12f1822.h: 3932: unsigned P1DC0 :1;
1403[; ;pic12f1822.h: 3933: unsigned P1DC1 :1;
1404[; ;pic12f1822.h: 3934: unsigned P1DC2 :1;
1405[; ;pic12f1822.h: 3935: unsigned P1DC3 :1;
1406[; ;pic12f1822.h: 3936: unsigned P1DC4 :1;
1407[; ;pic12f1822.h: 3937: unsigned P1DC5 :1;
1408[; ;pic12f1822.h: 3938: unsigned P1DC6 :1;
1409[; ;pic12f1822.h: 3939: unsigned P1RSEN :1;
1410[; ;pic12f1822.h: 3940: };
1411[; ;pic12f1822.h: 3941: struct {
1412[; ;pic12f1822.h: 3942: unsigned P1DC :7;
1413[; ;pic12f1822.h: 3943: };
1414[; ;pic12f1822.h: 3944: } PWM1CONbits_t;
1415[; ;pic12f1822.h: 3945: extern volatile PWM1CONbits_t PWM1CONbits @ 0x294;
1416[; ;pic12f1822.h: 3994: extern volatile unsigned char CCP1AS @ 0x295;
1417"3996
1418[; ;pic12f1822.h: 3996: asm("CCP1AS equ 0295h");
1419[; <" CCP1AS equ 0295h ;# ">
1420[; ;pic12f1822.h: 3999: extern volatile unsigned char ECCP1AS @ 0x295;
1421"4001
1422[; ;pic12f1822.h: 4001: asm("ECCP1AS equ 0295h");
1423[; <" ECCP1AS equ 0295h ;# ">
1424[; ;pic12f1822.h: 4004: typedef union {
1425[; ;pic12f1822.h: 4005: struct {
1426[; ;pic12f1822.h: 4006: unsigned PSS1BD0 :1;
1427[; ;pic12f1822.h: 4007: unsigned PSS1BD1 :1;
1428[; ;pic12f1822.h: 4008: unsigned PSS1AC0 :1;
1429[; ;pic12f1822.h: 4009: unsigned PSS1AC1 :1;
1430[; ;pic12f1822.h: 4010: unsigned CCP1AS0 :1;
1431[; ;pic12f1822.h: 4011: unsigned CCP1AS1 :1;
1432[; ;pic12f1822.h: 4012: unsigned CCP1AS2 :1;
1433[; ;pic12f1822.h: 4013: unsigned CCP1ASE :1;
1434[; ;pic12f1822.h: 4014: };
1435[; ;pic12f1822.h: 4015: struct {
1436[; ;pic12f1822.h: 4016: unsigned PSS1BD :2;
1437[; ;pic12f1822.h: 4017: unsigned PSS1AC :2;
1438[; ;pic12f1822.h: 4018: unsigned CCP1AS :3;
1439[; ;pic12f1822.h: 4019: };
1440[; ;pic12f1822.h: 4020: } CCP1ASbits_t;
1441[; ;pic12f1822.h: 4021: extern volatile CCP1ASbits_t CCP1ASbits @ 0x295;
1442[; ;pic12f1822.h: 4079: typedef union {
1443[; ;pic12f1822.h: 4080: struct {
1444[; ;pic12f1822.h: 4081: unsigned PSS1BD0 :1;
1445[; ;pic12f1822.h: 4082: unsigned PSS1BD1 :1;
1446[; ;pic12f1822.h: 4083: unsigned PSS1AC0 :1;
1447[; ;pic12f1822.h: 4084: unsigned PSS1AC1 :1;
1448[; ;pic12f1822.h: 4085: unsigned CCP1AS0 :1;
1449[; ;pic12f1822.h: 4086: unsigned CCP1AS1 :1;
1450[; ;pic12f1822.h: 4087: unsigned CCP1AS2 :1;
1451[; ;pic12f1822.h: 4088: unsigned CCP1ASE :1;
1452[; ;pic12f1822.h: 4089: };
1453[; ;pic12f1822.h: 4090: struct {
1454[; ;pic12f1822.h: 4091: unsigned PSS1BD :2;
1455[; ;pic12f1822.h: 4092: unsigned PSS1AC :2;
1456[; ;pic12f1822.h: 4093: unsigned CCP1AS :3;
1457[; ;pic12f1822.h: 4094: };
1458[; ;pic12f1822.h: 4095: } ECCP1ASbits_t;
1459[; ;pic12f1822.h: 4096: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0x295;
1460[; ;pic12f1822.h: 4155: extern volatile unsigned char PSTR1CON @ 0x296;
1461"4157
1462[; ;pic12f1822.h: 4157: asm("PSTR1CON equ 0296h");
1463[; <" PSTR1CON equ 0296h ;# ">
1464[; ;pic12f1822.h: 4160: typedef union {
1465[; ;pic12f1822.h: 4161: struct {
1466[; ;pic12f1822.h: 4162: unsigned STR1A :1;
1467[; ;pic12f1822.h: 4163: unsigned STR1B :1;
1468[; ;pic12f1822.h: 4164: unsigned STR1C :1;
1469[; ;pic12f1822.h: 4165: unsigned STR1D :1;
1470[; ;pic12f1822.h: 4166: unsigned STR1SYNC :1;
1471[; ;pic12f1822.h: 4167: };
1472[; ;pic12f1822.h: 4168: } PSTR1CONbits_t;
1473[; ;pic12f1822.h: 4169: extern volatile PSTR1CONbits_t PSTR1CONbits @ 0x296;
1474[; ;pic12f1822.h: 4198: extern volatile unsigned char IOCAP @ 0x391;
1475"4200
1476[; ;pic12f1822.h: 4200: asm("IOCAP equ 0391h");
1477[; <" IOCAP equ 0391h ;# ">
1478[; ;pic12f1822.h: 4203: typedef union {
1479[; ;pic12f1822.h: 4204: struct {
1480[; ;pic12f1822.h: 4205: unsigned IOCAP0 :1;
1481[; ;pic12f1822.h: 4206: unsigned IOCAP1 :1;
1482[; ;pic12f1822.h: 4207: unsigned IOCAP2 :1;
1483[; ;pic12f1822.h: 4208: unsigned IOCAP3 :1;
1484[; ;pic12f1822.h: 4209: unsigned IOCAP4 :1;
1485[; ;pic12f1822.h: 4210: unsigned IOCAP5 :1;
1486[; ;pic12f1822.h: 4211: };
1487[; ;pic12f1822.h: 4212: struct {
1488[; ;pic12f1822.h: 4213: unsigned IOCAP :6;
1489[; ;pic12f1822.h: 4214: };
1490[; ;pic12f1822.h: 4215: } IOCAPbits_t;
1491[; ;pic12f1822.h: 4216: extern volatile IOCAPbits_t IOCAPbits @ 0x391;
1492[; ;pic12f1822.h: 4255: extern volatile unsigned char IOCAN @ 0x392;
1493"4257
1494[; ;pic12f1822.h: 4257: asm("IOCAN equ 0392h");
1495[; <" IOCAN equ 0392h ;# ">
1496[; ;pic12f1822.h: 4260: typedef union {
1497[; ;pic12f1822.h: 4261: struct {
1498[; ;pic12f1822.h: 4262: unsigned IOCAN0 :1;
1499[; ;pic12f1822.h: 4263: unsigned IOCAN1 :1;
1500[; ;pic12f1822.h: 4264: unsigned IOCAN2 :1;
1501[; ;pic12f1822.h: 4265: unsigned IOCAN3 :1;
1502[; ;pic12f1822.h: 4266: unsigned IOCAN4 :1;
1503[; ;pic12f1822.h: 4267: unsigned IOCAN5 :1;
1504[; ;pic12f1822.h: 4268: };
1505[; ;pic12f1822.h: 4269: struct {
1506[; ;pic12f1822.h: 4270: unsigned IOCAN :6;
1507[; ;pic12f1822.h: 4271: };
1508[; ;pic12f1822.h: 4272: } IOCANbits_t;
1509[; ;pic12f1822.h: 4273: extern volatile IOCANbits_t IOCANbits @ 0x392;
1510[; ;pic12f1822.h: 4312: extern volatile unsigned char IOCAF @ 0x393;
1511"4314
1512[; ;pic12f1822.h: 4314: asm("IOCAF equ 0393h");
1513[; <" IOCAF equ 0393h ;# ">
1514[; ;pic12f1822.h: 4317: typedef union {
1515[; ;pic12f1822.h: 4318: struct {
1516[; ;pic12f1822.h: 4319: unsigned IOCAF0 :1;
1517[; ;pic12f1822.h: 4320: unsigned IOCAF1 :1;
1518[; ;pic12f1822.h: 4321: unsigned IOCAF2 :1;
1519[; ;pic12f1822.h: 4322: unsigned IOCAF3 :1;
1520[; ;pic12f1822.h: 4323: unsigned IOCAF4 :1;
1521[; ;pic12f1822.h: 4324: unsigned IOCAF5 :1;
1522[; ;pic12f1822.h: 4325: };
1523[; ;pic12f1822.h: 4326: struct {
1524[; ;pic12f1822.h: 4327: unsigned IOCAF :6;
1525[; ;pic12f1822.h: 4328: };
1526[; ;pic12f1822.h: 4329: } IOCAFbits_t;
1527[; ;pic12f1822.h: 4330: extern volatile IOCAFbits_t IOCAFbits @ 0x393;
1528[; ;pic12f1822.h: 4369: extern volatile unsigned char CLKRCON @ 0x39A;
1529"4371
1530[; ;pic12f1822.h: 4371: asm("CLKRCON equ 039Ah");
1531[; <" CLKRCON equ 039Ah ;# ">
1532[; ;pic12f1822.h: 4374: typedef union {
1533[; ;pic12f1822.h: 4375: struct {
1534[; ;pic12f1822.h: 4376: unsigned CLKRDIV0 :1;
1535[; ;pic12f1822.h: 4377: unsigned CLKRDIV1 :1;
1536[; ;pic12f1822.h: 4378: unsigned CLKRDIV2 :1;
1537[; ;pic12f1822.h: 4379: unsigned CLKRDC0 :1;
1538[; ;pic12f1822.h: 4380: unsigned CLKRDC1 :1;
1539[; ;pic12f1822.h: 4381: unsigned CLKRSLR :1;
1540[; ;pic12f1822.h: 4382: unsigned CLKROE :1;
1541[; ;pic12f1822.h: 4383: unsigned CLKREN :1;
1542[; ;pic12f1822.h: 4384: };
1543[; ;pic12f1822.h: 4385: struct {
1544[; ;pic12f1822.h: 4386: unsigned CLKRDIV :3;
1545[; ;pic12f1822.h: 4387: unsigned CLKRDC :2;
1546[; ;pic12f1822.h: 4388: };
1547[; ;pic12f1822.h: 4389: } CLKRCONbits_t;
1548[; ;pic12f1822.h: 4390: extern volatile CLKRCONbits_t CLKRCONbits @ 0x39A;
1549[; ;pic12f1822.h: 4444: extern volatile unsigned char MDCON @ 0x39C;
1550"4446
1551[; ;pic12f1822.h: 4446: asm("MDCON equ 039Ch");
1552[; <" MDCON equ 039Ch ;# ">
1553[; ;pic12f1822.h: 4449: typedef union {
1554[; ;pic12f1822.h: 4450: struct {
1555[; ;pic12f1822.h: 4451: unsigned MDBIT :1;
1556[; ;pic12f1822.h: 4452: unsigned :2;
1557[; ;pic12f1822.h: 4453: unsigned MDOUT :1;
1558[; ;pic12f1822.h: 4454: unsigned MDOPOL :1;
1559[; ;pic12f1822.h: 4455: unsigned MDSLR :1;
1560[; ;pic12f1822.h: 4456: unsigned MDOE :1;
1561[; ;pic12f1822.h: 4457: unsigned MDEN :1;
1562[; ;pic12f1822.h: 4458: };
1563[; ;pic12f1822.h: 4459: } MDCONbits_t;
1564[; ;pic12f1822.h: 4460: extern volatile MDCONbits_t MDCONbits @ 0x39C;
1565[; ;pic12f1822.h: 4494: extern volatile unsigned char MDSRC @ 0x39D;
1566"4496
1567[; ;pic12f1822.h: 4496: asm("MDSRC equ 039Dh");
1568[; <" MDSRC equ 039Dh ;# ">
1569[; ;pic12f1822.h: 4499: typedef union {
1570[; ;pic12f1822.h: 4500: struct {
1571[; ;pic12f1822.h: 4501: unsigned MDMS0 :1;
1572[; ;pic12f1822.h: 4502: unsigned MDMS1 :1;
1573[; ;pic12f1822.h: 4503: unsigned MDMS2 :1;
1574[; ;pic12f1822.h: 4504: unsigned MDMS3 :1;
1575[; ;pic12f1822.h: 4505: unsigned :3;
1576[; ;pic12f1822.h: 4506: unsigned MDMSODIS :1;
1577[; ;pic12f1822.h: 4507: };
1578[; ;pic12f1822.h: 4508: struct {
1579[; ;pic12f1822.h: 4509: unsigned MDMS :4;
1580[; ;pic12f1822.h: 4510: };
1581[; ;pic12f1822.h: 4511: } MDSRCbits_t;
1582[; ;pic12f1822.h: 4512: extern volatile MDSRCbits_t MDSRCbits @ 0x39D;
1583[; ;pic12f1822.h: 4546: extern volatile unsigned char MDCARL @ 0x39E;
1584"4548
1585[; ;pic12f1822.h: 4548: asm("MDCARL equ 039Eh");
1586[; <" MDCARL equ 039Eh ;# ">
1587[; ;pic12f1822.h: 4551: typedef union {
1588[; ;pic12f1822.h: 4552: struct {
1589[; ;pic12f1822.h: 4553: unsigned MDCL0 :1;
1590[; ;pic12f1822.h: 4554: unsigned MDCL1 :1;
1591[; ;pic12f1822.h: 4555: unsigned MDCL2 :1;
1592[; ;pic12f1822.h: 4556: unsigned MDCL3 :1;
1593[; ;pic12f1822.h: 4557: unsigned :1;
1594[; ;pic12f1822.h: 4558: unsigned MDCLSYNC :1;
1595[; ;pic12f1822.h: 4559: unsigned MDCLPOL :1;
1596[; ;pic12f1822.h: 4560: unsigned MDCLODIS :1;
1597[; ;pic12f1822.h: 4561: };
1598[; ;pic12f1822.h: 4562: struct {
1599[; ;pic12f1822.h: 4563: unsigned MDCL :4;
1600[; ;pic12f1822.h: 4564: };
1601[; ;pic12f1822.h: 4565: } MDCARLbits_t;
1602[; ;pic12f1822.h: 4566: extern volatile MDCARLbits_t MDCARLbits @ 0x39E;
1603[; ;pic12f1822.h: 4610: extern volatile unsigned char MDCARH @ 0x39F;
1604"4612
1605[; ;pic12f1822.h: 4612: asm("MDCARH equ 039Fh");
1606[; <" MDCARH equ 039Fh ;# ">
1607[; ;pic12f1822.h: 4615: typedef union {
1608[; ;pic12f1822.h: 4616: struct {
1609[; ;pic12f1822.h: 4617: unsigned MDCH0 :1;
1610[; ;pic12f1822.h: 4618: unsigned MDCH1 :1;
1611[; ;pic12f1822.h: 4619: unsigned MDCH2 :1;
1612[; ;pic12f1822.h: 4620: unsigned MDCH3 :1;
1613[; ;pic12f1822.h: 4621: unsigned :1;
1614[; ;pic12f1822.h: 4622: unsigned MDCHSYNC :1;
1615[; ;pic12f1822.h: 4623: unsigned MDCHPOL :1;
1616[; ;pic12f1822.h: 4624: unsigned MDCHODIS :1;
1617[; ;pic12f1822.h: 4625: };
1618[; ;pic12f1822.h: 4626: struct {
1619[; ;pic12f1822.h: 4627: unsigned MDCH :4;
1620[; ;pic12f1822.h: 4628: };
1621[; ;pic12f1822.h: 4629: } MDCARHbits_t;
1622[; ;pic12f1822.h: 4630: extern volatile MDCARHbits_t MDCARHbits @ 0x39F;
1623[; ;pic12f1822.h: 4674: extern volatile unsigned char STATUS_SHAD @ 0xFE4;
1624"4676
1625[; ;pic12f1822.h: 4676: asm("STATUS_SHAD equ 0FE4h");
1626[; <" STATUS_SHAD equ 0FE4h ;# ">
1627[; ;pic12f1822.h: 4679: typedef union {
1628[; ;pic12f1822.h: 4680: struct {
1629[; ;pic12f1822.h: 4681: unsigned C_SHAD :1;
1630[; ;pic12f1822.h: 4682: unsigned DC_SHAD :1;
1631[; ;pic12f1822.h: 4683: unsigned Z_SHAD :1;
1632[; ;pic12f1822.h: 4684: };
1633[; ;pic12f1822.h: 4685: } STATUS_SHADbits_t;
1634[; ;pic12f1822.h: 4686: extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
1635[; ;pic12f1822.h: 4705: extern volatile unsigned char WREG_SHAD @ 0xFE5;
1636"4707
1637[; ;pic12f1822.h: 4707: asm("WREG_SHAD equ 0FE5h");
1638[; <" WREG_SHAD equ 0FE5h ;# ">
1639[; ;pic12f1822.h: 4710: typedef union {
1640[; ;pic12f1822.h: 4711: struct {
1641[; ;pic12f1822.h: 4712: unsigned WREG_SHAD :8;
1642[; ;pic12f1822.h: 4713: };
1643[; ;pic12f1822.h: 4714: } WREG_SHADbits_t;
1644[; ;pic12f1822.h: 4715: extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
1645[; ;pic12f1822.h: 4724: extern volatile unsigned char BSR_SHAD @ 0xFE6;
1646"4726
1647[; ;pic12f1822.h: 4726: asm("BSR_SHAD equ 0FE6h");
1648[; <" BSR_SHAD equ 0FE6h ;# ">
1649[; ;pic12f1822.h: 4729: typedef union {
1650[; ;pic12f1822.h: 4730: struct {
1651[; ;pic12f1822.h: 4731: unsigned BSR_SHAD :5;
1652[; ;pic12f1822.h: 4732: };
1653[; ;pic12f1822.h: 4733: } BSR_SHADbits_t;
1654[; ;pic12f1822.h: 4734: extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
1655[; ;pic12f1822.h: 4743: extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
1656"4745
1657[; ;pic12f1822.h: 4745: asm("PCLATH_SHAD equ 0FE7h");
1658[; <" PCLATH_SHAD equ 0FE7h ;# ">
1659[; ;pic12f1822.h: 4748: typedef union {
1660[; ;pic12f1822.h: 4749: struct {
1661[; ;pic12f1822.h: 4750: unsigned PCLATH_SHAD :7;
1662[; ;pic12f1822.h: 4751: };
1663[; ;pic12f1822.h: 4752: } PCLATH_SHADbits_t;
1664[; ;pic12f1822.h: 4753: extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
1665[; ;pic12f1822.h: 4762: extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
1666"4764
1667[; ;pic12f1822.h: 4764: asm("FSR0L_SHAD equ 0FE8h");
1668[; <" FSR0L_SHAD equ 0FE8h ;# ">
1669[; ;pic12f1822.h: 4767: typedef union {
1670[; ;pic12f1822.h: 4768: struct {
1671[; ;pic12f1822.h: 4769: unsigned FSR0L_SHAD :8;
1672[; ;pic12f1822.h: 4770: };
1673[; ;pic12f1822.h: 4771: } FSR0L_SHADbits_t;
1674[; ;pic12f1822.h: 4772: extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
1675[; ;pic12f1822.h: 4781: extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
1676"4783
1677[; ;pic12f1822.h: 4783: asm("FSR0H_SHAD equ 0FE9h");
1678[; <" FSR0H_SHAD equ 0FE9h ;# ">
1679[; ;pic12f1822.h: 4786: typedef union {
1680[; ;pic12f1822.h: 4787: struct {
1681[; ;pic12f1822.h: 4788: unsigned FSR0H_SHAD :8;
1682[; ;pic12f1822.h: 4789: };
1683[; ;pic12f1822.h: 4790: } FSR0H_SHADbits_t;
1684[; ;pic12f1822.h: 4791: extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
1685[; ;pic12f1822.h: 4800: extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
1686"4802
1687[; ;pic12f1822.h: 4802: asm("FSR1L_SHAD equ 0FEAh");
1688[; <" FSR1L_SHAD equ 0FEAh ;# ">
1689[; ;pic12f1822.h: 4805: typedef union {
1690[; ;pic12f1822.h: 4806: struct {
1691[; ;pic12f1822.h: 4807: unsigned FSR1L_SHAD :8;
1692[; ;pic12f1822.h: 4808: };
1693[; ;pic12f1822.h: 4809: } FSR1L_SHADbits_t;
1694[; ;pic12f1822.h: 4810: extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
1695[; ;pic12f1822.h: 4819: extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
1696"4821
1697[; ;pic12f1822.h: 4821: asm("FSR1H_SHAD equ 0FEBh");
1698[; <" FSR1H_SHAD equ 0FEBh ;# ">
1699[; ;pic12f1822.h: 4824: typedef union {
1700[; ;pic12f1822.h: 4825: struct {
1701[; ;pic12f1822.h: 4826: unsigned FSR1H_SHAD :8;
1702[; ;pic12f1822.h: 4827: };
1703[; ;pic12f1822.h: 4828: } FSR1H_SHADbits_t;
1704[; ;pic12f1822.h: 4829: extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
1705[; ;pic12f1822.h: 4838: extern volatile unsigned char STKPTR @ 0xFED;
1706"4840
1707[; ;pic12f1822.h: 4840: asm("STKPTR equ 0FEDh");
1708[; <" STKPTR equ 0FEDh ;# ">
1709[; ;pic12f1822.h: 4843: typedef union {
1710[; ;pic12f1822.h: 4844: struct {
1711[; ;pic12f1822.h: 4845: unsigned STKPTR :5;
1712[; ;pic12f1822.h: 4846: };
1713[; ;pic12f1822.h: 4847: } STKPTRbits_t;
1714[; ;pic12f1822.h: 4848: extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
1715[; ;pic12f1822.h: 4857: extern volatile unsigned char TOSL @ 0xFEE;
1716"4859
1717[; ;pic12f1822.h: 4859: asm("TOSL equ 0FEEh");
1718[; <" TOSL equ 0FEEh ;# ">
1719[; ;pic12f1822.h: 4862: typedef union {
1720[; ;pic12f1822.h: 4863: struct {
1721[; ;pic12f1822.h: 4864: unsigned TOSL :8;
1722[; ;pic12f1822.h: 4865: };
1723[; ;pic12f1822.h: 4866: } TOSLbits_t;
1724[; ;pic12f1822.h: 4867: extern volatile TOSLbits_t TOSLbits @ 0xFEE;
1725[; ;pic12f1822.h: 4876: extern volatile unsigned char TOSH @ 0xFEF;
1726"4878
1727[; ;pic12f1822.h: 4878: asm("TOSH equ 0FEFh");
1728[; <" TOSH equ 0FEFh ;# ">
1729[; ;pic12f1822.h: 4881: typedef union {
1730[; ;pic12f1822.h: 4882: struct {
1731[; ;pic12f1822.h: 4883: unsigned TOSH :7;
1732[; ;pic12f1822.h: 4884: };
1733[; ;pic12f1822.h: 4885: } TOSHbits_t;
1734[; ;pic12f1822.h: 4886: extern volatile TOSHbits_t TOSHbits @ 0xFEF;
1735[; ;pic12f1822.h: 4901: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
1736[; ;pic12f1822.h: 4903: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
1737[; ;pic12f1822.h: 4905: extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
1738[; ;pic12f1822.h: 4907: extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
1739[; ;pic12f1822.h: 4909: extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
1740[; ;pic12f1822.h: 4911: extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
1741[; ;pic12f1822.h: 4913: extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 4;
1742[; ;pic12f1822.h: 4915: extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 5;
1743[; ;pic12f1822.h: 4917: extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
1744[; ;pic12f1822.h: 4919: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
1745[; ;pic12f1822.h: 4921: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
1746[; ;pic12f1822.h: 4923: extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
1747[; ;pic12f1822.h: 4925: extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
1748[; ;pic12f1822.h: 4927: extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
1749[; ;pic12f1822.h: 4929: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
1750[; ;pic12f1822.h: 4931: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
1751[; ;pic12f1822.h: 4933: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
1752[; ;pic12f1822.h: 4935: extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
1753[; ;pic12f1822.h: 4937: extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
1754[; ;pic12f1822.h: 4939: extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
1755[; ;pic12f1822.h: 4941: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
1756[; ;pic12f1822.h: 4943: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
1757[; ;pic12f1822.h: 4945: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
1758[; ;pic12f1822.h: 4947: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 4;
1759[; ;pic12f1822.h: 4949: extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
1760[; ;pic12f1822.h: 4951: extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
1761[; ;pic12f1822.h: 4953: extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
1762[; ;pic12f1822.h: 4955: extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
1763[; ;pic12f1822.h: 4957: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
1764[; ;pic12f1822.h: 4959: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
1765[; ;pic12f1822.h: 4961: extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
1766[; ;pic12f1822.h: 4963: extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
1767[; ;pic12f1822.h: 4965: extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
1768[; ;pic12f1822.h: 4967: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
1769[; ;pic12f1822.h: 4969: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
1770[; ;pic12f1822.h: 4971: extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
1771[; ;pic12f1822.h: 4973: extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
1772[; ;pic12f1822.h: 4975: extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
1773[; ;pic12f1822.h: 4977: extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
1774[; ;pic12f1822.h: 4979: extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
1775[; ;pic12f1822.h: 4981: extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
1776[; ;pic12f1822.h: 4983: extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
1777[; ;pic12f1822.h: 4985: extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
1778[; ;pic12f1822.h: 4987: extern volatile __bit C1IN0N @ (((unsigned) &PORTA)*8) + 1;
1779[; ;pic12f1822.h: 4989: extern volatile __bit C1IN1N @ (((unsigned) &PORTA)*8) + 4;
1780[; ;pic12f1822.h: 4991: extern volatile __bit C1INP @ (((unsigned) &PORTA)*8) + 0;
1781[; ;pic12f1822.h: 4993: extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
1782[; ;pic12f1822.h: 4995: extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
1783[; ;pic12f1822.h: 4997: extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
1784[; ;pic12f1822.h: 4999: extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
1785[; ;pic12f1822.h: 5001: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
1786[; ;pic12f1822.h: 5003: extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
1787[; ;pic12f1822.h: 5005: extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
1788[; ;pic12f1822.h: 5007: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
1789[; ;pic12f1822.h: 5009: extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
1790[; ;pic12f1822.h: 5011: extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
1791[; ;pic12f1822.h: 5013: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
1792[; ;pic12f1822.h: 5015: extern volatile __bit CCP1AS0 @ (((unsigned) &CCP1AS)*8) + 4;
1793[; ;pic12f1822.h: 5017: extern volatile __bit CCP1AS1 @ (((unsigned) &CCP1AS)*8) + 5;
1794[; ;pic12f1822.h: 5019: extern volatile __bit CCP1AS2 @ (((unsigned) &CCP1AS)*8) + 6;
1795[; ;pic12f1822.h: 5021: extern volatile __bit CCP1ASE @ (((unsigned) &CCP1AS)*8) + 7;
1796[; ;pic12f1822.h: 5023: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
1797[; ;pic12f1822.h: 5025: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
1798[; ;pic12f1822.h: 5027: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
1799[; ;pic12f1822.h: 5029: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
1800[; ;pic12f1822.h: 5031: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
1801[; ;pic12f1822.h: 5033: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
1802[; ;pic12f1822.h: 5035: extern volatile __bit CCP1SEL @ (((unsigned) &APFCON)*8) + 0;
1803[; ;pic12f1822.h: 5037: extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
1804[; ;pic12f1822.h: 5039: extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
1805[; ;pic12f1822.h: 5041: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;
1806[; ;pic12f1822.h: 5043: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
1807[; ;pic12f1822.h: 5045: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
1808[; ;pic12f1822.h: 5047: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
1809[; ;pic12f1822.h: 5049: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
1810[; ;pic12f1822.h: 5051: extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
1811[; ;pic12f1822.h: 5053: extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
1812[; ;pic12f1822.h: 5055: extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
1813[; ;pic12f1822.h: 5057: extern volatile __bit CLKIN @ (((unsigned) &PORTA)*8) + 5;
1814[; ;pic12f1822.h: 5059: extern volatile __bit CLKOUT @ (((unsigned) &PORTA)*8) + 4;
1815[; ;pic12f1822.h: 5061: extern volatile __bit CLKR @ (((unsigned) &PORTA)*8) + 4;
1816[; ;pic12f1822.h: 5063: extern volatile __bit CLKRDC0 @ (((unsigned) &CLKRCON)*8) + 3;
1817[; ;pic12f1822.h: 5065: extern volatile __bit CLKRDC1 @ (((unsigned) &CLKRCON)*8) + 4;
1818[; ;pic12f1822.h: 5067: extern volatile __bit CLKRDIV0 @ (((unsigned) &CLKRCON)*8) + 0;
1819[; ;pic12f1822.h: 5069: extern volatile __bit CLKRDIV1 @ (((unsigned) &CLKRCON)*8) + 1;
1820[; ;pic12f1822.h: 5071: extern volatile __bit CLKRDIV2 @ (((unsigned) &CLKRCON)*8) + 2;
1821[; ;pic12f1822.h: 5073: extern volatile __bit CLKREN @ (((unsigned) &CLKRCON)*8) + 7;
1822[; ;pic12f1822.h: 5075: extern volatile __bit CLKROE @ (((unsigned) &CLKRCON)*8) + 6;
1823[; ;pic12f1822.h: 5077: extern volatile __bit CLKRSLR @ (((unsigned) &CLKRCON)*8) + 5;
1824[; ;pic12f1822.h: 5079: extern volatile __bit CPS0 @ (((unsigned) &PORTA)*8) + 0;
1825[; ;pic12f1822.h: 5081: extern volatile __bit CPS1 @ (((unsigned) &PORTA)*8) + 1;
1826[; ;pic12f1822.h: 5083: extern volatile __bit CPS2 @ (((unsigned) &PORTA)*8) + 2;
1827[; ;pic12f1822.h: 5085: extern volatile __bit CPS3 @ (((unsigned) &PORTA)*8) + 4;
1828[; ;pic12f1822.h: 5087: extern volatile __bit CPSCH0 @ (((unsigned) &CPSCON1)*8) + 0;
1829[; ;pic12f1822.h: 5089: extern volatile __bit CPSCH1 @ (((unsigned) &CPSCON1)*8) + 1;
1830[; ;pic12f1822.h: 5091: extern volatile __bit CPSON @ (((unsigned) &CPSCON0)*8) + 7;
1831[; ;pic12f1822.h: 5093: extern volatile __bit CPSOUT @ (((unsigned) &CPSCON0)*8) + 1;
1832[; ;pic12f1822.h: 5095: extern volatile __bit CPSRM @ (((unsigned) &CPSCON0)*8) + 6;
1833[; ;pic12f1822.h: 5097: extern volatile __bit CPSRNG0 @ (((unsigned) &CPSCON0)*8) + 2;
1834[; ;pic12f1822.h: 5099: extern volatile __bit CPSRNG1 @ (((unsigned) &CPSCON0)*8) + 3;
1835[; ;pic12f1822.h: 5101: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
1836[; ;pic12f1822.h: 5103: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
1837[; ;pic12f1822.h: 5105: extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
1838[; ;pic12f1822.h: 5107: extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
1839[; ;pic12f1822.h: 5109: extern volatile __bit DACLPS @ (((unsigned) &DACCON0)*8) + 6;
1840[; ;pic12f1822.h: 5111: extern volatile __bit DACOE @ (((unsigned) &DACCON0)*8) + 5;
1841[; ;pic12f1822.h: 5113: extern volatile __bit DACOUT @ (((unsigned) &PORTA)*8) + 0;
1842[; ;pic12f1822.h: 5115: extern volatile __bit DACPSS0 @ (((unsigned) &DACCON0)*8) + 2;
1843[; ;pic12f1822.h: 5117: extern volatile __bit DACPSS1 @ (((unsigned) &DACCON0)*8) + 3;
1844[; ;pic12f1822.h: 5119: extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
1845[; ;pic12f1822.h: 5121: extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
1846[; ;pic12f1822.h: 5123: extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
1847[; ;pic12f1822.h: 5125: extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
1848[; ;pic12f1822.h: 5127: extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
1849[; ;pic12f1822.h: 5129: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
1850[; ;pic12f1822.h: 5131: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
1851[; ;pic12f1822.h: 5133: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
1852[; ;pic12f1822.h: 5135: extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
1853[; ;pic12f1822.h: 5137: extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
1854[; ;pic12f1822.h: 5139: extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
1855[; ;pic12f1822.h: 5141: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;
1856[; ;pic12f1822.h: 5143: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;
1857[; ;pic12f1822.h: 5145: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
1858[; ;pic12f1822.h: 5147: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
1859[; ;pic12f1822.h: 5149: extern volatile __bit FLT0 @ (((unsigned) &PORTA)*8) + 2;
1860[; ;pic12f1822.h: 5151: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
1861[; ;pic12f1822.h: 5153: extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
1862[; ;pic12f1822.h: 5155: extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
1863[; ;pic12f1822.h: 5157: extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
1864[; ;pic12f1822.h: 5159: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
1865[; ;pic12f1822.h: 5161: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
1866[; ;pic12f1822.h: 5163: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
1867[; ;pic12f1822.h: 5165: extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
1868[; ;pic12f1822.h: 5167: extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
1869[; ;pic12f1822.h: 5169: extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
1870[; ;pic12f1822.h: 5171: extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
1871[; ;pic12f1822.h: 5173: extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
1872[; ;pic12f1822.h: 5175: extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
1873[; ;pic12f1822.h: 5177: extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
1874[; ;pic12f1822.h: 5179: extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
1875[; ;pic12f1822.h: 5181: extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
1876[; ;pic12f1822.h: 5183: extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
1877[; ;pic12f1822.h: 5185: extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
1878[; ;pic12f1822.h: 5187: extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
1879[; ;pic12f1822.h: 5189: extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
1880[; ;pic12f1822.h: 5191: extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
1881[; ;pic12f1822.h: 5193: extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
1882[; ;pic12f1822.h: 5195: extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
1883[; ;pic12f1822.h: 5197: extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
1884[; ;pic12f1822.h: 5199: extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
1885[; ;pic12f1822.h: 5201: extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
1886[; ;pic12f1822.h: 5203: extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
1887[; ;pic12f1822.h: 5205: extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
1888[; ;pic12f1822.h: 5207: extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
1889[; ;pic12f1822.h: 5209: extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
1890[; ;pic12f1822.h: 5211: extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
1891[; ;pic12f1822.h: 5213: extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
1892[; ;pic12f1822.h: 5215: extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
1893[; ;pic12f1822.h: 5217: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
1894[; ;pic12f1822.h: 5219: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
1895[; ;pic12f1822.h: 5221: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
1896[; ;pic12f1822.h: 5223: extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
1897[; ;pic12f1822.h: 5225: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
1898[; ;pic12f1822.h: 5227: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
1899[; ;pic12f1822.h: 5229: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
1900[; ;pic12f1822.h: 5231: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
1901[; ;pic12f1822.h: 5233: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
1902[; ;pic12f1822.h: 5235: extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
1903[; ;pic12f1822.h: 5237: extern volatile __bit LWLO @ (((unsigned) &EECON1)*8) + 5;
1904[; ;pic12f1822.h: 5239: extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
1905[; ;pic12f1822.h: 5241: extern volatile __bit MDBIT @ (((unsigned) &MDCON)*8) + 0;
1906[; ;pic12f1822.h: 5243: extern volatile __bit MDCH0 @ (((unsigned) &MDCARH)*8) + 0;
1907[; ;pic12f1822.h: 5245: extern volatile __bit MDCH1 @ (((unsigned) &MDCARH)*8) + 1;
1908[; ;pic12f1822.h: 5247: extern volatile __bit MDCH2 @ (((unsigned) &MDCARH)*8) + 2;
1909[; ;pic12f1822.h: 5249: extern volatile __bit MDCH3 @ (((unsigned) &MDCARH)*8) + 3;
1910[; ;pic12f1822.h: 5251: extern volatile __bit MDCHODIS @ (((unsigned) &MDCARH)*8) + 7;
1911[; ;pic12f1822.h: 5253: extern volatile __bit MDCHPOL @ (((unsigned) &MDCARH)*8) + 6;
1912[; ;pic12f1822.h: 5255: extern volatile __bit MDCHSYNC @ (((unsigned) &MDCARH)*8) + 5;
1913[; ;pic12f1822.h: 5257: extern volatile __bit MDCIN1 @ (((unsigned) &PORTA)*8) + 2;
1914[; ;pic12f1822.h: 5259: extern volatile __bit MDCIN2 @ (((unsigned) &PORTA)*8) + 4;
1915[; ;pic12f1822.h: 5261: extern volatile __bit MDCL0 @ (((unsigned) &MDCARL)*8) + 0;
1916[; ;pic12f1822.h: 5263: extern volatile __bit MDCL1 @ (((unsigned) &MDCARL)*8) + 1;
1917[; ;pic12f1822.h: 5265: extern volatile __bit MDCL2 @ (((unsigned) &MDCARL)*8) + 2;
1918[; ;pic12f1822.h: 5267: extern volatile __bit MDCL3 @ (((unsigned) &MDCARL)*8) + 3;
1919[; ;pic12f1822.h: 5269: extern volatile __bit MDCLODIS @ (((unsigned) &MDCARL)*8) + 7;
1920[; ;pic12f1822.h: 5271: extern volatile __bit MDCLPOL @ (((unsigned) &MDCARL)*8) + 6;
1921[; ;pic12f1822.h: 5273: extern volatile __bit MDCLSYNC @ (((unsigned) &MDCARL)*8) + 5;
1922[; ;pic12f1822.h: 5275: extern volatile __bit MDEN @ (((unsigned) &MDCON)*8) + 7;
1923[; ;pic12f1822.h: 5277: extern volatile __bit MDMIN @ (((unsigned) &PORTA)*8) + 1;
1924[; ;pic12f1822.h: 5279: extern volatile __bit MDMS0 @ (((unsigned) &MDSRC)*8) + 0;
1925[; ;pic12f1822.h: 5281: extern volatile __bit MDMS1 @ (((unsigned) &MDSRC)*8) + 1;
1926[; ;pic12f1822.h: 5283: extern volatile __bit MDMS2 @ (((unsigned) &MDSRC)*8) + 2;
1927[; ;pic12f1822.h: 5285: extern volatile __bit MDMS3 @ (((unsigned) &MDSRC)*8) + 3;
1928[; ;pic12f1822.h: 5287: extern volatile __bit MDMSODIS @ (((unsigned) &MDSRC)*8) + 7;
1929[; ;pic12f1822.h: 5289: extern volatile __bit MDOE @ (((unsigned) &MDCON)*8) + 6;
1930[; ;pic12f1822.h: 5291: extern volatile __bit MDOPOL @ (((unsigned) &MDCON)*8) + 4;
1931[; ;pic12f1822.h: 5293: extern volatile __bit MDSLR @ (((unsigned) &MDCON)*8) + 5;
1932[; ;pic12f1822.h: 5295: extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
1933[; ;pic12f1822.h: 5297: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
1934[; ;pic12f1822.h: 5299: extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 5;
1935[; ;pic12f1822.h: 5301: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 4;
1936[; ;pic12f1822.h: 5303: extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
1937[; ;pic12f1822.h: 5305: extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
1938[; ;pic12f1822.h: 5307: extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
1939[; ;pic12f1822.h: 5309: extern volatile __bit P1BSEL @ (((unsigned) &APFCON)*8) + 1;
1940[; ;pic12f1822.h: 5311: extern volatile __bit P1DC0 @ (((unsigned) &PWM1CON)*8) + 0;
1941[; ;pic12f1822.h: 5313: extern volatile __bit P1DC1 @ (((unsigned) &PWM1CON)*8) + 1;
1942[; ;pic12f1822.h: 5315: extern volatile __bit P1DC2 @ (((unsigned) &PWM1CON)*8) + 2;
1943[; ;pic12f1822.h: 5317: extern volatile __bit P1DC3 @ (((unsigned) &PWM1CON)*8) + 3;
1944[; ;pic12f1822.h: 5319: extern volatile __bit P1DC4 @ (((unsigned) &PWM1CON)*8) + 4;
1945[; ;pic12f1822.h: 5321: extern volatile __bit P1DC5 @ (((unsigned) &PWM1CON)*8) + 5;
1946[; ;pic12f1822.h: 5323: extern volatile __bit P1DC6 @ (((unsigned) &PWM1CON)*8) + 6;
1947[; ;pic12f1822.h: 5325: extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
1948[; ;pic12f1822.h: 5327: extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
1949[; ;pic12f1822.h: 5329: extern volatile __bit P1RSEN @ (((unsigned) &PWM1CON)*8) + 7;
1950[; ;pic12f1822.h: 5331: extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
1951[; ;pic12f1822.h: 5333: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
1952[; ;pic12f1822.h: 5335: extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
1953[; ;pic12f1822.h: 5337: extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
1954[; ;pic12f1822.h: 5339: extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
1955[; ;pic12f1822.h: 5341: extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
1956[; ;pic12f1822.h: 5343: extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
1957[; ;pic12f1822.h: 5345: extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
1958[; ;pic12f1822.h: 5347: extern volatile __bit PSS1AC0 @ (((unsigned) &CCP1AS)*8) + 2;
1959[; ;pic12f1822.h: 5349: extern volatile __bit PSS1AC1 @ (((unsigned) &CCP1AS)*8) + 3;
1960[; ;pic12f1822.h: 5351: extern volatile __bit PSS1BD0 @ (((unsigned) &CCP1AS)*8) + 0;
1961[; ;pic12f1822.h: 5353: extern volatile __bit PSS1BD1 @ (((unsigned) &CCP1AS)*8) + 1;
1962[; ;pic12f1822.h: 5355: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
1963[; ;pic12f1822.h: 5357: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
1964[; ;pic12f1822.h: 5359: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
1965[; ;pic12f1822.h: 5361: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
1966[; ;pic12f1822.h: 5363: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
1967[; ;pic12f1822.h: 5365: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
1968[; ;pic12f1822.h: 5367: extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
1969[; ;pic12f1822.h: 5369: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
1970[; ;pic12f1822.h: 5371: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
1971[; ;pic12f1822.h: 5373: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
1972[; ;pic12f1822.h: 5375: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;
1973[; ;pic12f1822.h: 5377: extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
1974[; ;pic12f1822.h: 5379: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
1975[; ;pic12f1822.h: 5381: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
1976[; ;pic12f1822.h: 5383: extern volatile __bit RXDTSEL @ (((unsigned) &APFCON)*8) + 7;
1977[; ;pic12f1822.h: 5385: extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
1978[; ;pic12f1822.h: 5387: extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
1979[; ;pic12f1822.h: 5389: extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
1980[; ;pic12f1822.h: 5391: extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
1981[; ;pic12f1822.h: 5393: extern volatile __bit SCK @ (((unsigned) &PORTA)*8) + 1;
1982[; ;pic12f1822.h: 5395: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
1983[; ;pic12f1822.h: 5397: extern volatile __bit SCL @ (((unsigned) &PORTA)*8) + 1;
1984[; ;pic12f1822.h: 5399: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
1985[; ;pic12f1822.h: 5401: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
1986[; ;pic12f1822.h: 5403: extern volatile __bit SDA @ (((unsigned) &PORTA)*8) + 2;
1987[; ;pic12f1822.h: 5405: extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
1988[; ;pic12f1822.h: 5407: extern volatile __bit SDI @ (((unsigned) &PORTA)*8) + 2;
1989[; ;pic12f1822.h: 5409: extern volatile __bit SDO1SEL @ (((unsigned) &APFCON)*8) + 6;
1990[; ;pic12f1822.h: 5411: extern volatile __bit SDOSEL @ (((unsigned) &APFCON)*8) + 6;
1991[; ;pic12f1822.h: 5413: extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
1992[; ;pic12f1822.h: 5415: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
1993[; ;pic12f1822.h: 5417: extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
1994[; ;pic12f1822.h: 5419: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
1995[; ;pic12f1822.h: 5421: extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
1996[; ;pic12f1822.h: 5423: extern volatile __bit SRCLK0 @ (((unsigned) &SRCON0)*8) + 4;
1997[; ;pic12f1822.h: 5425: extern volatile __bit SRCLK1 @ (((unsigned) &SRCON0)*8) + 5;
1998[; ;pic12f1822.h: 5427: extern volatile __bit SRCLK2 @ (((unsigned) &SRCON0)*8) + 6;
1999[; ;pic12f1822.h: 5429: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
2000[; ;pic12f1822.h: 5431: extern volatile __bit SRI @ (((unsigned) &PORTA)*8) + 1;
2001[; ;pic12f1822.h: 5433: extern volatile __bit SRLEN @ (((unsigned) &SRCON0)*8) + 7;
2002[; ;pic12f1822.h: 5435: extern volatile __bit SRNQ @ (((unsigned) &PORTA)*8) + 5;
2003[; ;pic12f1822.h: 5437: extern volatile __bit SRNQEN @ (((unsigned) &SRCON0)*8) + 2;
2004[; ;pic12f1822.h: 5439: extern volatile __bit SRPR @ (((unsigned) &SRCON0)*8) + 0;
2005[; ;pic12f1822.h: 5441: extern volatile __bit SRPS @ (((unsigned) &SRCON0)*8) + 1;
2006[; ;pic12f1822.h: 5443: extern volatile __bit SRQ @ (((unsigned) &PORTA)*8) + 2;
2007[; ;pic12f1822.h: 5445: extern volatile __bit SRQEN @ (((unsigned) &SRCON0)*8) + 3;
2008[; ;pic12f1822.h: 5447: extern volatile __bit SRRC1E @ (((unsigned) &SRCON1)*8) + 0;
2009[; ;pic12f1822.h: 5449: extern volatile __bit SRRCKE @ (((unsigned) &SRCON1)*8) + 2;
2010[; ;pic12f1822.h: 5451: extern volatile __bit SRRPE @ (((unsigned) &SRCON1)*8) + 3;
2011[; ;pic12f1822.h: 5453: extern volatile __bit SRSC1E @ (((unsigned) &SRCON1)*8) + 4;
2012[; ;pic12f1822.h: 5455: extern volatile __bit SRSCKE @ (((unsigned) &SRCON1)*8) + 6;
2013[; ;pic12f1822.h: 5457: extern volatile __bit SRSPE @ (((unsigned) &SRCON1)*8) + 7;
2014[; ;pic12f1822.h: 5459: extern volatile __bit SS1SEL @ (((unsigned) &APFCON)*8) + 5;
2015[; ;pic12f1822.h: 5461: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
2016[; ;pic12f1822.h: 5463: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
2017[; ;pic12f1822.h: 5465: extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
2018[; ;pic12f1822.h: 5467: extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
2019[; ;pic12f1822.h: 5469: extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
2020[; ;pic12f1822.h: 5471: extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
2021[; ;pic12f1822.h: 5473: extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
2022[; ;pic12f1822.h: 5475: extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
2023[; ;pic12f1822.h: 5477: extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 5;
2024[; ;pic12f1822.h: 5479: extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
2025[; ;pic12f1822.h: 5481: extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
2026[; ;pic12f1822.h: 5483: extern volatile __bit STR1A @ (((unsigned) &PSTR1CON)*8) + 0;
2027[; ;pic12f1822.h: 5485: extern volatile __bit STR1B @ (((unsigned) &PSTR1CON)*8) + 1;
2028[; ;pic12f1822.h: 5487: extern volatile __bit STR1C @ (((unsigned) &PSTR1CON)*8) + 2;
2029[; ;pic12f1822.h: 5489: extern volatile __bit STR1D @ (((unsigned) &PSTR1CON)*8) + 3;
2030[; ;pic12f1822.h: 5491: extern volatile __bit STR1SYNC @ (((unsigned) &PSTR1CON)*8) + 4;
2031[; ;pic12f1822.h: 5493: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
2032[; ;pic12f1822.h: 5495: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
2033[; ;pic12f1822.h: 5497: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 2;
2034[; ;pic12f1822.h: 5499: extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2035[; ;pic12f1822.h: 5501: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
2036[; ;pic12f1822.h: 5503: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
2037[; ;pic12f1822.h: 5505: extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2038[; ;pic12f1822.h: 5507: extern volatile __bit T0XCS @ (((unsigned) &CPSCON0)*8) + 0;
2039[; ;pic12f1822.h: 5509: extern volatile __bit T1CKI @ (((unsigned) &PORTA)*8) + 5;
2040[; ;pic12f1822.h: 5511: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
2041[; ;pic12f1822.h: 5513: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
2042[; ;pic12f1822.h: 5515: extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
2043[; ;pic12f1822.h: 5517: extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
2044[; ;pic12f1822.h: 5519: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
2045[; ;pic12f1822.h: 5521: extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
2046[; ;pic12f1822.h: 5523: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
2047[; ;pic12f1822.h: 5525: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
2048[; ;pic12f1822.h: 5527: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
2049[; ;pic12f1822.h: 5529: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
2050[; ;pic12f1822.h: 5531: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
2051[; ;pic12f1822.h: 5533: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
2052[; ;pic12f1822.h: 5535: extern volatile __bit T1OSCR @ (((unsigned) &OSCSTAT)*8) + 7;
2053[; ;pic12f1822.h: 5537: extern volatile __bit T1OSI @ (((unsigned) &PORTA)*8) + 5;
2054[; ;pic12f1822.h: 5539: extern volatile __bit T1OSO @ (((unsigned) &PORTA)*8) + 4;
2055[; ;pic12f1822.h: 5541: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
2056[; ;pic12f1822.h: 5543: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
2057[; ;pic12f1822.h: 5545: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
2058[; ;pic12f1822.h: 5547: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
2059[; ;pic12f1822.h: 5549: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
2060[; ;pic12f1822.h: 5551: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
2061[; ;pic12f1822.h: 5553: extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2062[; ;pic12f1822.h: 5555: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
2063[; ;pic12f1822.h: 5557: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
2064[; ;pic12f1822.h: 5559: extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2065[; ;pic12f1822.h: 5561: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
2066[; ;pic12f1822.h: 5563: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
2067[; ;pic12f1822.h: 5565: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
2068[; ;pic12f1822.h: 5567: extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
2069[; ;pic12f1822.h: 5569: extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
2070[; ;pic12f1822.h: 5571: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
2071[; ;pic12f1822.h: 5573: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
2072[; ;pic12f1822.h: 5575: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
2073[; ;pic12f1822.h: 5577: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
2074[; ;pic12f1822.h: 5579: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
2075[; ;pic12f1822.h: 5581: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
2076[; ;pic12f1822.h: 5583: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
2077[; ;pic12f1822.h: 5585: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
2078[; ;pic12f1822.h: 5587: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
2079[; ;pic12f1822.h: 5589: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
2080[; ;pic12f1822.h: 5591: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
2081[; ;pic12f1822.h: 5593: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
2082[; ;pic12f1822.h: 5595: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
2083[; ;pic12f1822.h: 5597: extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
2084[; ;pic12f1822.h: 5599: extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
2085[; ;pic12f1822.h: 5601: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
2086[; ;pic12f1822.h: 5603: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
2087[; ;pic12f1822.h: 5605: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
2088[; ;pic12f1822.h: 5607: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
2089[; ;pic12f1822.h: 5609: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
2090[; ;pic12f1822.h: 5611: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
2091[; ;pic12f1822.h: 5613: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
2092[; ;pic12f1822.h: 5615: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
2093[; ;pic12f1822.h: 5617: extern volatile __bit TXCKSEL @ (((unsigned) &APFCON)*8) + 2;
2094[; ;pic12f1822.h: 5619: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
2095[; ;pic12f1822.h: 5621: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
2096[; ;pic12f1822.h: 5623: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
2097[; ;pic12f1822.h: 5625: extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
2098[; ;pic12f1822.h: 5627: extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
2099[; ;pic12f1822.h: 5629: extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
2100[; ;pic12f1822.h: 5631: extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
2101[; ;pic12f1822.h: 5633: extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
2102[; ;pic12f1822.h: 5635: extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
2103[; ;pic12f1822.h: 5637: extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
2104[; ;pic12f1822.h: 5639: extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
2105[; ;pic12f1822.h: 5641: extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
2106[; ;pic12f1822.h: 5643: extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
2107[; ;pic12f1822.h: 5645: extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
2108[; ;pic12f1822.h: 5647: extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
2109[; ;pic12f1822.h: 5649: extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
2110[; ;pic12f1822.h: 5651: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
2111[; ;pic12f1822.h: 5653: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
2112[; ;pic12f1822.h: 5655: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
2113[; ;pic12f1822.h: 5657: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
2114[; ;pic12f1822.h: 5659: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
2115[; ;pic12f1822.h: 5661: extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
2116[; ;pic12f1822.h: 5663: extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
2117[; ;pic12f1822.h: 5665: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
2118[; ;pic12f1822.h: 5667: extern volatile __bit nMCLR @ (((unsigned) &PORTA)*8) + 3;
2119[; ;pic12f1822.h: 5669: extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
2120[; ;pic12f1822.h: 5671: extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
2121[; ;pic12f1822.h: 5673: extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
2122[; ;pic12f1822.h: 5675: extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
2123[; ;pic12f1822.h: 5677: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
2124[; ;pic12f1822.h: 5679: extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
2125[; ;pic12f1822.h: 5681: extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
2126[; ;pic.h: 28: extern void _nop(void);
2127[; ;pic.h: 77: extern unsigned int flash_read(unsigned short addr);
2128[; ;eeprom_routines.h: 41: extern void eeprom_write(unsigned char addr, unsigned char value);
2129[; ;eeprom_routines.h: 42: extern unsigned char eeprom_read(unsigned char addr);
2130[; ;eeprom_routines.h: 43: extern void eecpymem(volatile unsigned char *to, __eeprom unsigned char *from, unsigned char size);
2131[; ;eeprom_routines.h: 44: extern void memcpyee(__eeprom unsigned char *to, const unsigned char *from, unsigned char size);
2132[; ;pic.h: 151: extern void _delay(unsigned long);
2133[; ;stdint.h: 13: typedef signed char int8_t;
2134[; ;stdint.h: 20: typedef signed int int16_t;
2135[; ;stdint.h: 28: typedef signed short long int int24_t;
2136[; ;stdint.h: 36: typedef signed long int int32_t;
2137[; ;stdint.h: 43: typedef unsigned char uint8_t;
2138[; ;stdint.h: 49: typedef unsigned int uint16_t;
2139[; ;stdint.h: 56: typedef unsigned short long int uint24_t;
2140[; ;stdint.h: 63: typedef unsigned long int uint32_t;
2141[; ;stdint.h: 71: typedef signed char int_least8_t;
2142[; ;stdint.h: 78: typedef signed int int_least16_t;
2143[; ;stdint.h: 90: typedef signed short long int int_least24_t;
2144[; ;stdint.h: 98: typedef signed long int int_least32_t;
2145[; ;stdint.h: 105: typedef unsigned char uint_least8_t;
2146[; ;stdint.h: 111: typedef unsigned int uint_least16_t;
2147[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;
2148[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;
2149[; ;stdint.h: 137: typedef signed char int_fast8_t;
2150[; ;stdint.h: 144: typedef signed int int_fast16_t;
2151[; ;stdint.h: 156: typedef signed short long int int_fast24_t;
2152[; ;stdint.h: 164: typedef signed long int int_fast32_t;
2153[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;
2154[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;
2155[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;
2156[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;
2157[; ;stdint.h: 200: typedef int32_t intmax_t;
2158[; ;stdint.h: 205: typedef uint32_t uintmax_t;
2159[; ;stdint.h: 210: typedef int16_t intptr_t;
2160[; ;stdint.h: 215: typedef uint16_t uintptr_t;
2161[; ;stdbool.h: 12: typedef unsigned char bool;
2162[; ;pic12f1840.h: 44: extern volatile unsigned char INDF0 @ 0x000;
2163"46 /opt/microchip/xc8/v1.12/include/pic12f1840.h
2164[; ;pic12f1840.h: 46: asm("INDF0 equ 00h");
2165[; <" INDF0 equ 00h ;# ">
2166[; ;pic12f1840.h: 49: typedef union {
2167[; ;pic12f1840.h: 50: struct {
2168[; ;pic12f1840.h: 51: unsigned INDF0 :8;
2169[; ;pic12f1840.h: 52: };
2170[; ;pic12f1840.h: 53: } INDF0bits_t;
2171[; ;pic12f1840.h: 54: extern volatile INDF0bits_t INDF0bits @ 0x000;
2172[; ;pic12f1840.h: 63: extern volatile unsigned char INDF1 @ 0x001;
2173"65
2174[; ;pic12f1840.h: 65: asm("INDF1 equ 01h");
2175[; <" INDF1 equ 01h ;# ">
2176[; ;pic12f1840.h: 68: typedef union {
2177[; ;pic12f1840.h: 69: struct {
2178[; ;pic12f1840.h: 70: unsigned INDF1 :8;
2179[; ;pic12f1840.h: 71: };
2180[; ;pic12f1840.h: 72: } INDF1bits_t;
2181[; ;pic12f1840.h: 73: extern volatile INDF1bits_t INDF1bits @ 0x001;
2182[; ;pic12f1840.h: 82: extern volatile unsigned char PCL @ 0x002;
2183"84
2184[; ;pic12f1840.h: 84: asm("PCL equ 02h");
2185[; <" PCL equ 02h ;# ">
2186[; ;pic12f1840.h: 87: typedef union {
2187[; ;pic12f1840.h: 88: struct {
2188[; ;pic12f1840.h: 89: unsigned PCL :8;
2189[; ;pic12f1840.h: 90: };
2190[; ;pic12f1840.h: 91: } PCLbits_t;
2191[; ;pic12f1840.h: 92: extern volatile PCLbits_t PCLbits @ 0x002;
2192[; ;pic12f1840.h: 101: extern volatile unsigned char STATUS @ 0x003;
2193"103
2194[; ;pic12f1840.h: 103: asm("STATUS equ 03h");
2195[; <" STATUS equ 03h ;# ">
2196[; ;pic12f1840.h: 106: typedef union {
2197[; ;pic12f1840.h: 107: struct {
2198[; ;pic12f1840.h: 108: unsigned C :1;
2199[; ;pic12f1840.h: 109: unsigned DC :1;
2200[; ;pic12f1840.h: 110: unsigned Z :1;
2201[; ;pic12f1840.h: 111: unsigned nPD :1;
2202[; ;pic12f1840.h: 112: unsigned nTO :1;
2203[; ;pic12f1840.h: 113: };
2204[; ;pic12f1840.h: 114: struct {
2205[; ;pic12f1840.h: 115: unsigned CARRY :1;
2206[; ;pic12f1840.h: 116: };
2207[; ;pic12f1840.h: 117: struct {
2208[; ;pic12f1840.h: 118: unsigned :2;
2209[; ;pic12f1840.h: 119: unsigned ZERO :1;
2210[; ;pic12f1840.h: 120: };
2211[; ;pic12f1840.h: 121: } STATUSbits_t;
2212[; ;pic12f1840.h: 122: extern volatile STATUSbits_t STATUSbits @ 0x003;
2213[; ;pic12f1840.h: 161: extern volatile unsigned short FSR0 @ 0x004;
2214[; ;pic12f1840.h: 164: extern volatile unsigned char FSR0L @ 0x004;
2215"166
2216[; ;pic12f1840.h: 166: asm("FSR0L equ 04h");
2217[; <" FSR0L equ 04h ;# ">
2218[; ;pic12f1840.h: 169: typedef union {
2219[; ;pic12f1840.h: 170: struct {
2220[; ;pic12f1840.h: 171: unsigned FSR0L :8;
2221[; ;pic12f1840.h: 172: };
2222[; ;pic12f1840.h: 173: } FSR0Lbits_t;
2223[; ;pic12f1840.h: 174: extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
2224[; ;pic12f1840.h: 183: extern volatile unsigned char FSR0H @ 0x005;
2225"185
2226[; ;pic12f1840.h: 185: asm("FSR0H equ 05h");
2227[; <" FSR0H equ 05h ;# ">
2228[; ;pic12f1840.h: 188: typedef union {
2229[; ;pic12f1840.h: 189: struct {
2230[; ;pic12f1840.h: 190: unsigned FSR0H :8;
2231[; ;pic12f1840.h: 191: };
2232[; ;pic12f1840.h: 192: } FSR0Hbits_t;
2233[; ;pic12f1840.h: 193: extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
2234[; ;pic12f1840.h: 202: extern volatile unsigned short FSR1 @ 0x006;
2235[; ;pic12f1840.h: 205: extern volatile unsigned char FSR1L @ 0x006;
2236"207
2237[; ;pic12f1840.h: 207: asm("FSR1L equ 06h");
2238[; <" FSR1L equ 06h ;# ">
2239[; ;pic12f1840.h: 210: typedef union {
2240[; ;pic12f1840.h: 211: struct {
2241[; ;pic12f1840.h: 212: unsigned FSR1L :8;
2242[; ;pic12f1840.h: 213: };
2243[; ;pic12f1840.h: 214: } FSR1Lbits_t;
2244[; ;pic12f1840.h: 215: extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
2245[; ;pic12f1840.h: 224: extern volatile unsigned char FSR1H @ 0x007;
2246"226
2247[; ;pic12f1840.h: 226: asm("FSR1H equ 07h");
2248[; <" FSR1H equ 07h ;# ">
2249[; ;pic12f1840.h: 229: typedef union {
2250[; ;pic12f1840.h: 230: struct {
2251[; ;pic12f1840.h: 231: unsigned FSR1H :8;
2252[; ;pic12f1840.h: 232: };
2253[; ;pic12f1840.h: 233: } FSR1Hbits_t;
2254[; ;pic12f1840.h: 234: extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
2255[; ;pic12f1840.h: 243: extern volatile unsigned char BSR @ 0x008;
2256"245
2257[; ;pic12f1840.h: 245: asm("BSR equ 08h");
2258[; <" BSR equ 08h ;# ">
2259[; ;pic12f1840.h: 248: typedef union {
2260[; ;pic12f1840.h: 249: struct {
2261[; ;pic12f1840.h: 250: unsigned BSR0 :1;
2262[; ;pic12f1840.h: 251: unsigned BSR1 :1;
2263[; ;pic12f1840.h: 252: unsigned BSR2 :1;
2264[; ;pic12f1840.h: 253: unsigned BSR3 :1;
2265[; ;pic12f1840.h: 254: unsigned BSR4 :1;
2266[; ;pic12f1840.h: 255: };
2267[; ;pic12f1840.h: 256: struct {
2268[; ;pic12f1840.h: 257: unsigned BSR :5;
2269[; ;pic12f1840.h: 258: };
2270[; ;pic12f1840.h: 259: } BSRbits_t;
2271[; ;pic12f1840.h: 260: extern volatile BSRbits_t BSRbits @ 0x008;
2272[; ;pic12f1840.h: 294: extern volatile unsigned char WREG @ 0x009;
2273"296
2274[; ;pic12f1840.h: 296: asm("WREG equ 09h");
2275[; <" WREG equ 09h ;# ">
2276[; ;pic12f1840.h: 299: typedef union {
2277[; ;pic12f1840.h: 300: struct {
2278[; ;pic12f1840.h: 301: unsigned WREG0 :8;
2279[; ;pic12f1840.h: 302: };
2280[; ;pic12f1840.h: 303: } WREGbits_t;
2281[; ;pic12f1840.h: 304: extern volatile WREGbits_t WREGbits @ 0x009;
2282[; ;pic12f1840.h: 313: extern volatile unsigned char PCLATH @ 0x00A;
2283"315
2284[; ;pic12f1840.h: 315: asm("PCLATH equ 0Ah");
2285[; <" PCLATH equ 0Ah ;# ">
2286[; ;pic12f1840.h: 318: typedef union {
2287[; ;pic12f1840.h: 319: struct {
2288[; ;pic12f1840.h: 320: unsigned PCLATH :7;
2289[; ;pic12f1840.h: 321: };
2290[; ;pic12f1840.h: 322: } PCLATHbits_t;
2291[; ;pic12f1840.h: 323: extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
2292[; ;pic12f1840.h: 332: extern volatile unsigned char INTCON @ 0x00B;
2293"334
2294[; ;pic12f1840.h: 334: asm("INTCON equ 0Bh");
2295[; <" INTCON equ 0Bh ;# ">
2296[; ;pic12f1840.h: 337: typedef union {
2297[; ;pic12f1840.h: 338: struct {
2298[; ;pic12f1840.h: 339: unsigned IOCIF :1;
2299[; ;pic12f1840.h: 340: unsigned INTF :1;
2300[; ;pic12f1840.h: 341: unsigned TMR0IF :1;
2301[; ;pic12f1840.h: 342: unsigned IOCIE :1;
2302[; ;pic12f1840.h: 343: unsigned INTE :1;
2303[; ;pic12f1840.h: 344: unsigned TMR0IE :1;
2304[; ;pic12f1840.h: 345: unsigned PEIE :1;
2305[; ;pic12f1840.h: 346: unsigned GIE :1;
2306[; ;pic12f1840.h: 347: };
2307[; ;pic12f1840.h: 348: struct {
2308[; ;pic12f1840.h: 349: unsigned :2;
2309[; ;pic12f1840.h: 350: unsigned T0IF :1;
2310[; ;pic12f1840.h: 351: unsigned :2;
2311[; ;pic12f1840.h: 352: unsigned T0IE :1;
2312[; ;pic12f1840.h: 353: };
2313[; ;pic12f1840.h: 354: } INTCONbits_t;
2314[; ;pic12f1840.h: 355: extern volatile INTCONbits_t INTCONbits @ 0x00B;
2315[; ;pic12f1840.h: 409: extern volatile unsigned char PORTA @ 0x00C;
2316"411
2317[; ;pic12f1840.h: 411: asm("PORTA equ 0Ch");
2318[; <" PORTA equ 0Ch ;# ">
2319[; ;pic12f1840.h: 414: typedef union {
2320[; ;pic12f1840.h: 415: struct {
2321[; ;pic12f1840.h: 416: unsigned RA0 :1;
2322[; ;pic12f1840.h: 417: unsigned RA1 :1;
2323[; ;pic12f1840.h: 418: unsigned RA2 :1;
2324[; ;pic12f1840.h: 419: unsigned RA3 :1;
2325[; ;pic12f1840.h: 420: unsigned RA4 :1;
2326[; ;pic12f1840.h: 421: unsigned RA5 :1;
2327[; ;pic12f1840.h: 422: };
2328[; ;pic12f1840.h: 423: } PORTAbits_t;
2329[; ;pic12f1840.h: 424: extern volatile PORTAbits_t PORTAbits @ 0x00C;
2330[; ;pic12f1840.h: 458: extern volatile unsigned char PIR1 @ 0x011;
2331"460
2332[; ;pic12f1840.h: 460: asm("PIR1 equ 011h");
2333[; <" PIR1 equ 011h ;# ">
2334[; ;pic12f1840.h: 463: typedef union {
2335[; ;pic12f1840.h: 464: struct {
2336[; ;pic12f1840.h: 465: unsigned TMR1IF :1;
2337[; ;pic12f1840.h: 466: unsigned TMR2IF :1;
2338[; ;pic12f1840.h: 467: unsigned CCP1IF :1;
2339[; ;pic12f1840.h: 468: unsigned SSP1IF :1;
2340[; ;pic12f1840.h: 469: unsigned TXIF :1;
2341[; ;pic12f1840.h: 470: unsigned RCIF :1;
2342[; ;pic12f1840.h: 471: unsigned ADIF :1;
2343[; ;pic12f1840.h: 472: unsigned TMR1GIF :1;
2344[; ;pic12f1840.h: 473: };
2345[; ;pic12f1840.h: 474: } PIR1bits_t;
2346[; ;pic12f1840.h: 475: extern volatile PIR1bits_t PIR1bits @ 0x011;
2347[; ;pic12f1840.h: 519: extern volatile unsigned char PIR2 @ 0x012;
2348"521
2349[; ;pic12f1840.h: 521: asm("PIR2 equ 012h");
2350[; <" PIR2 equ 012h ;# ">
2351[; ;pic12f1840.h: 524: typedef union {
2352[; ;pic12f1840.h: 525: struct {
2353[; ;pic12f1840.h: 526: unsigned :3;
2354[; ;pic12f1840.h: 527: unsigned BCL1IF :1;
2355[; ;pic12f1840.h: 528: unsigned EEIF :1;
2356[; ;pic12f1840.h: 529: unsigned C1IF :1;
2357[; ;pic12f1840.h: 530: unsigned :1;
2358[; ;pic12f1840.h: 531: unsigned OSFIF :1;
2359[; ;pic12f1840.h: 532: };
2360[; ;pic12f1840.h: 533: } PIR2bits_t;
2361[; ;pic12f1840.h: 534: extern volatile PIR2bits_t PIR2bits @ 0x012;
2362[; ;pic12f1840.h: 558: extern volatile unsigned char TMR0 @ 0x015;
2363"560
2364[; ;pic12f1840.h: 560: asm("TMR0 equ 015h");
2365[; <" TMR0 equ 015h ;# ">
2366[; ;pic12f1840.h: 563: typedef union {
2367[; ;pic12f1840.h: 564: struct {
2368[; ;pic12f1840.h: 565: unsigned TMR0 :8;
2369[; ;pic12f1840.h: 566: };
2370[; ;pic12f1840.h: 567: } TMR0bits_t;
2371[; ;pic12f1840.h: 568: extern volatile TMR0bits_t TMR0bits @ 0x015;
2372[; ;pic12f1840.h: 577: extern volatile unsigned short TMR1 @ 0x016;
2373"579
2374[; ;pic12f1840.h: 579: asm("TMR1 equ 016h");
2375[; <" TMR1 equ 016h ;# ">
2376[; ;pic12f1840.h: 583: extern volatile unsigned char TMR1L @ 0x016;
2377"585
2378[; ;pic12f1840.h: 585: asm("TMR1L equ 016h");
2379[; <" TMR1L equ 016h ;# ">
2380[; ;pic12f1840.h: 588: typedef union {
2381[; ;pic12f1840.h: 589: struct {
2382[; ;pic12f1840.h: 590: unsigned TMR1L :8;
2383[; ;pic12f1840.h: 591: };
2384[; ;pic12f1840.h: 592: } TMR1Lbits_t;
2385[; ;pic12f1840.h: 593: extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
2386[; ;pic12f1840.h: 602: extern volatile unsigned char TMR1H @ 0x017;
2387"604
2388[; ;pic12f1840.h: 604: asm("TMR1H equ 017h");
2389[; <" TMR1H equ 017h ;# ">
2390[; ;pic12f1840.h: 607: typedef union {
2391[; ;pic12f1840.h: 608: struct {
2392[; ;pic12f1840.h: 609: unsigned TMR1H :8;
2393[; ;pic12f1840.h: 610: };
2394[; ;pic12f1840.h: 611: } TMR1Hbits_t;
2395[; ;pic12f1840.h: 612: extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
2396[; ;pic12f1840.h: 621: extern volatile unsigned char T1CON @ 0x018;
2397"623
2398[; ;pic12f1840.h: 623: asm("T1CON equ 018h");
2399[; <" T1CON equ 018h ;# ">
2400[; ;pic12f1840.h: 626: typedef union {
2401[; ;pic12f1840.h: 627: struct {
2402[; ;pic12f1840.h: 628: unsigned TMR1ON :1;
2403[; ;pic12f1840.h: 629: unsigned :1;
2404[; ;pic12f1840.h: 630: unsigned nT1SYNC :1;
2405[; ;pic12f1840.h: 631: unsigned T1OSCEN :1;
2406[; ;pic12f1840.h: 632: unsigned T1CKPS0 :1;
2407[; ;pic12f1840.h: 633: unsigned T1CKPS1 :1;
2408[; ;pic12f1840.h: 634: unsigned TMR1CS0 :1;
2409[; ;pic12f1840.h: 635: unsigned TMR1CS1 :1;
2410[; ;pic12f1840.h: 636: };
2411[; ;pic12f1840.h: 637: struct {
2412[; ;pic12f1840.h: 638: unsigned :4;
2413[; ;pic12f1840.h: 639: unsigned T1CKPS :2;
2414[; ;pic12f1840.h: 640: unsigned TMR1CS :2;
2415[; ;pic12f1840.h: 641: };
2416[; ;pic12f1840.h: 642: } T1CONbits_t;
2417[; ;pic12f1840.h: 643: extern volatile T1CONbits_t T1CONbits @ 0x018;
2418[; ;pic12f1840.h: 692: extern volatile unsigned char T1GCON @ 0x019;
2419"694
2420[; ;pic12f1840.h: 694: asm("T1GCON equ 019h");
2421[; <" T1GCON equ 019h ;# ">
2422[; ;pic12f1840.h: 697: typedef union {
2423[; ;pic12f1840.h: 698: struct {
2424[; ;pic12f1840.h: 699: unsigned T1GSS0 :1;
2425[; ;pic12f1840.h: 700: unsigned T1GSS1 :1;
2426[; ;pic12f1840.h: 701: unsigned T1GVAL :1;
2427[; ;pic12f1840.h: 702: unsigned T1GGO_nDONE :1;
2428[; ;pic12f1840.h: 703: unsigned T1GSPM :1;
2429[; ;pic12f1840.h: 704: unsigned T1GTM :1;
2430[; ;pic12f1840.h: 705: unsigned T1GPOL :1;
2431[; ;pic12f1840.h: 706: unsigned TMR1GE :1;
2432[; ;pic12f1840.h: 707: };
2433[; ;pic12f1840.h: 708: struct {
2434[; ;pic12f1840.h: 709: unsigned T1GSS :2;
2435[; ;pic12f1840.h: 710: unsigned :1;
2436[; ;pic12f1840.h: 711: unsigned T1GGO :1;
2437[; ;pic12f1840.h: 712: };
2438[; ;pic12f1840.h: 713: } T1GCONbits_t;
2439[; ;pic12f1840.h: 714: extern volatile T1GCONbits_t T1GCONbits @ 0x019;
2440[; ;pic12f1840.h: 768: extern volatile unsigned char TMR2 @ 0x01A;
2441"770
2442[; ;pic12f1840.h: 770: asm("TMR2 equ 01Ah");
2443[; <" TMR2 equ 01Ah ;# ">
2444[; ;pic12f1840.h: 773: typedef union {
2445[; ;pic12f1840.h: 774: struct {
2446[; ;pic12f1840.h: 775: unsigned TMR2 :8;
2447[; ;pic12f1840.h: 776: };
2448[; ;pic12f1840.h: 777: } TMR2bits_t;
2449[; ;pic12f1840.h: 778: extern volatile TMR2bits_t TMR2bits @ 0x01A;
2450[; ;pic12f1840.h: 787: extern volatile unsigned char PR2 @ 0x01B;
2451"789
2452[; ;pic12f1840.h: 789: asm("PR2 equ 01Bh");
2453[; <" PR2 equ 01Bh ;# ">
2454[; ;pic12f1840.h: 792: typedef union {
2455[; ;pic12f1840.h: 793: struct {
2456[; ;pic12f1840.h: 794: unsigned PR2 :8;
2457[; ;pic12f1840.h: 795: };
2458[; ;pic12f1840.h: 796: } PR2bits_t;
2459[; ;pic12f1840.h: 797: extern volatile PR2bits_t PR2bits @ 0x01B;
2460[; ;pic12f1840.h: 806: extern volatile unsigned char T2CON @ 0x01C;
2461"808
2462[; ;pic12f1840.h: 808: asm("T2CON equ 01Ch");
2463[; <" T2CON equ 01Ch ;# ">
2464[; ;pic12f1840.h: 811: typedef union {
2465[; ;pic12f1840.h: 812: struct {
2466[; ;pic12f1840.h: 813: unsigned T2CKPS0 :1;
2467[; ;pic12f1840.h: 814: unsigned T2CKPS1 :1;
2468[; ;pic12f1840.h: 815: unsigned TMR2ON :1;
2469[; ;pic12f1840.h: 816: unsigned T2OUTPS0 :1;
2470[; ;pic12f1840.h: 817: unsigned T2OUTPS1 :1;
2471[; ;pic12f1840.h: 818: unsigned T2OUTPS2 :1;
2472[; ;pic12f1840.h: 819: unsigned T2OUTPS3 :1;
2473[; ;pic12f1840.h: 820: };
2474[; ;pic12f1840.h: 821: struct {
2475[; ;pic12f1840.h: 822: unsigned T2CKPS :2;
2476[; ;pic12f1840.h: 823: unsigned :1;
2477[; ;pic12f1840.h: 824: unsigned T2OUTPS :4;
2478[; ;pic12f1840.h: 825: };
2479[; ;pic12f1840.h: 826: } T2CONbits_t;
2480[; ;pic12f1840.h: 827: extern volatile T2CONbits_t T2CONbits @ 0x01C;
2481[; ;pic12f1840.h: 876: extern volatile unsigned char CPSCON0 @ 0x01E;
2482"878
2483[; ;pic12f1840.h: 878: asm("CPSCON0 equ 01Eh");
2484[; <" CPSCON0 equ 01Eh ;# ">
2485[; ;pic12f1840.h: 881: typedef union {
2486[; ;pic12f1840.h: 882: struct {
2487[; ;pic12f1840.h: 883: unsigned T0XCS :1;
2488[; ;pic12f1840.h: 884: unsigned CPSOUT :1;
2489[; ;pic12f1840.h: 885: unsigned CPSRNG0 :1;
2490[; ;pic12f1840.h: 886: unsigned CPSRNG1 :1;
2491[; ;pic12f1840.h: 887: unsigned :2;
2492[; ;pic12f1840.h: 888: unsigned CPSRM :1;
2493[; ;pic12f1840.h: 889: unsigned CPSON :1;
2494[; ;pic12f1840.h: 890: };
2495[; ;pic12f1840.h: 891: struct {
2496[; ;pic12f1840.h: 892: unsigned :2;
2497[; ;pic12f1840.h: 893: unsigned CPSRNG :2;
2498[; ;pic12f1840.h: 894: };
2499[; ;pic12f1840.h: 895: } CPSCON0bits_t;
2500[; ;pic12f1840.h: 896: extern volatile CPSCON0bits_t CPSCON0bits @ 0x01E;
2501[; ;pic12f1840.h: 935: extern volatile unsigned char CPSCON1 @ 0x01F;
2502"937
2503[; ;pic12f1840.h: 937: asm("CPSCON1 equ 01Fh");
2504[; <" CPSCON1 equ 01Fh ;# ">
2505[; ;pic12f1840.h: 940: typedef union {
2506[; ;pic12f1840.h: 941: struct {
2507[; ;pic12f1840.h: 942: unsigned CPSCH0 :1;
2508[; ;pic12f1840.h: 943: unsigned CPSCH1 :1;
2509[; ;pic12f1840.h: 944: };
2510[; ;pic12f1840.h: 945: struct {
2511[; ;pic12f1840.h: 946: unsigned CPSCH :2;
2512[; ;pic12f1840.h: 947: };
2513[; ;pic12f1840.h: 948: } CPSCON1bits_t;
2514[; ;pic12f1840.h: 949: extern volatile CPSCON1bits_t CPSCON1bits @ 0x01F;
2515[; ;pic12f1840.h: 968: extern volatile unsigned char TRISA @ 0x08C;
2516"970
2517[; ;pic12f1840.h: 970: asm("TRISA equ 08Ch");
2518[; <" TRISA equ 08Ch ;# ">
2519[; ;pic12f1840.h: 973: typedef union {
2520[; ;pic12f1840.h: 974: struct {
2521[; ;pic12f1840.h: 975: unsigned TRISA0 :1;
2522[; ;pic12f1840.h: 976: unsigned TRISA1 :1;
2523[; ;pic12f1840.h: 977: unsigned TRISA2 :1;
2524[; ;pic12f1840.h: 978: unsigned TRISA3 :1;
2525[; ;pic12f1840.h: 979: unsigned TRISA4 :1;
2526[; ;pic12f1840.h: 980: unsigned TRISA5 :1;
2527[; ;pic12f1840.h: 981: };
2528[; ;pic12f1840.h: 982: } TRISAbits_t;
2529[; ;pic12f1840.h: 983: extern volatile TRISAbits_t TRISAbits @ 0x08C;
2530[; ;pic12f1840.h: 1017: extern volatile unsigned char PIE1 @ 0x091;
2531"1019
2532[; ;pic12f1840.h: 1019: asm("PIE1 equ 091h");
2533[; <" PIE1 equ 091h ;# ">
2534[; ;pic12f1840.h: 1022: typedef union {
2535[; ;pic12f1840.h: 1023: struct {
2536[; ;pic12f1840.h: 1024: unsigned TMR1IE :1;
2537[; ;pic12f1840.h: 1025: unsigned TMR2IE :1;
2538[; ;pic12f1840.h: 1026: unsigned CCP1IE :1;
2539[; ;pic12f1840.h: 1027: unsigned SSP1IE :1;
2540[; ;pic12f1840.h: 1028: unsigned TXIE :1;
2541[; ;pic12f1840.h: 1029: unsigned RCIE :1;
2542[; ;pic12f1840.h: 1030: unsigned ADIE :1;
2543[; ;pic12f1840.h: 1031: unsigned TMR1GIE :1;
2544[; ;pic12f1840.h: 1032: };
2545[; ;pic12f1840.h: 1033: } PIE1bits_t;
2546[; ;pic12f1840.h: 1034: extern volatile PIE1bits_t PIE1bits @ 0x091;
2547[; ;pic12f1840.h: 1078: extern volatile unsigned char PIE2 @ 0x092;
2548"1080
2549[; ;pic12f1840.h: 1080: asm("PIE2 equ 092h");
2550[; <" PIE2 equ 092h ;# ">
2551[; ;pic12f1840.h: 1083: typedef union {
2552[; ;pic12f1840.h: 1084: struct {
2553[; ;pic12f1840.h: 1085: unsigned :3;
2554[; ;pic12f1840.h: 1086: unsigned BCL1IE :1;
2555[; ;pic12f1840.h: 1087: unsigned EEIE :1;
2556[; ;pic12f1840.h: 1088: unsigned C1IE :1;
2557[; ;pic12f1840.h: 1089: unsigned :1;
2558[; ;pic12f1840.h: 1090: unsigned OSFIE :1;
2559[; ;pic12f1840.h: 1091: };
2560[; ;pic12f1840.h: 1092: } PIE2bits_t;
2561[; ;pic12f1840.h: 1093: extern volatile PIE2bits_t PIE2bits @ 0x092;
2562[; ;pic12f1840.h: 1117: extern volatile unsigned char OPTION_REG @ 0x095;
2563"1119
2564[; ;pic12f1840.h: 1119: asm("OPTION_REG equ 095h");
2565[; <" OPTION_REG equ 095h ;# ">
2566[; ;pic12f1840.h: 1122: typedef union {
2567[; ;pic12f1840.h: 1123: struct {
2568[; ;pic12f1840.h: 1124: unsigned PS0 :1;
2569[; ;pic12f1840.h: 1125: unsigned PS1 :1;
2570[; ;pic12f1840.h: 1126: unsigned PS2 :1;
2571[; ;pic12f1840.h: 1127: unsigned PSA :1;
2572[; ;pic12f1840.h: 1128: unsigned TMR0SE :1;
2573[; ;pic12f1840.h: 1129: unsigned TMR0CS :1;
2574[; ;pic12f1840.h: 1130: unsigned INTEDG :1;
2575[; ;pic12f1840.h: 1131: unsigned nWPUEN :1;
2576[; ;pic12f1840.h: 1132: };
2577[; ;pic12f1840.h: 1133: struct {
2578[; ;pic12f1840.h: 1134: unsigned PS :3;
2579[; ;pic12f1840.h: 1135: unsigned :1;
2580[; ;pic12f1840.h: 1136: unsigned T0SE :1;
2581[; ;pic12f1840.h: 1137: unsigned T0CS :1;
2582[; ;pic12f1840.h: 1138: };
2583[; ;pic12f1840.h: 1139: } OPTION_REGbits_t;
2584[; ;pic12f1840.h: 1140: extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
2585[; ;pic12f1840.h: 1199: extern volatile unsigned char PCON @ 0x096;
2586"1201
2587[; ;pic12f1840.h: 1201: asm("PCON equ 096h");
2588[; <" PCON equ 096h ;# ">
2589[; ;pic12f1840.h: 1204: typedef union {
2590[; ;pic12f1840.h: 1205: struct {
2591[; ;pic12f1840.h: 1206: unsigned nBOR :1;
2592[; ;pic12f1840.h: 1207: unsigned nPOR :1;
2593[; ;pic12f1840.h: 1208: unsigned nRI :1;
2594[; ;pic12f1840.h: 1209: unsigned nRMCLR :1;
2595[; ;pic12f1840.h: 1210: unsigned :2;
2596[; ;pic12f1840.h: 1211: unsigned STKUNF :1;
2597[; ;pic12f1840.h: 1212: unsigned STKOVF :1;
2598[; ;pic12f1840.h: 1213: };
2599[; ;pic12f1840.h: 1214: } PCONbits_t;
2600[; ;pic12f1840.h: 1215: extern volatile PCONbits_t PCONbits @ 0x096;
2601[; ;pic12f1840.h: 1249: extern volatile unsigned char WDTCON @ 0x097;
2602"1251
2603[; ;pic12f1840.h: 1251: asm("WDTCON equ 097h");
2604[; <" WDTCON equ 097h ;# ">
2605[; ;pic12f1840.h: 1254: typedef union {
2606[; ;pic12f1840.h: 1255: struct {
2607[; ;pic12f1840.h: 1256: unsigned SWDTEN :1;
2608[; ;pic12f1840.h: 1257: unsigned WDTPS0 :1;
2609[; ;pic12f1840.h: 1258: unsigned WDTPS1 :1;
2610[; ;pic12f1840.h: 1259: unsigned WDTPS2 :1;
2611[; ;pic12f1840.h: 1260: unsigned WDTPS3 :1;
2612[; ;pic12f1840.h: 1261: unsigned WDTPS4 :1;
2613[; ;pic12f1840.h: 1262: };
2614[; ;pic12f1840.h: 1263: struct {
2615[; ;pic12f1840.h: 1264: unsigned :1;
2616[; ;pic12f1840.h: 1265: unsigned WDTPS :5;
2617[; ;pic12f1840.h: 1266: };
2618[; ;pic12f1840.h: 1267: } WDTCONbits_t;
2619[; ;pic12f1840.h: 1268: extern volatile WDTCONbits_t WDTCONbits @ 0x097;
2620[; ;pic12f1840.h: 1307: extern volatile unsigned char OSCTUNE @ 0x098;
2621"1309
2622[; ;pic12f1840.h: 1309: asm("OSCTUNE equ 098h");
2623[; <" OSCTUNE equ 098h ;# ">
2624[; ;pic12f1840.h: 1312: typedef union {
2625[; ;pic12f1840.h: 1313: struct {
2626[; ;pic12f1840.h: 1314: unsigned TUN0 :1;
2627[; ;pic12f1840.h: 1315: unsigned TUN1 :1;
2628[; ;pic12f1840.h: 1316: unsigned TUN2 :1;
2629[; ;pic12f1840.h: 1317: unsigned TUN3 :1;
2630[; ;pic12f1840.h: 1318: unsigned TUN4 :1;
2631[; ;pic12f1840.h: 1319: unsigned TUN5 :1;
2632[; ;pic12f1840.h: 1320: };
2633[; ;pic12f1840.h: 1321: struct {
2634[; ;pic12f1840.h: 1322: unsigned TUN :6;
2635[; ;pic12f1840.h: 1323: };
2636[; ;pic12f1840.h: 1324: } OSCTUNEbits_t;
2637[; ;pic12f1840.h: 1325: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
2638[; ;pic12f1840.h: 1364: extern volatile unsigned char OSCCON @ 0x099;
2639"1366
2640[; ;pic12f1840.h: 1366: asm("OSCCON equ 099h");
2641[; <" OSCCON equ 099h ;# ">
2642[; ;pic12f1840.h: 1369: typedef union {
2643[; ;pic12f1840.h: 1370: struct {
2644[; ;pic12f1840.h: 1371: unsigned SCS0 :1;
2645[; ;pic12f1840.h: 1372: unsigned SCS1 :1;
2646[; ;pic12f1840.h: 1373: unsigned :1;
2647[; ;pic12f1840.h: 1374: unsigned IRCF0 :1;
2648[; ;pic12f1840.h: 1375: unsigned IRCF1 :1;
2649[; ;pic12f1840.h: 1376: unsigned IRCF2 :1;
2650[; ;pic12f1840.h: 1377: unsigned IRCF3 :1;
2651[; ;pic12f1840.h: 1378: unsigned SPLLEN :1;
2652[; ;pic12f1840.h: 1379: };
2653[; ;pic12f1840.h: 1380: struct {
2654[; ;pic12f1840.h: 1381: unsigned SCS :2;
2655[; ;pic12f1840.h: 1382: unsigned :1;
2656[; ;pic12f1840.h: 1383: unsigned IRCF :4;
2657[; ;pic12f1840.h: 1384: };
2658[; ;pic12f1840.h: 1385: } OSCCONbits_t;
2659[; ;pic12f1840.h: 1386: extern volatile OSCCONbits_t OSCCONbits @ 0x099;
2660[; ;pic12f1840.h: 1435: extern volatile unsigned char OSCSTAT @ 0x09A;
2661"1437
2662[; ;pic12f1840.h: 1437: asm("OSCSTAT equ 09Ah");
2663[; <" OSCSTAT equ 09Ah ;# ">
2664[; ;pic12f1840.h: 1440: typedef union {
2665[; ;pic12f1840.h: 1441: struct {
2666[; ;pic12f1840.h: 1442: unsigned HFIOFS :1;
2667[; ;pic12f1840.h: 1443: unsigned LFIOFR :1;
2668[; ;pic12f1840.h: 1444: unsigned MFIOFR :1;
2669[; ;pic12f1840.h: 1445: unsigned HFIOFL :1;
2670[; ;pic12f1840.h: 1446: unsigned HFIOFR :1;
2671[; ;pic12f1840.h: 1447: unsigned OSTS :1;
2672[; ;pic12f1840.h: 1448: unsigned PLLR :1;
2673[; ;pic12f1840.h: 1449: unsigned T1OSCR :1;
2674[; ;pic12f1840.h: 1450: };
2675[; ;pic12f1840.h: 1451: } OSCSTATbits_t;
2676[; ;pic12f1840.h: 1452: extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
2677[; ;pic12f1840.h: 1496: extern volatile unsigned short ADRES @ 0x09B;
2678"1498
2679[; ;pic12f1840.h: 1498: asm("ADRES equ 09Bh");
2680[; <" ADRES equ 09Bh ;# ">
2681[; ;pic12f1840.h: 1502: extern volatile unsigned char ADRESL @ 0x09B;
2682"1504
2683[; ;pic12f1840.h: 1504: asm("ADRESL equ 09Bh");
2684[; <" ADRESL equ 09Bh ;# ">
2685[; ;pic12f1840.h: 1507: typedef union {
2686[; ;pic12f1840.h: 1508: struct {
2687[; ;pic12f1840.h: 1509: unsigned ADRESL :8;
2688[; ;pic12f1840.h: 1510: };
2689[; ;pic12f1840.h: 1511: } ADRESLbits_t;
2690[; ;pic12f1840.h: 1512: extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
2691[; ;pic12f1840.h: 1521: extern volatile unsigned char ADRESH @ 0x09C;
2692"1523
2693[; ;pic12f1840.h: 1523: asm("ADRESH equ 09Ch");
2694[; <" ADRESH equ 09Ch ;# ">
2695[; ;pic12f1840.h: 1526: typedef union {
2696[; ;pic12f1840.h: 1527: struct {
2697[; ;pic12f1840.h: 1528: unsigned ADRESH :8;
2698[; ;pic12f1840.h: 1529: };
2699[; ;pic12f1840.h: 1530: } ADRESHbits_t;
2700[; ;pic12f1840.h: 1531: extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
2701[; ;pic12f1840.h: 1540: extern volatile unsigned char ADCON0 @ 0x09D;
2702"1542
2703[; ;pic12f1840.h: 1542: asm("ADCON0 equ 09Dh");
2704[; <" ADCON0 equ 09Dh ;# ">
2705[; ;pic12f1840.h: 1545: typedef union {
2706[; ;pic12f1840.h: 1546: struct {
2707[; ;pic12f1840.h: 1547: unsigned ADON :1;
2708[; ;pic12f1840.h: 1548: unsigned GO_nDONE :1;
2709[; ;pic12f1840.h: 1549: unsigned CHS0 :1;
2710[; ;pic12f1840.h: 1550: unsigned CHS1 :1;
2711[; ;pic12f1840.h: 1551: unsigned CHS2 :1;
2712[; ;pic12f1840.h: 1552: unsigned CHS3 :1;
2713[; ;pic12f1840.h: 1553: unsigned CHS4 :1;
2714[; ;pic12f1840.h: 1554: };
2715[; ;pic12f1840.h: 1555: struct {
2716[; ;pic12f1840.h: 1556: unsigned :1;
2717[; ;pic12f1840.h: 1557: unsigned ADGO :1;
2718[; ;pic12f1840.h: 1558: unsigned CHS :5;
2719[; ;pic12f1840.h: 1559: };
2720[; ;pic12f1840.h: 1560: struct {
2721[; ;pic12f1840.h: 1561: unsigned :1;
2722[; ;pic12f1840.h: 1562: unsigned GO :1;
2723[; ;pic12f1840.h: 1563: };
2724[; ;pic12f1840.h: 1564: } ADCON0bits_t;
2725[; ;pic12f1840.h: 1565: extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
2726[; ;pic12f1840.h: 1619: extern volatile unsigned char ADCON1 @ 0x09E;
2727"1621
2728[; ;pic12f1840.h: 1621: asm("ADCON1 equ 09Eh");
2729[; <" ADCON1 equ 09Eh ;# ">
2730[; ;pic12f1840.h: 1624: typedef union {
2731[; ;pic12f1840.h: 1625: struct {
2732[; ;pic12f1840.h: 1626: unsigned ADPREF0 :1;
2733[; ;pic12f1840.h: 1627: unsigned ADPREF1 :1;
2734[; ;pic12f1840.h: 1628: unsigned :2;
2735[; ;pic12f1840.h: 1629: unsigned ADCS0 :1;
2736[; ;pic12f1840.h: 1630: unsigned ADCS1 :1;
2737[; ;pic12f1840.h: 1631: unsigned ADCS2 :1;
2738[; ;pic12f1840.h: 1632: unsigned ADFM :1;
2739[; ;pic12f1840.h: 1633: };
2740[; ;pic12f1840.h: 1634: struct {
2741[; ;pic12f1840.h: 1635: unsigned ADPREF :2;
2742[; ;pic12f1840.h: 1636: unsigned :2;
2743[; ;pic12f1840.h: 1637: unsigned ADCS :3;
2744[; ;pic12f1840.h: 1638: };
2745[; ;pic12f1840.h: 1639: } ADCON1bits_t;
2746[; ;pic12f1840.h: 1640: extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
2747[; ;pic12f1840.h: 1684: extern volatile unsigned char LATA @ 0x10C;
2748"1686
2749[; ;pic12f1840.h: 1686: asm("LATA equ 010Ch");
2750[; <" LATA equ 010Ch ;# ">
2751[; ;pic12f1840.h: 1689: typedef union {
2752[; ;pic12f1840.h: 1690: struct {
2753[; ;pic12f1840.h: 1691: unsigned LATA0 :1;
2754[; ;pic12f1840.h: 1692: unsigned LATA1 :1;
2755[; ;pic12f1840.h: 1693: unsigned LATA2 :1;
2756[; ;pic12f1840.h: 1694: unsigned :1;
2757[; ;pic12f1840.h: 1695: unsigned LATA4 :1;
2758[; ;pic12f1840.h: 1696: unsigned LATA5 :1;
2759[; ;pic12f1840.h: 1697: };
2760[; ;pic12f1840.h: 1698: } LATAbits_t;
2761[; ;pic12f1840.h: 1699: extern volatile LATAbits_t LATAbits @ 0x10C;
2762[; ;pic12f1840.h: 1728: extern volatile unsigned char CM1CON0 @ 0x111;
2763"1730
2764[; ;pic12f1840.h: 1730: asm("CM1CON0 equ 0111h");
2765[; <" CM1CON0 equ 0111h ;# ">
2766[; ;pic12f1840.h: 1733: typedef union {
2767[; ;pic12f1840.h: 1734: struct {
2768[; ;pic12f1840.h: 1735: unsigned C1SYNC :1;
2769[; ;pic12f1840.h: 1736: unsigned C1HYS :1;
2770[; ;pic12f1840.h: 1737: unsigned C1SP :1;
2771[; ;pic12f1840.h: 1738: unsigned :1;
2772[; ;pic12f1840.h: 1739: unsigned C1POL :1;
2773[; ;pic12f1840.h: 1740: unsigned C1OE :1;
2774[; ;pic12f1840.h: 1741: unsigned C1OUT :1;
2775[; ;pic12f1840.h: 1742: unsigned C1ON :1;
2776[; ;pic12f1840.h: 1743: };
2777[; ;pic12f1840.h: 1744: } CM1CON0bits_t;
2778[; ;pic12f1840.h: 1745: extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
2779[; ;pic12f1840.h: 1784: extern volatile unsigned char CM1CON1 @ 0x112;
2780"1786
2781[; ;pic12f1840.h: 1786: asm("CM1CON1 equ 0112h");
2782[; <" CM1CON1 equ 0112h ;# ">
2783[; ;pic12f1840.h: 1789: typedef union {
2784[; ;pic12f1840.h: 1790: struct {
2785[; ;pic12f1840.h: 1791: unsigned C1NCH :1;
2786[; ;pic12f1840.h: 1792: unsigned :3;
2787[; ;pic12f1840.h: 1793: unsigned C1PCH0 :1;
2788[; ;pic12f1840.h: 1794: unsigned C1PCH1 :1;
2789[; ;pic12f1840.h: 1795: unsigned C1INTN :1;
2790[; ;pic12f1840.h: 1796: unsigned C1INTP :1;
2791[; ;pic12f1840.h: 1797: };
2792[; ;pic12f1840.h: 1798: struct {
2793[; ;pic12f1840.h: 1799: unsigned C1NCH0 :1;
2794[; ;pic12f1840.h: 1800: unsigned :3;
2795[; ;pic12f1840.h: 1801: unsigned C1PCH :2;
2796[; ;pic12f1840.h: 1802: };
2797[; ;pic12f1840.h: 1803: } CM1CON1bits_t;
2798[; ;pic12f1840.h: 1804: extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
2799[; ;pic12f1840.h: 1843: extern volatile unsigned char CMOUT @ 0x115;
2800"1845
2801[; ;pic12f1840.h: 1845: asm("CMOUT equ 0115h");
2802[; <" CMOUT equ 0115h ;# ">
2803[; ;pic12f1840.h: 1848: typedef union {
2804[; ;pic12f1840.h: 1849: struct {
2805[; ;pic12f1840.h: 1850: unsigned MC1OUT :1;
2806[; ;pic12f1840.h: 1851: };
2807[; ;pic12f1840.h: 1852: } CMOUTbits_t;
2808[; ;pic12f1840.h: 1853: extern volatile CMOUTbits_t CMOUTbits @ 0x115;
2809[; ;pic12f1840.h: 1862: extern volatile unsigned char BORCON @ 0x116;
2810"1864
2811[; ;pic12f1840.h: 1864: asm("BORCON equ 0116h");
2812[; <" BORCON equ 0116h ;# ">
2813[; ;pic12f1840.h: 1867: typedef union {
2814[; ;pic12f1840.h: 1868: struct {
2815[; ;pic12f1840.h: 1869: unsigned BORRDY :1;
2816[; ;pic12f1840.h: 1870: unsigned :5;
2817[; ;pic12f1840.h: 1871: unsigned BORFS :1;
2818[; ;pic12f1840.h: 1872: unsigned SBOREN :1;
2819[; ;pic12f1840.h: 1873: };
2820[; ;pic12f1840.h: 1874: } BORCONbits_t;
2821[; ;pic12f1840.h: 1875: extern volatile BORCONbits_t BORCONbits @ 0x116;
2822[; ;pic12f1840.h: 1894: extern volatile unsigned char FVRCON @ 0x117;
2823"1896
2824[; ;pic12f1840.h: 1896: asm("FVRCON equ 0117h");
2825[; <" FVRCON equ 0117h ;# ">
2826[; ;pic12f1840.h: 1899: typedef union {
2827[; ;pic12f1840.h: 1900: struct {
2828[; ;pic12f1840.h: 1901: unsigned ADFVR0 :1;
2829[; ;pic12f1840.h: 1902: unsigned ADFVR1 :1;
2830[; ;pic12f1840.h: 1903: unsigned CDAFVR0 :1;
2831[; ;pic12f1840.h: 1904: unsigned CDAFVR1 :1;
2832[; ;pic12f1840.h: 1905: unsigned TSRNG :1;
2833[; ;pic12f1840.h: 1906: unsigned TSEN :1;
2834[; ;pic12f1840.h: 1907: unsigned FVRRDY :1;
2835[; ;pic12f1840.h: 1908: unsigned FVREN :1;
2836[; ;pic12f1840.h: 1909: };
2837[; ;pic12f1840.h: 1910: struct {
2838[; ;pic12f1840.h: 1911: unsigned ADFVR :2;
2839[; ;pic12f1840.h: 1912: unsigned CDAFVR :2;
2840[; ;pic12f1840.h: 1913: };
2841[; ;pic12f1840.h: 1914: } FVRCONbits_t;
2842[; ;pic12f1840.h: 1915: extern volatile FVRCONbits_t FVRCONbits @ 0x117;
2843[; ;pic12f1840.h: 1969: extern volatile unsigned char DACCON0 @ 0x118;
2844"1971
2845[; ;pic12f1840.h: 1971: asm("DACCON0 equ 0118h");
2846[; <" DACCON0 equ 0118h ;# ">
2847[; ;pic12f1840.h: 1974: typedef union {
2848[; ;pic12f1840.h: 1975: struct {
2849[; ;pic12f1840.h: 1976: unsigned :2;
2850[; ;pic12f1840.h: 1977: unsigned DACPSS0 :1;
2851[; ;pic12f1840.h: 1978: unsigned DACPSS1 :1;
2852[; ;pic12f1840.h: 1979: unsigned :1;
2853[; ;pic12f1840.h: 1980: unsigned DACOE :1;
2854[; ;pic12f1840.h: 1981: unsigned DACLPS :1;
2855[; ;pic12f1840.h: 1982: unsigned DACEN :1;
2856[; ;pic12f1840.h: 1983: };
2857[; ;pic12f1840.h: 1984: struct {
2858[; ;pic12f1840.h: 1985: unsigned :2;
2859[; ;pic12f1840.h: 1986: unsigned DACPSS :2;
2860[; ;pic12f1840.h: 1987: };
2861[; ;pic12f1840.h: 1988: } DACCON0bits_t;
2862[; ;pic12f1840.h: 1989: extern volatile DACCON0bits_t DACCON0bits @ 0x118;
2863[; ;pic12f1840.h: 2023: extern volatile unsigned char DACCON1 @ 0x119;
2864"2025
2865[; ;pic12f1840.h: 2025: asm("DACCON1 equ 0119h");
2866[; <" DACCON1 equ 0119h ;# ">
2867[; ;pic12f1840.h: 2028: typedef union {
2868[; ;pic12f1840.h: 2029: struct {
2869[; ;pic12f1840.h: 2030: unsigned DACR0 :1;
2870[; ;pic12f1840.h: 2031: unsigned DACR1 :1;
2871[; ;pic12f1840.h: 2032: unsigned DACR2 :1;
2872[; ;pic12f1840.h: 2033: unsigned DACR3 :1;
2873[; ;pic12f1840.h: 2034: unsigned DACR4 :1;
2874[; ;pic12f1840.h: 2035: };
2875[; ;pic12f1840.h: 2036: struct {
2876[; ;pic12f1840.h: 2037: unsigned DACR :5;
2877[; ;pic12f1840.h: 2038: };
2878[; ;pic12f1840.h: 2039: } DACCON1bits_t;
2879[; ;pic12f1840.h: 2040: extern volatile DACCON1bits_t DACCON1bits @ 0x119;
2880[; ;pic12f1840.h: 2074: extern volatile unsigned char SRCON0 @ 0x11A;
2881"2076
2882[; ;pic12f1840.h: 2076: asm("SRCON0 equ 011Ah");
2883[; <" SRCON0 equ 011Ah ;# ">
2884[; ;pic12f1840.h: 2079: typedef union {
2885[; ;pic12f1840.h: 2080: struct {
2886[; ;pic12f1840.h: 2081: unsigned SRPR :1;
2887[; ;pic12f1840.h: 2082: unsigned SRPS :1;
2888[; ;pic12f1840.h: 2083: unsigned SRNQEN :1;
2889[; ;pic12f1840.h: 2084: unsigned SRQEN :1;
2890[; ;pic12f1840.h: 2085: unsigned SRCLK0 :1;
2891[; ;pic12f1840.h: 2086: unsigned SRCLK1 :1;
2892[; ;pic12f1840.h: 2087: unsigned SRCLK2 :1;
2893[; ;pic12f1840.h: 2088: unsigned SRLEN :1;
2894[; ;pic12f1840.h: 2089: };
2895[; ;pic12f1840.h: 2090: struct {
2896[; ;pic12f1840.h: 2091: unsigned :4;
2897[; ;pic12f1840.h: 2092: unsigned SRCLK :3;
2898[; ;pic12f1840.h: 2093: };
2899[; ;pic12f1840.h: 2094: } SRCON0bits_t;
2900[; ;pic12f1840.h: 2095: extern volatile SRCON0bits_t SRCON0bits @ 0x11A;
2901[; ;pic12f1840.h: 2144: extern volatile unsigned char SRCON1 @ 0x11B;
2902"2146
2903[; ;pic12f1840.h: 2146: asm("SRCON1 equ 011Bh");
2904[; <" SRCON1 equ 011Bh ;# ">
2905[; ;pic12f1840.h: 2149: typedef union {
2906[; ;pic12f1840.h: 2150: struct {
2907[; ;pic12f1840.h: 2151: unsigned SRRC1E :1;
2908[; ;pic12f1840.h: 2152: unsigned :1;
2909[; ;pic12f1840.h: 2153: unsigned SRRCKE :1;
2910[; ;pic12f1840.h: 2154: unsigned SRRPE :1;
2911[; ;pic12f1840.h: 2155: unsigned SRSC1E :1;
2912[; ;pic12f1840.h: 2156: unsigned :1;
2913[; ;pic12f1840.h: 2157: unsigned SRSCKE :1;
2914[; ;pic12f1840.h: 2158: unsigned SRSPE :1;
2915[; ;pic12f1840.h: 2159: };
2916[; ;pic12f1840.h: 2160: } SRCON1bits_t;
2917[; ;pic12f1840.h: 2161: extern volatile SRCON1bits_t SRCON1bits @ 0x11B;
2918[; ;pic12f1840.h: 2195: extern volatile unsigned char APFCON @ 0x11D;
2919"2197
2920[; ;pic12f1840.h: 2197: asm("APFCON equ 011Dh");
2921[; <" APFCON equ 011Dh ;# ">
2922[; ;pic12f1840.h: 2200: extern volatile unsigned char APFCON0 @ 0x11D;
2923"2202
2924[; ;pic12f1840.h: 2202: asm("APFCON0 equ 011Dh");
2925[; <" APFCON0 equ 011Dh ;# ">
2926[; ;pic12f1840.h: 2205: typedef union {
2927[; ;pic12f1840.h: 2206: struct {
2928[; ;pic12f1840.h: 2207: unsigned CCP1SEL :1;
2929[; ;pic12f1840.h: 2208: unsigned P1BSEL :1;
2930[; ;pic12f1840.h: 2209: unsigned TXCKSEL :1;
2931[; ;pic12f1840.h: 2210: unsigned T1GSEL :1;
2932[; ;pic12f1840.h: 2211: unsigned :1;
2933[; ;pic12f1840.h: 2212: unsigned SSSEL :1;
2934[; ;pic12f1840.h: 2213: unsigned SDOSEL :1;
2935[; ;pic12f1840.h: 2214: unsigned RXDTSEL :1;
2936[; ;pic12f1840.h: 2215: };
2937[; ;pic12f1840.h: 2216: struct {
2938[; ;pic12f1840.h: 2217: unsigned :5;
2939[; ;pic12f1840.h: 2218: unsigned SS1SEL :1;
2940[; ;pic12f1840.h: 2219: unsigned SDO1SEL :1;
2941[; ;pic12f1840.h: 2220: };
2942[; ;pic12f1840.h: 2221: } APFCONbits_t;
2943[; ;pic12f1840.h: 2222: extern volatile APFCONbits_t APFCONbits @ 0x11D;
2944[; ;pic12f1840.h: 2270: typedef union {
2945[; ;pic12f1840.h: 2271: struct {
2946[; ;pic12f1840.h: 2272: unsigned CCP1SEL :1;
2947[; ;pic12f1840.h: 2273: unsigned P1BSEL :1;
2948[; ;pic12f1840.h: 2274: unsigned TXCKSEL :1;
2949[; ;pic12f1840.h: 2275: unsigned T1GSEL :1;
2950[; ;pic12f1840.h: 2276: unsigned :1;
2951[; ;pic12f1840.h: 2277: unsigned SSSEL :1;
2952[; ;pic12f1840.h: 2278: unsigned SDOSEL :1;
2953[; ;pic12f1840.h: 2279: unsigned RXDTSEL :1;
2954[; ;pic12f1840.h: 2280: };
2955[; ;pic12f1840.h: 2281: struct {
2956[; ;pic12f1840.h: 2282: unsigned :5;
2957[; ;pic12f1840.h: 2283: unsigned SS1SEL :1;
2958[; ;pic12f1840.h: 2284: unsigned SDO1SEL :1;
2959[; ;pic12f1840.h: 2285: };
2960[; ;pic12f1840.h: 2286: } APFCON0bits_t;
2961[; ;pic12f1840.h: 2287: extern volatile APFCON0bits_t APFCON0bits @ 0x11D;
2962[; ;pic12f1840.h: 2336: extern volatile unsigned char ANSELA @ 0x18C;
2963"2338
2964[; ;pic12f1840.h: 2338: asm("ANSELA equ 018Ch");
2965[; <" ANSELA equ 018Ch ;# ">
2966[; ;pic12f1840.h: 2341: typedef union {
2967[; ;pic12f1840.h: 2342: struct {
2968[; ;pic12f1840.h: 2343: unsigned ANSA0 :1;
2969[; ;pic12f1840.h: 2344: unsigned ANSA1 :1;
2970[; ;pic12f1840.h: 2345: unsigned ANSA2 :1;
2971[; ;pic12f1840.h: 2346: unsigned :1;
2972[; ;pic12f1840.h: 2347: unsigned ANSA4 :1;
2973[; ;pic12f1840.h: 2348: };
2974[; ;pic12f1840.h: 2349: struct {
2975[; ;pic12f1840.h: 2350: unsigned ANSELA :5;
2976[; ;pic12f1840.h: 2351: };
2977[; ;pic12f1840.h: 2352: } ANSELAbits_t;
2978[; ;pic12f1840.h: 2353: extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
2979[; ;pic12f1840.h: 2382: extern volatile unsigned short EEADR @ 0x191;
2980"2384
2981[; ;pic12f1840.h: 2384: asm("EEADR equ 0191h");
2982[; <" EEADR equ 0191h ;# ">
2983[; ;pic12f1840.h: 2388: extern volatile unsigned char EEADRL @ 0x191;
2984"2390
2985[; ;pic12f1840.h: 2390: asm("EEADRL equ 0191h");
2986[; <" EEADRL equ 0191h ;# ">
2987[; ;pic12f1840.h: 2393: typedef union {
2988[; ;pic12f1840.h: 2394: struct {
2989[; ;pic12f1840.h: 2395: unsigned EEADRL :8;
2990[; ;pic12f1840.h: 2396: };
2991[; ;pic12f1840.h: 2397: } EEADRLbits_t;
2992[; ;pic12f1840.h: 2398: extern volatile EEADRLbits_t EEADRLbits @ 0x191;
2993[; ;pic12f1840.h: 2407: extern volatile unsigned char EEADRH @ 0x192;
2994"2409
2995[; ;pic12f1840.h: 2409: asm("EEADRH equ 0192h");
2996[; <" EEADRH equ 0192h ;# ">
2997[; ;pic12f1840.h: 2412: typedef union {
2998[; ;pic12f1840.h: 2413: struct {
2999[; ;pic12f1840.h: 2414: unsigned EEADRH :7;
3000[; ;pic12f1840.h: 2415: };
3001[; ;pic12f1840.h: 2416: } EEADRHbits_t;
3002[; ;pic12f1840.h: 2417: extern volatile EEADRHbits_t EEADRHbits @ 0x192;
3003[; ;pic12f1840.h: 2426: extern volatile unsigned short EEDAT @ 0x193;
3004"2428
3005[; ;pic12f1840.h: 2428: asm("EEDAT equ 0193h");
3006[; <" EEDAT equ 0193h ;# ">
3007[; ;pic12f1840.h: 2432: extern volatile unsigned char EEDATL @ 0x193;
3008"2434
3009[; ;pic12f1840.h: 2434: asm("EEDATL equ 0193h");
3010[; <" EEDATL equ 0193h ;# ">
3011[; ;pic12f1840.h: 2437: extern volatile unsigned char EEDATA @ 0x193;
3012"2439
3013[; ;pic12f1840.h: 2439: asm("EEDATA equ 0193h");
3014[; <" EEDATA equ 0193h ;# ">
3015[; ;pic12f1840.h: 2442: typedef union {
3016[; ;pic12f1840.h: 2443: struct {
3017[; ;pic12f1840.h: 2444: unsigned EEDATL :8;
3018[; ;pic12f1840.h: 2445: };
3019[; ;pic12f1840.h: 2446: } EEDATLbits_t;
3020[; ;pic12f1840.h: 2447: extern volatile EEDATLbits_t EEDATLbits @ 0x193;
3021[; ;pic12f1840.h: 2455: typedef union {
3022[; ;pic12f1840.h: 2456: struct {
3023[; ;pic12f1840.h: 2457: unsigned EEDATL :8;
3024[; ;pic12f1840.h: 2458: };
3025[; ;pic12f1840.h: 2459: } EEDATAbits_t;
3026[; ;pic12f1840.h: 2460: extern volatile EEDATAbits_t EEDATAbits @ 0x193;
3027[; ;pic12f1840.h: 2469: extern volatile unsigned char EEDATH @ 0x194;
3028"2471
3029[; ;pic12f1840.h: 2471: asm("EEDATH equ 0194h");
3030[; <" EEDATH equ 0194h ;# ">
3031[; ;pic12f1840.h: 2474: typedef union {
3032[; ;pic12f1840.h: 2475: struct {
3033[; ;pic12f1840.h: 2476: unsigned EEDATH :6;
3034[; ;pic12f1840.h: 2477: };
3035[; ;pic12f1840.h: 2478: } EEDATHbits_t;
3036[; ;pic12f1840.h: 2479: extern volatile EEDATHbits_t EEDATHbits @ 0x194;
3037[; ;pic12f1840.h: 2488: extern volatile unsigned char EECON1 @ 0x195;
3038"2490
3039[; ;pic12f1840.h: 2490: asm("EECON1 equ 0195h");
3040[; <" EECON1 equ 0195h ;# ">
3041[; ;pic12f1840.h: 2493: typedef union {
3042[; ;pic12f1840.h: 2494: struct {
3043[; ;pic12f1840.h: 2495: unsigned RD :1;
3044[; ;pic12f1840.h: 2496: unsigned WR :1;
3045[; ;pic12f1840.h: 2497: unsigned WREN :1;
3046[; ;pic12f1840.h: 2498: unsigned WRERR :1;
3047[; ;pic12f1840.h: 2499: unsigned FREE :1;
3048[; ;pic12f1840.h: 2500: unsigned LWLO :1;
3049[; ;pic12f1840.h: 2501: unsigned CFGS :1;
3050[; ;pic12f1840.h: 2502: unsigned EEPGD :1;
3051[; ;pic12f1840.h: 2503: };
3052[; ;pic12f1840.h: 2504: } EECON1bits_t;
3053[; ;pic12f1840.h: 2505: extern volatile EECON1bits_t EECON1bits @ 0x195;
3054[; ;pic12f1840.h: 2549: extern volatile unsigned char EECON2 @ 0x196;
3055"2551
3056[; ;pic12f1840.h: 2551: asm("EECON2 equ 0196h");
3057[; <" EECON2 equ 0196h ;# ">
3058[; ;pic12f1840.h: 2554: typedef union {
3059[; ;pic12f1840.h: 2555: struct {
3060[; ;pic12f1840.h: 2556: unsigned EECON2 :8;
3061[; ;pic12f1840.h: 2557: };
3062[; ;pic12f1840.h: 2558: } EECON2bits_t;
3063[; ;pic12f1840.h: 2559: extern volatile EECON2bits_t EECON2bits @ 0x196;
3064[; ;pic12f1840.h: 2568: extern volatile unsigned char VREGCON @ 0x197;
3065"2570
3066[; ;pic12f1840.h: 2570: asm("VREGCON equ 0197h");
3067[; <" VREGCON equ 0197h ;# ">
3068[; ;pic12f1840.h: 2573: typedef union {
3069[; ;pic12f1840.h: 2574: struct {
3070[; ;pic12f1840.h: 2575: unsigned VREGPM0 :1;
3071[; ;pic12f1840.h: 2576: unsigned VREGPM1 :1;
3072[; ;pic12f1840.h: 2577: };
3073[; ;pic12f1840.h: 2578: struct {
3074[; ;pic12f1840.h: 2579: unsigned VREGPM :2;
3075[; ;pic12f1840.h: 2580: };
3076[; ;pic12f1840.h: 2581: } VREGCONbits_t;
3077[; ;pic12f1840.h: 2582: extern volatile VREGCONbits_t VREGCONbits @ 0x197;
3078[; ;pic12f1840.h: 2601: extern volatile unsigned char RCREG @ 0x199;
3079"2603
3080[; ;pic12f1840.h: 2603: asm("RCREG equ 0199h");
3081[; <" RCREG equ 0199h ;# ">
3082[; ;pic12f1840.h: 2606: typedef union {
3083[; ;pic12f1840.h: 2607: struct {
3084[; ;pic12f1840.h: 2608: unsigned RCREG :8;
3085[; ;pic12f1840.h: 2609: };
3086[; ;pic12f1840.h: 2610: } RCREGbits_t;
3087[; ;pic12f1840.h: 2611: extern volatile RCREGbits_t RCREGbits @ 0x199;
3088[; ;pic12f1840.h: 2620: extern volatile unsigned char TXREG @ 0x19A;
3089"2622
3090[; ;pic12f1840.h: 2622: asm("TXREG equ 019Ah");
3091[; <" TXREG equ 019Ah ;# ">
3092[; ;pic12f1840.h: 2625: typedef union {
3093[; ;pic12f1840.h: 2626: struct {
3094[; ;pic12f1840.h: 2627: unsigned TXREG :8;
3095[; ;pic12f1840.h: 2628: };
3096[; ;pic12f1840.h: 2629: } TXREGbits_t;
3097[; ;pic12f1840.h: 2630: extern volatile TXREGbits_t TXREGbits @ 0x19A;
3098[; ;pic12f1840.h: 2639: extern volatile unsigned char SPBRGL @ 0x19B;
3099"2641
3100[; ;pic12f1840.h: 2641: asm("SPBRGL equ 019Bh");
3101[; <" SPBRGL equ 019Bh ;# ">
3102[; ;pic12f1840.h: 2644: extern volatile unsigned char SPBRG @ 0x19B;
3103"2646
3104[; ;pic12f1840.h: 2646: asm("SPBRG equ 019Bh");
3105[; <" SPBRG equ 019Bh ;# ">
3106[; ;pic12f1840.h: 2649: typedef union {
3107[; ;pic12f1840.h: 2650: struct {
3108[; ;pic12f1840.h: 2651: unsigned SPBRGL :8;
3109[; ;pic12f1840.h: 2652: };
3110[; ;pic12f1840.h: 2653: } SPBRGLbits_t;
3111[; ;pic12f1840.h: 2654: extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
3112[; ;pic12f1840.h: 2662: typedef union {
3113[; ;pic12f1840.h: 2663: struct {
3114[; ;pic12f1840.h: 2664: unsigned SPBRGL :8;
3115[; ;pic12f1840.h: 2665: };
3116[; ;pic12f1840.h: 2666: } SPBRGbits_t;
3117[; ;pic12f1840.h: 2667: extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
3118[; ;pic12f1840.h: 2676: extern volatile unsigned char SPBRGH @ 0x19C;
3119"2678
3120[; ;pic12f1840.h: 2678: asm("SPBRGH equ 019Ch");
3121[; <" SPBRGH equ 019Ch ;# ">
3122[; ;pic12f1840.h: 2681: typedef union {
3123[; ;pic12f1840.h: 2682: struct {
3124[; ;pic12f1840.h: 2683: unsigned SPBRGH :8;
3125[; ;pic12f1840.h: 2684: };
3126[; ;pic12f1840.h: 2685: } SPBRGHbits_t;
3127[; ;pic12f1840.h: 2686: extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
3128[; ;pic12f1840.h: 2695: extern volatile unsigned char RCSTA @ 0x19D;
3129"2697
3130[; ;pic12f1840.h: 2697: asm("RCSTA equ 019Dh");
3131[; <" RCSTA equ 019Dh ;# ">
3132[; ;pic12f1840.h: 2700: typedef union {
3133[; ;pic12f1840.h: 2701: struct {
3134[; ;pic12f1840.h: 2702: unsigned RX9D :1;
3135[; ;pic12f1840.h: 2703: unsigned OERR :1;
3136[; ;pic12f1840.h: 2704: unsigned FERR :1;
3137[; ;pic12f1840.h: 2705: unsigned ADDEN :1;
3138[; ;pic12f1840.h: 2706: unsigned CREN :1;
3139[; ;pic12f1840.h: 2707: unsigned SREN :1;
3140[; ;pic12f1840.h: 2708: unsigned RX9 :1;
3141[; ;pic12f1840.h: 2709: unsigned SPEN :1;
3142[; ;pic12f1840.h: 2710: };
3143[; ;pic12f1840.h: 2711: } RCSTAbits_t;
3144[; ;pic12f1840.h: 2712: extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
3145[; ;pic12f1840.h: 2756: extern volatile unsigned char TXSTA @ 0x19E;
3146"2758
3147[; ;pic12f1840.h: 2758: asm("TXSTA equ 019Eh");
3148[; <" TXSTA equ 019Eh ;# ">
3149[; ;pic12f1840.h: 2761: typedef union {
3150[; ;pic12f1840.h: 2762: struct {
3151[; ;pic12f1840.h: 2763: unsigned TX9D :1;
3152[; ;pic12f1840.h: 2764: unsigned TRMT :1;
3153[; ;pic12f1840.h: 2765: unsigned BRGH :1;
3154[; ;pic12f1840.h: 2766: unsigned SENDB :1;
3155[; ;pic12f1840.h: 2767: unsigned SYNC :1;
3156[; ;pic12f1840.h: 2768: unsigned TXEN :1;
3157[; ;pic12f1840.h: 2769: unsigned TX9 :1;
3158[; ;pic12f1840.h: 2770: unsigned CSRC :1;
3159[; ;pic12f1840.h: 2771: };
3160[; ;pic12f1840.h: 2772: } TXSTAbits_t;
3161[; ;pic12f1840.h: 2773: extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
3162[; ;pic12f1840.h: 2817: extern volatile unsigned char BAUDCON @ 0x19F;
3163"2819
3164[; ;pic12f1840.h: 2819: asm("BAUDCON equ 019Fh");
3165[; <" BAUDCON equ 019Fh ;# ">
3166[; ;pic12f1840.h: 2822: typedef union {
3167[; ;pic12f1840.h: 2823: struct {
3168[; ;pic12f1840.h: 2824: unsigned ABDEN :1;
3169[; ;pic12f1840.h: 2825: unsigned WUE :1;
3170[; ;pic12f1840.h: 2826: unsigned :1;
3171[; ;pic12f1840.h: 2827: unsigned BRG16 :1;
3172[; ;pic12f1840.h: 2828: unsigned SCKP :1;
3173[; ;pic12f1840.h: 2829: unsigned :1;
3174[; ;pic12f1840.h: 2830: unsigned RCIDL :1;
3175[; ;pic12f1840.h: 2831: unsigned ABDOVF :1;
3176[; ;pic12f1840.h: 2832: };
3177[; ;pic12f1840.h: 2833: } BAUDCONbits_t;
3178[; ;pic12f1840.h: 2834: extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
3179[; ;pic12f1840.h: 2868: extern volatile unsigned char WPUA @ 0x20C;
3180"2870
3181[; ;pic12f1840.h: 2870: asm("WPUA equ 020Ch");
3182[; <" WPUA equ 020Ch ;# ">
3183[; ;pic12f1840.h: 2873: typedef union {
3184[; ;pic12f1840.h: 2874: struct {
3185[; ;pic12f1840.h: 2875: unsigned WPUA0 :1;
3186[; ;pic12f1840.h: 2876: unsigned WPUA1 :1;
3187[; ;pic12f1840.h: 2877: unsigned WPUA2 :1;
3188[; ;pic12f1840.h: 2878: unsigned WPUA3 :1;
3189[; ;pic12f1840.h: 2879: unsigned WPUA4 :1;
3190[; ;pic12f1840.h: 2880: unsigned WPUA5 :1;
3191[; ;pic12f1840.h: 2881: };
3192[; ;pic12f1840.h: 2882: struct {
3193[; ;pic12f1840.h: 2883: unsigned WPUA :6;
3194[; ;pic12f1840.h: 2884: };
3195[; ;pic12f1840.h: 2885: } WPUAbits_t;
3196[; ;pic12f1840.h: 2886: extern volatile WPUAbits_t WPUAbits @ 0x20C;
3197[; ;pic12f1840.h: 2925: extern volatile unsigned char SSP1BUF @ 0x211;
3198"2927
3199[; ;pic12f1840.h: 2927: asm("SSP1BUF equ 0211h");
3200[; <" SSP1BUF equ 0211h ;# ">
3201[; ;pic12f1840.h: 2930: extern volatile unsigned char SSPBUF @ 0x211;
3202"2932
3203[; ;pic12f1840.h: 2932: asm("SSPBUF equ 0211h");
3204[; <" SSPBUF equ 0211h ;# ">
3205[; ;pic12f1840.h: 2935: typedef union {
3206[; ;pic12f1840.h: 2936: struct {
3207[; ;pic12f1840.h: 2937: unsigned SSPBUF :8;
3208[; ;pic12f1840.h: 2938: };
3209[; ;pic12f1840.h: 2939: } SSP1BUFbits_t;
3210[; ;pic12f1840.h: 2940: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
3211[; ;pic12f1840.h: 2948: typedef union {
3212[; ;pic12f1840.h: 2949: struct {
3213[; ;pic12f1840.h: 2950: unsigned SSPBUF :8;
3214[; ;pic12f1840.h: 2951: };
3215[; ;pic12f1840.h: 2952: } SSPBUFbits_t;
3216[; ;pic12f1840.h: 2953: extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
3217[; ;pic12f1840.h: 2962: extern volatile unsigned char SSP1ADD @ 0x212;
3218"2964
3219[; ;pic12f1840.h: 2964: asm("SSP1ADD equ 0212h");
3220[; <" SSP1ADD equ 0212h ;# ">
3221[; ;pic12f1840.h: 2967: extern volatile unsigned char SSPADD @ 0x212;
3222"2969
3223[; ;pic12f1840.h: 2969: asm("SSPADD equ 0212h");
3224[; <" SSPADD equ 0212h ;# ">
3225[; ;pic12f1840.h: 2972: typedef union {
3226[; ;pic12f1840.h: 2973: struct {
3227[; ;pic12f1840.h: 2974: unsigned SSPADD :8;
3228[; ;pic12f1840.h: 2975: };
3229[; ;pic12f1840.h: 2976: } SSP1ADDbits_t;
3230[; ;pic12f1840.h: 2977: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
3231[; ;pic12f1840.h: 2985: typedef union {
3232[; ;pic12f1840.h: 2986: struct {
3233[; ;pic12f1840.h: 2987: unsigned SSPADD :8;
3234[; ;pic12f1840.h: 2988: };
3235[; ;pic12f1840.h: 2989: } SSPADDbits_t;
3236[; ;pic12f1840.h: 2990: extern volatile SSPADDbits_t SSPADDbits @ 0x212;
3237[; ;pic12f1840.h: 2999: extern volatile unsigned char SSP1MSK @ 0x213;
3238"3001
3239[; ;pic12f1840.h: 3001: asm("SSP1MSK equ 0213h");
3240[; <" SSP1MSK equ 0213h ;# ">
3241[; ;pic12f1840.h: 3004: extern volatile unsigned char SSPMSK @ 0x213;
3242"3006
3243[; ;pic12f1840.h: 3006: asm("SSPMSK equ 0213h");
3244[; <" SSPMSK equ 0213h ;# ">
3245[; ;pic12f1840.h: 3009: typedef union {
3246[; ;pic12f1840.h: 3010: struct {
3247[; ;pic12f1840.h: 3011: unsigned SSPMSK :8;
3248[; ;pic12f1840.h: 3012: };
3249[; ;pic12f1840.h: 3013: } SSP1MSKbits_t;
3250[; ;pic12f1840.h: 3014: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
3251[; ;pic12f1840.h: 3022: typedef union {
3252[; ;pic12f1840.h: 3023: struct {
3253[; ;pic12f1840.h: 3024: unsigned SSPMSK :8;
3254[; ;pic12f1840.h: 3025: };
3255[; ;pic12f1840.h: 3026: } SSPMSKbits_t;
3256[; ;pic12f1840.h: 3027: extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
3257[; ;pic12f1840.h: 3036: extern volatile unsigned char SSP1STAT @ 0x214;
3258"3038
3259[; ;pic12f1840.h: 3038: asm("SSP1STAT equ 0214h");
3260[; <" SSP1STAT equ 0214h ;# ">
3261[; ;pic12f1840.h: 3041: extern volatile unsigned char SSPSTAT @ 0x214;
3262"3043
3263[; ;pic12f1840.h: 3043: asm("SSPSTAT equ 0214h");
3264[; <" SSPSTAT equ 0214h ;# ">
3265[; ;pic12f1840.h: 3046: typedef union {
3266[; ;pic12f1840.h: 3047: struct {
3267[; ;pic12f1840.h: 3048: unsigned BF :1;
3268[; ;pic12f1840.h: 3049: unsigned UA :1;
3269[; ;pic12f1840.h: 3050: unsigned R_nW :1;
3270[; ;pic12f1840.h: 3051: unsigned S :1;
3271[; ;pic12f1840.h: 3052: unsigned P :1;
3272[; ;pic12f1840.h: 3053: unsigned D_nA :1;
3273[; ;pic12f1840.h: 3054: unsigned CKE :1;
3274[; ;pic12f1840.h: 3055: unsigned SMP :1;
3275[; ;pic12f1840.h: 3056: };
3276[; ;pic12f1840.h: 3057: } SSP1STATbits_t;
3277[; ;pic12f1840.h: 3058: extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
3278[; ;pic12f1840.h: 3101: typedef union {
3279[; ;pic12f1840.h: 3102: struct {
3280[; ;pic12f1840.h: 3103: unsigned BF :1;
3281[; ;pic12f1840.h: 3104: unsigned UA :1;
3282[; ;pic12f1840.h: 3105: unsigned R_nW :1;
3283[; ;pic12f1840.h: 3106: unsigned S :1;
3284[; ;pic12f1840.h: 3107: unsigned P :1;
3285[; ;pic12f1840.h: 3108: unsigned D_nA :1;
3286[; ;pic12f1840.h: 3109: unsigned CKE :1;
3287[; ;pic12f1840.h: 3110: unsigned SMP :1;
3288[; ;pic12f1840.h: 3111: };
3289[; ;pic12f1840.h: 3112: } SSPSTATbits_t;
3290[; ;pic12f1840.h: 3113: extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
3291[; ;pic12f1840.h: 3157: extern volatile unsigned char SSP1CON1 @ 0x215;
3292"3159
3293[; ;pic12f1840.h: 3159: asm("SSP1CON1 equ 0215h");
3294[; <" SSP1CON1 equ 0215h ;# ">
3295[; ;pic12f1840.h: 3162: extern volatile unsigned char SSPCON1 @ 0x215;
3296"3164
3297[; ;pic12f1840.h: 3164: asm("SSPCON1 equ 0215h");
3298[; <" SSPCON1 equ 0215h ;# ">
3299[; ;pic12f1840.h: 3166: extern volatile unsigned char SSPCON @ 0x215;
3300"3168
3301[; ;pic12f1840.h: 3168: asm("SSPCON equ 0215h");
3302[; <" SSPCON equ 0215h ;# ">
3303[; ;pic12f1840.h: 3171: typedef union {
3304[; ;pic12f1840.h: 3172: struct {
3305[; ;pic12f1840.h: 3173: unsigned SSPM0 :1;
3306[; ;pic12f1840.h: 3174: unsigned SSPM1 :1;
3307[; ;pic12f1840.h: 3175: unsigned SSPM2 :1;
3308[; ;pic12f1840.h: 3176: unsigned SSPM3 :1;
3309[; ;pic12f1840.h: 3177: unsigned CKP :1;
3310[; ;pic12f1840.h: 3178: unsigned SSPEN :1;
3311[; ;pic12f1840.h: 3179: unsigned SSPOV :1;
3312[; ;pic12f1840.h: 3180: unsigned WCOL :1;
3313[; ;pic12f1840.h: 3181: };
3314[; ;pic12f1840.h: 3182: struct {
3315[; ;pic12f1840.h: 3183: unsigned SSPM :4;
3316[; ;pic12f1840.h: 3184: };
3317[; ;pic12f1840.h: 3185: } SSP1CON1bits_t;
3318[; ;pic12f1840.h: 3186: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
3319[; ;pic12f1840.h: 3234: typedef union {
3320[; ;pic12f1840.h: 3235: struct {
3321[; ;pic12f1840.h: 3236: unsigned SSPM0 :1;
3322[; ;pic12f1840.h: 3237: unsigned SSPM1 :1;
3323[; ;pic12f1840.h: 3238: unsigned SSPM2 :1;
3324[; ;pic12f1840.h: 3239: unsigned SSPM3 :1;
3325[; ;pic12f1840.h: 3240: unsigned CKP :1;
3326[; ;pic12f1840.h: 3241: unsigned SSPEN :1;
3327[; ;pic12f1840.h: 3242: unsigned SSPOV :1;
3328[; ;pic12f1840.h: 3243: unsigned WCOL :1;
3329[; ;pic12f1840.h: 3244: };
3330[; ;pic12f1840.h: 3245: struct {
3331[; ;pic12f1840.h: 3246: unsigned SSPM :4;
3332[; ;pic12f1840.h: 3247: };
3333[; ;pic12f1840.h: 3248: } SSPCON1bits_t;
3334[; ;pic12f1840.h: 3249: extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
3335[; ;pic12f1840.h: 3296: typedef union {
3336[; ;pic12f1840.h: 3297: struct {
3337[; ;pic12f1840.h: 3298: unsigned SSPM0 :1;
3338[; ;pic12f1840.h: 3299: unsigned SSPM1 :1;
3339[; ;pic12f1840.h: 3300: unsigned SSPM2 :1;
3340[; ;pic12f1840.h: 3301: unsigned SSPM3 :1;
3341[; ;pic12f1840.h: 3302: unsigned CKP :1;
3342[; ;pic12f1840.h: 3303: unsigned SSPEN :1;
3343[; ;pic12f1840.h: 3304: unsigned SSPOV :1;
3344[; ;pic12f1840.h: 3305: unsigned WCOL :1;
3345[; ;pic12f1840.h: 3306: };
3346[; ;pic12f1840.h: 3307: struct {
3347[; ;pic12f1840.h: 3308: unsigned SSPM :4;
3348[; ;pic12f1840.h: 3309: };
3349[; ;pic12f1840.h: 3310: } SSPCONbits_t;
3350[; ;pic12f1840.h: 3311: extern volatile SSPCONbits_t SSPCONbits @ 0x215;
3351[; ;pic12f1840.h: 3360: extern volatile unsigned char SSP1CON2 @ 0x216;
3352"3362
3353[; ;pic12f1840.h: 3362: asm("SSP1CON2 equ 0216h");
3354[; <" SSP1CON2 equ 0216h ;# ">
3355[; ;pic12f1840.h: 3365: extern volatile unsigned char SSPCON2 @ 0x216;
3356"3367
3357[; ;pic12f1840.h: 3367: asm("SSPCON2 equ 0216h");
3358[; <" SSPCON2 equ 0216h ;# ">
3359[; ;pic12f1840.h: 3370: typedef union {
3360[; ;pic12f1840.h: 3371: struct {
3361[; ;pic12f1840.h: 3372: unsigned SEN :1;
3362[; ;pic12f1840.h: 3373: unsigned RSEN :1;
3363[; ;pic12f1840.h: 3374: unsigned PEN :1;
3364[; ;pic12f1840.h: 3375: unsigned RCEN :1;
3365[; ;pic12f1840.h: 3376: unsigned ACKEN :1;
3366[; ;pic12f1840.h: 3377: unsigned ACKDT :1;
3367[; ;pic12f1840.h: 3378: unsigned ACKSTAT :1;
3368[; ;pic12f1840.h: 3379: unsigned GCEN :1;
3369[; ;pic12f1840.h: 3380: };
3370[; ;pic12f1840.h: 3381: } SSP1CON2bits_t;
3371[; ;pic12f1840.h: 3382: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
3372[; ;pic12f1840.h: 3425: typedef union {
3373[; ;pic12f1840.h: 3426: struct {
3374[; ;pic12f1840.h: 3427: unsigned SEN :1;
3375[; ;pic12f1840.h: 3428: unsigned RSEN :1;
3376[; ;pic12f1840.h: 3429: unsigned PEN :1;
3377[; ;pic12f1840.h: 3430: unsigned RCEN :1;
3378[; ;pic12f1840.h: 3431: unsigned ACKEN :1;
3379[; ;pic12f1840.h: 3432: unsigned ACKDT :1;
3380[; ;pic12f1840.h: 3433: unsigned ACKSTAT :1;
3381[; ;pic12f1840.h: 3434: unsigned GCEN :1;
3382[; ;pic12f1840.h: 3435: };
3383[; ;pic12f1840.h: 3436: } SSPCON2bits_t;
3384[; ;pic12f1840.h: 3437: extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
3385[; ;pic12f1840.h: 3481: extern volatile unsigned char SSP1CON3 @ 0x217;
3386"3483
3387[; ;pic12f1840.h: 3483: asm("SSP1CON3 equ 0217h");
3388[; <" SSP1CON3 equ 0217h ;# ">
3389[; ;pic12f1840.h: 3486: extern volatile unsigned char SSPCON3 @ 0x217;
3390"3488
3391[; ;pic12f1840.h: 3488: asm("SSPCON3 equ 0217h");
3392[; <" SSPCON3 equ 0217h ;# ">
3393[; ;pic12f1840.h: 3491: typedef union {
3394[; ;pic12f1840.h: 3492: struct {
3395[; ;pic12f1840.h: 3493: unsigned DHEN :1;
3396[; ;pic12f1840.h: 3494: unsigned AHEN :1;
3397[; ;pic12f1840.h: 3495: unsigned SBCDE :1;
3398[; ;pic12f1840.h: 3496: unsigned SDAHT :1;
3399[; ;pic12f1840.h: 3497: unsigned BOEN :1;
3400[; ;pic12f1840.h: 3498: unsigned SCIE :1;
3401[; ;pic12f1840.h: 3499: unsigned PCIE :1;
3402[; ;pic12f1840.h: 3500: unsigned ACKTIM :1;
3403[; ;pic12f1840.h: 3501: };
3404[; ;pic12f1840.h: 3502: } SSP1CON3bits_t;
3405[; ;pic12f1840.h: 3503: extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
3406[; ;pic12f1840.h: 3546: typedef union {
3407[; ;pic12f1840.h: 3547: struct {
3408[; ;pic12f1840.h: 3548: unsigned DHEN :1;
3409[; ;pic12f1840.h: 3549: unsigned AHEN :1;
3410[; ;pic12f1840.h: 3550: unsigned SBCDE :1;
3411[; ;pic12f1840.h: 3551: unsigned SDAHT :1;
3412[; ;pic12f1840.h: 3552: unsigned BOEN :1;
3413[; ;pic12f1840.h: 3553: unsigned SCIE :1;
3414[; ;pic12f1840.h: 3554: unsigned PCIE :1;
3415[; ;pic12f1840.h: 3555: unsigned ACKTIM :1;
3416[; ;pic12f1840.h: 3556: };
3417[; ;pic12f1840.h: 3557: } SSPCON3bits_t;
3418[; ;pic12f1840.h: 3558: extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
3419[; ;pic12f1840.h: 3602: extern volatile unsigned char CCPR1L @ 0x291;
3420"3604
3421[; ;pic12f1840.h: 3604: asm("CCPR1L equ 0291h");
3422[; <" CCPR1L equ 0291h ;# ">
3423[; ;pic12f1840.h: 3607: typedef union {
3424[; ;pic12f1840.h: 3608: struct {
3425[; ;pic12f1840.h: 3609: unsigned CCPR1L :8;
3426[; ;pic12f1840.h: 3610: };
3427[; ;pic12f1840.h: 3611: } CCPR1Lbits_t;
3428[; ;pic12f1840.h: 3612: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
3429[; ;pic12f1840.h: 3621: extern volatile unsigned char CCPR1H @ 0x292;
3430"3623
3431[; ;pic12f1840.h: 3623: asm("CCPR1H equ 0292h");
3432[; <" CCPR1H equ 0292h ;# ">
3433[; ;pic12f1840.h: 3626: typedef union {
3434[; ;pic12f1840.h: 3627: struct {
3435[; ;pic12f1840.h: 3628: unsigned CCPR1H :8;
3436[; ;pic12f1840.h: 3629: };
3437[; ;pic12f1840.h: 3630: } CCPR1Hbits_t;
3438[; ;pic12f1840.h: 3631: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
3439[; ;pic12f1840.h: 3640: extern volatile unsigned char CCP1CON @ 0x293;
3440"3642
3441[; ;pic12f1840.h: 3642: asm("CCP1CON equ 0293h");
3442[; <" CCP1CON equ 0293h ;# ">
3443[; ;pic12f1840.h: 3645: typedef union {
3444[; ;pic12f1840.h: 3646: struct {
3445[; ;pic12f1840.h: 3647: unsigned CCP1M0 :1;
3446[; ;pic12f1840.h: 3648: unsigned CCP1M1 :1;
3447[; ;pic12f1840.h: 3649: unsigned CCP1M2 :1;
3448[; ;pic12f1840.h: 3650: unsigned CCP1M3 :1;
3449[; ;pic12f1840.h: 3651: unsigned DC1B0 :1;
3450[; ;pic12f1840.h: 3652: unsigned DC1B1 :1;
3451[; ;pic12f1840.h: 3653: unsigned P1M0 :1;
3452[; ;pic12f1840.h: 3654: unsigned P1M1 :1;
3453[; ;pic12f1840.h: 3655: };
3454[; ;pic12f1840.h: 3656: struct {
3455[; ;pic12f1840.h: 3657: unsigned CCP1M :4;
3456[; ;pic12f1840.h: 3658: unsigned DC1B :2;
3457[; ;pic12f1840.h: 3659: unsigned P1M :2;
3458[; ;pic12f1840.h: 3660: };
3459[; ;pic12f1840.h: 3661: } CCP1CONbits_t;
3460[; ;pic12f1840.h: 3662: extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
3461[; ;pic12f1840.h: 3721: extern volatile unsigned char PWM1CON @ 0x294;
3462"3723
3463[; ;pic12f1840.h: 3723: asm("PWM1CON equ 0294h");
3464[; <" PWM1CON equ 0294h ;# ">
3465[; ;pic12f1840.h: 3726: typedef union {
3466[; ;pic12f1840.h: 3727: struct {
3467[; ;pic12f1840.h: 3728: unsigned P1DC0 :1;
3468[; ;pic12f1840.h: 3729: unsigned P1DC1 :1;
3469[; ;pic12f1840.h: 3730: unsigned P1DC2 :1;
3470[; ;pic12f1840.h: 3731: unsigned P1DC3 :1;
3471[; ;pic12f1840.h: 3732: unsigned P1DC4 :1;
3472[; ;pic12f1840.h: 3733: unsigned P1DC5 :1;
3473[; ;pic12f1840.h: 3734: unsigned P1DC6 :1;
3474[; ;pic12f1840.h: 3735: unsigned P1RSEN :1;
3475[; ;pic12f1840.h: 3736: };
3476[; ;pic12f1840.h: 3737: struct {
3477[; ;pic12f1840.h: 3738: unsigned P1DC :7;
3478[; ;pic12f1840.h: 3739: };
3479[; ;pic12f1840.h: 3740: } PWM1CONbits_t;
3480[; ;pic12f1840.h: 3741: extern volatile PWM1CONbits_t PWM1CONbits @ 0x294;
3481[; ;pic12f1840.h: 3790: extern volatile unsigned char CCP1AS @ 0x295;
3482"3792
3483[; ;pic12f1840.h: 3792: asm("CCP1AS equ 0295h");
3484[; <" CCP1AS equ 0295h ;# ">
3485[; ;pic12f1840.h: 3795: extern volatile unsigned char ECCP1AS @ 0x295;
3486"3797
3487[; ;pic12f1840.h: 3797: asm("ECCP1AS equ 0295h");
3488[; <" ECCP1AS equ 0295h ;# ">
3489[; ;pic12f1840.h: 3800: typedef union {
3490[; ;pic12f1840.h: 3801: struct {
3491[; ;pic12f1840.h: 3802: unsigned PSS1BD0 :1;
3492[; ;pic12f1840.h: 3803: unsigned PSS1BD1 :1;
3493[; ;pic12f1840.h: 3804: unsigned PSS1AC0 :1;
3494[; ;pic12f1840.h: 3805: unsigned PSS1AC1 :1;
3495[; ;pic12f1840.h: 3806: unsigned CCP1AS0 :1;
3496[; ;pic12f1840.h: 3807: unsigned CCP1AS1 :1;
3497[; ;pic12f1840.h: 3808: unsigned CCP1AS2 :1;
3498[; ;pic12f1840.h: 3809: unsigned CCP1ASE :1;
3499[; ;pic12f1840.h: 3810: };
3500[; ;pic12f1840.h: 3811: struct {
3501[; ;pic12f1840.h: 3812: unsigned PSS1BD :2;
3502[; ;pic12f1840.h: 3813: unsigned PSS1AC :2;
3503[; ;pic12f1840.h: 3814: unsigned CCP1AS :3;
3504[; ;pic12f1840.h: 3815: };
3505[; ;pic12f1840.h: 3816: } CCP1ASbits_t;
3506[; ;pic12f1840.h: 3817: extern volatile CCP1ASbits_t CCP1ASbits @ 0x295;
3507[; ;pic12f1840.h: 3875: typedef union {
3508[; ;pic12f1840.h: 3876: struct {
3509[; ;pic12f1840.h: 3877: unsigned PSS1BD0 :1;
3510[; ;pic12f1840.h: 3878: unsigned PSS1BD1 :1;
3511[; ;pic12f1840.h: 3879: unsigned PSS1AC0 :1;
3512[; ;pic12f1840.h: 3880: unsigned PSS1AC1 :1;
3513[; ;pic12f1840.h: 3881: unsigned CCP1AS0 :1;
3514[; ;pic12f1840.h: 3882: unsigned CCP1AS1 :1;
3515[; ;pic12f1840.h: 3883: unsigned CCP1AS2 :1;
3516[; ;pic12f1840.h: 3884: unsigned CCP1ASE :1;
3517[; ;pic12f1840.h: 3885: };
3518[; ;pic12f1840.h: 3886: struct {
3519[; ;pic12f1840.h: 3887: unsigned PSS1BD :2;
3520[; ;pic12f1840.h: 3888: unsigned PSS1AC :2;
3521[; ;pic12f1840.h: 3889: unsigned CCP1AS :3;
3522[; ;pic12f1840.h: 3890: };
3523[; ;pic12f1840.h: 3891: } ECCP1ASbits_t;
3524[; ;pic12f1840.h: 3892: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0x295;
3525[; ;pic12f1840.h: 3951: extern volatile unsigned char PSTR1CON @ 0x296;
3526"3953
3527[; ;pic12f1840.h: 3953: asm("PSTR1CON equ 0296h");
3528[; <" PSTR1CON equ 0296h ;# ">
3529[; ;pic12f1840.h: 3956: typedef union {
3530[; ;pic12f1840.h: 3957: struct {
3531[; ;pic12f1840.h: 3958: unsigned STR1A :1;
3532[; ;pic12f1840.h: 3959: unsigned STR1B :1;
3533[; ;pic12f1840.h: 3960: unsigned :1;
3534[; ;pic12f1840.h: 3961: unsigned :1;
3535[; ;pic12f1840.h: 3962: unsigned STR1SYNC :1;
3536[; ;pic12f1840.h: 3963: };
3537[; ;pic12f1840.h: 3964: } PSTR1CONbits_t;
3538[; ;pic12f1840.h: 3965: extern volatile PSTR1CONbits_t PSTR1CONbits @ 0x296;
3539[; ;pic12f1840.h: 3984: extern volatile unsigned char IOCAP @ 0x391;
3540"3986
3541[; ;pic12f1840.h: 3986: asm("IOCAP equ 0391h");
3542[; <" IOCAP equ 0391h ;# ">
3543[; ;pic12f1840.h: 3989: typedef union {
3544[; ;pic12f1840.h: 3990: struct {
3545[; ;pic12f1840.h: 3991: unsigned IOCAP0 :1;
3546[; ;pic12f1840.h: 3992: unsigned IOCAP1 :1;
3547[; ;pic12f1840.h: 3993: unsigned IOCAP2 :1;
3548[; ;pic12f1840.h: 3994: unsigned IOCAP3 :1;
3549[; ;pic12f1840.h: 3995: unsigned IOCAP4 :1;
3550[; ;pic12f1840.h: 3996: unsigned IOCAP5 :1;
3551[; ;pic12f1840.h: 3997: };
3552[; ;pic12f1840.h: 3998: struct {
3553[; ;pic12f1840.h: 3999: unsigned IOCAP :6;
3554[; ;pic12f1840.h: 4000: };
3555[; ;pic12f1840.h: 4001: } IOCAPbits_t;
3556[; ;pic12f1840.h: 4002: extern volatile IOCAPbits_t IOCAPbits @ 0x391;
3557[; ;pic12f1840.h: 4041: extern volatile unsigned char IOCAN @ 0x392;
3558"4043
3559[; ;pic12f1840.h: 4043: asm("IOCAN equ 0392h");
3560[; <" IOCAN equ 0392h ;# ">
3561[; ;pic12f1840.h: 4046: typedef union {
3562[; ;pic12f1840.h: 4047: struct {
3563[; ;pic12f1840.h: 4048: unsigned IOCAN0 :1;
3564[; ;pic12f1840.h: 4049: unsigned IOCAN1 :1;
3565[; ;pic12f1840.h: 4050: unsigned IOCAN2 :1;
3566[; ;pic12f1840.h: 4051: unsigned IOCAN3 :1;
3567[; ;pic12f1840.h: 4052: unsigned IOCAN4 :1;
3568[; ;pic12f1840.h: 4053: unsigned IOCAN5 :1;
3569[; ;pic12f1840.h: 4054: };
3570[; ;pic12f1840.h: 4055: struct {
3571[; ;pic12f1840.h: 4056: unsigned IOCAN :6;
3572[; ;pic12f1840.h: 4057: };
3573[; ;pic12f1840.h: 4058: } IOCANbits_t;
3574[; ;pic12f1840.h: 4059: extern volatile IOCANbits_t IOCANbits @ 0x392;
3575[; ;pic12f1840.h: 4098: extern volatile unsigned char IOCAF @ 0x393;
3576"4100
3577[; ;pic12f1840.h: 4100: asm("IOCAF equ 0393h");
3578[; <" IOCAF equ 0393h ;# ">
3579[; ;pic12f1840.h: 4103: typedef union {
3580[; ;pic12f1840.h: 4104: struct {
3581[; ;pic12f1840.h: 4105: unsigned IOCAF0 :1;
3582[; ;pic12f1840.h: 4106: unsigned IOCAF1 :1;
3583[; ;pic12f1840.h: 4107: unsigned IOCAF2 :1;
3584[; ;pic12f1840.h: 4108: unsigned IOCAF3 :1;
3585[; ;pic12f1840.h: 4109: unsigned IOCAF4 :1;
3586[; ;pic12f1840.h: 4110: unsigned IOCAF5 :1;
3587[; ;pic12f1840.h: 4111: };
3588[; ;pic12f1840.h: 4112: struct {
3589[; ;pic12f1840.h: 4113: unsigned IOCAF :6;
3590[; ;pic12f1840.h: 4114: };
3591[; ;pic12f1840.h: 4115: } IOCAFbits_t;
3592[; ;pic12f1840.h: 4116: extern volatile IOCAFbits_t IOCAFbits @ 0x393;
3593[; ;pic12f1840.h: 4155: extern volatile unsigned char CLKRCON @ 0x39A;
3594"4157
3595[; ;pic12f1840.h: 4157: asm("CLKRCON equ 039Ah");
3596[; <" CLKRCON equ 039Ah ;# ">
3597[; ;pic12f1840.h: 4160: typedef union {
3598[; ;pic12f1840.h: 4161: struct {
3599[; ;pic12f1840.h: 4162: unsigned CLKRDIV0 :1;
3600[; ;pic12f1840.h: 4163: unsigned CLKRDIV1 :1;
3601[; ;pic12f1840.h: 4164: unsigned CLKRDIV2 :1;
3602[; ;pic12f1840.h: 4165: unsigned CLKRDC0 :1;
3603[; ;pic12f1840.h: 4166: unsigned CLKRDC1 :1;
3604[; ;pic12f1840.h: 4167: unsigned CLKRSLR :1;
3605[; ;pic12f1840.h: 4168: unsigned CLKROE :1;
3606[; ;pic12f1840.h: 4169: unsigned CLKREN :1;
3607[; ;pic12f1840.h: 4170: };
3608[; ;pic12f1840.h: 4171: struct {
3609[; ;pic12f1840.h: 4172: unsigned CLKRDIV :3;
3610[; ;pic12f1840.h: 4173: unsigned CLKRDC :2;
3611[; ;pic12f1840.h: 4174: };
3612[; ;pic12f1840.h: 4175: } CLKRCONbits_t;
3613[; ;pic12f1840.h: 4176: extern volatile CLKRCONbits_t CLKRCONbits @ 0x39A;
3614[; ;pic12f1840.h: 4230: extern volatile unsigned char MDCON @ 0x39C;
3615"4232
3616[; ;pic12f1840.h: 4232: asm("MDCON equ 039Ch");
3617[; <" MDCON equ 039Ch ;# ">
3618[; ;pic12f1840.h: 4235: typedef union {
3619[; ;pic12f1840.h: 4236: struct {
3620[; ;pic12f1840.h: 4237: unsigned MDBIT :1;
3621[; ;pic12f1840.h: 4238: unsigned :2;
3622[; ;pic12f1840.h: 4239: unsigned MDOUT :1;
3623[; ;pic12f1840.h: 4240: unsigned MDOPOL :1;
3624[; ;pic12f1840.h: 4241: unsigned MDSLR :1;
3625[; ;pic12f1840.h: 4242: unsigned MDOE :1;
3626[; ;pic12f1840.h: 4243: unsigned MDEN :1;
3627[; ;pic12f1840.h: 4244: };
3628[; ;pic12f1840.h: 4245: } MDCONbits_t;
3629[; ;pic12f1840.h: 4246: extern volatile MDCONbits_t MDCONbits @ 0x39C;
3630[; ;pic12f1840.h: 4280: extern volatile unsigned char MDSRC @ 0x39D;
3631"4282
3632[; ;pic12f1840.h: 4282: asm("MDSRC equ 039Dh");
3633[; <" MDSRC equ 039Dh ;# ">
3634[; ;pic12f1840.h: 4285: typedef union {
3635[; ;pic12f1840.h: 4286: struct {
3636[; ;pic12f1840.h: 4287: unsigned MDMS0 :1;
3637[; ;pic12f1840.h: 4288: unsigned MDMS1 :1;
3638[; ;pic12f1840.h: 4289: unsigned MDMS2 :1;
3639[; ;pic12f1840.h: 4290: unsigned MDMS3 :1;
3640[; ;pic12f1840.h: 4291: unsigned :3;
3641[; ;pic12f1840.h: 4292: unsigned MDMSODIS :1;
3642[; ;pic12f1840.h: 4293: };
3643[; ;pic12f1840.h: 4294: struct {
3644[; ;pic12f1840.h: 4295: unsigned MDMS :4;
3645[; ;pic12f1840.h: 4296: };
3646[; ;pic12f1840.h: 4297: } MDSRCbits_t;
3647[; ;pic12f1840.h: 4298: extern volatile MDSRCbits_t MDSRCbits @ 0x39D;
3648[; ;pic12f1840.h: 4332: extern volatile unsigned char MDCARL @ 0x39E;
3649"4334
3650[; ;pic12f1840.h: 4334: asm("MDCARL equ 039Eh");
3651[; <" MDCARL equ 039Eh ;# ">
3652[; ;pic12f1840.h: 4337: typedef union {
3653[; ;pic12f1840.h: 4338: struct {
3654[; ;pic12f1840.h: 4339: unsigned MDCL0 :1;
3655[; ;pic12f1840.h: 4340: unsigned MDCL1 :1;
3656[; ;pic12f1840.h: 4341: unsigned MDCL2 :1;
3657[; ;pic12f1840.h: 4342: unsigned MDCL3 :1;
3658[; ;pic12f1840.h: 4343: unsigned :1;
3659[; ;pic12f1840.h: 4344: unsigned MDCLSYNC :1;
3660[; ;pic12f1840.h: 4345: unsigned MDCLPOL :1;
3661[; ;pic12f1840.h: 4346: unsigned MDCLODIS :1;
3662[; ;pic12f1840.h: 4347: };
3663[; ;pic12f1840.h: 4348: struct {
3664[; ;pic12f1840.h: 4349: unsigned MDCL :4;
3665[; ;pic12f1840.h: 4350: };
3666[; ;pic12f1840.h: 4351: } MDCARLbits_t;
3667[; ;pic12f1840.h: 4352: extern volatile MDCARLbits_t MDCARLbits @ 0x39E;
3668[; ;pic12f1840.h: 4396: extern volatile unsigned char MDCARH @ 0x39F;
3669"4398
3670[; ;pic12f1840.h: 4398: asm("MDCARH equ 039Fh");
3671[; <" MDCARH equ 039Fh ;# ">
3672[; ;pic12f1840.h: 4401: typedef union {
3673[; ;pic12f1840.h: 4402: struct {
3674[; ;pic12f1840.h: 4403: unsigned MDCH0 :1;
3675[; ;pic12f1840.h: 4404: unsigned MDCH1 :1;
3676[; ;pic12f1840.h: 4405: unsigned MDCH2 :1;
3677[; ;pic12f1840.h: 4406: unsigned MDCH3 :1;
3678[; ;pic12f1840.h: 4407: unsigned :1;
3679[; ;pic12f1840.h: 4408: unsigned MDCHSYNC :1;
3680[; ;pic12f1840.h: 4409: unsigned MDCHPOL :1;
3681[; ;pic12f1840.h: 4410: unsigned MDCHODIS :1;
3682[; ;pic12f1840.h: 4411: };
3683[; ;pic12f1840.h: 4412: struct {
3684[; ;pic12f1840.h: 4413: unsigned MDCH :4;
3685[; ;pic12f1840.h: 4414: };
3686[; ;pic12f1840.h: 4415: } MDCARHbits_t;
3687[; ;pic12f1840.h: 4416: extern volatile MDCARHbits_t MDCARHbits @ 0x39F;
3688[; ;pic12f1840.h: 4460: extern volatile unsigned char STATUS_SHAD @ 0xFE4;
3689"4462
3690[; ;pic12f1840.h: 4462: asm("STATUS_SHAD equ 0FE4h");
3691[; <" STATUS_SHAD equ 0FE4h ;# ">
3692[; ;pic12f1840.h: 4465: typedef union {
3693[; ;pic12f1840.h: 4466: struct {
3694[; ;pic12f1840.h: 4467: unsigned C_SHAD :1;
3695[; ;pic12f1840.h: 4468: unsigned DC_SHAD :1;
3696[; ;pic12f1840.h: 4469: unsigned Z_SHAD :1;
3697[; ;pic12f1840.h: 4470: };
3698[; ;pic12f1840.h: 4471: } STATUS_SHADbits_t;
3699[; ;pic12f1840.h: 4472: extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
3700[; ;pic12f1840.h: 4491: extern volatile unsigned char WREG_SHAD @ 0xFE5;
3701"4493
3702[; ;pic12f1840.h: 4493: asm("WREG_SHAD equ 0FE5h");
3703[; <" WREG_SHAD equ 0FE5h ;# ">
3704[; ;pic12f1840.h: 4496: typedef union {
3705[; ;pic12f1840.h: 4497: struct {
3706[; ;pic12f1840.h: 4498: unsigned WREG_SHAD :8;
3707[; ;pic12f1840.h: 4499: };
3708[; ;pic12f1840.h: 4500: } WREG_SHADbits_t;
3709[; ;pic12f1840.h: 4501: extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
3710[; ;pic12f1840.h: 4510: extern volatile unsigned char BSR_SHAD @ 0xFE6;
3711"4512
3712[; ;pic12f1840.h: 4512: asm("BSR_SHAD equ 0FE6h");
3713[; <" BSR_SHAD equ 0FE6h ;# ">
3714[; ;pic12f1840.h: 4515: typedef union {
3715[; ;pic12f1840.h: 4516: struct {
3716[; ;pic12f1840.h: 4517: unsigned BSR_SHAD :5;
3717[; ;pic12f1840.h: 4518: };
3718[; ;pic12f1840.h: 4519: } BSR_SHADbits_t;
3719[; ;pic12f1840.h: 4520: extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
3720[; ;pic12f1840.h: 4529: extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
3721"4531
3722[; ;pic12f1840.h: 4531: asm("PCLATH_SHAD equ 0FE7h");
3723[; <" PCLATH_SHAD equ 0FE7h ;# ">
3724[; ;pic12f1840.h: 4534: typedef union {
3725[; ;pic12f1840.h: 4535: struct {
3726[; ;pic12f1840.h: 4536: unsigned PCLATH_SHAD :7;
3727[; ;pic12f1840.h: 4537: };
3728[; ;pic12f1840.h: 4538: } PCLATH_SHADbits_t;
3729[; ;pic12f1840.h: 4539: extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
3730[; ;pic12f1840.h: 4548: extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
3731"4550
3732[; ;pic12f1840.h: 4550: asm("FSR0L_SHAD equ 0FE8h");
3733[; <" FSR0L_SHAD equ 0FE8h ;# ">
3734[; ;pic12f1840.h: 4553: typedef union {
3735[; ;pic12f1840.h: 4554: struct {
3736[; ;pic12f1840.h: 4555: unsigned FSR0L_SHAD :8;
3737[; ;pic12f1840.h: 4556: };
3738[; ;pic12f1840.h: 4557: } FSR0L_SHADbits_t;
3739[; ;pic12f1840.h: 4558: extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
3740[; ;pic12f1840.h: 4567: extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
3741"4569
3742[; ;pic12f1840.h: 4569: asm("FSR0H_SHAD equ 0FE9h");
3743[; <" FSR0H_SHAD equ 0FE9h ;# ">
3744[; ;pic12f1840.h: 4572: typedef union {
3745[; ;pic12f1840.h: 4573: struct {
3746[; ;pic12f1840.h: 4574: unsigned FSR0H_SHAD :8;
3747[; ;pic12f1840.h: 4575: };
3748[; ;pic12f1840.h: 4576: } FSR0H_SHADbits_t;
3749[; ;pic12f1840.h: 4577: extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
3750[; ;pic12f1840.h: 4586: extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
3751"4588
3752[; ;pic12f1840.h: 4588: asm("FSR1L_SHAD equ 0FEAh");
3753[; <" FSR1L_SHAD equ 0FEAh ;# ">
3754[; ;pic12f1840.h: 4591: typedef union {
3755[; ;pic12f1840.h: 4592: struct {
3756[; ;pic12f1840.h: 4593: unsigned FSR1L_SHAD :8;
3757[; ;pic12f1840.h: 4594: };
3758[; ;pic12f1840.h: 4595: } FSR1L_SHADbits_t;
3759[; ;pic12f1840.h: 4596: extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
3760[; ;pic12f1840.h: 4605: extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
3761"4607
3762[; ;pic12f1840.h: 4607: asm("FSR1H_SHAD equ 0FEBh");
3763[; <" FSR1H_SHAD equ 0FEBh ;# ">
3764[; ;pic12f1840.h: 4610: typedef union {
3765[; ;pic12f1840.h: 4611: struct {
3766[; ;pic12f1840.h: 4612: unsigned FSR1H_SHAD :8;
3767[; ;pic12f1840.h: 4613: };
3768[; ;pic12f1840.h: 4614: } FSR1H_SHADbits_t;
3769[; ;pic12f1840.h: 4615: extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
3770[; ;pic12f1840.h: 4624: extern volatile unsigned char STKPTR @ 0xFED;
3771"4626
3772[; ;pic12f1840.h: 4626: asm("STKPTR equ 0FEDh");
3773[; <" STKPTR equ 0FEDh ;# ">
3774[; ;pic12f1840.h: 4629: typedef union {
3775[; ;pic12f1840.h: 4630: struct {
3776[; ;pic12f1840.h: 4631: unsigned STKPTR :5;
3777[; ;pic12f1840.h: 4632: };
3778[; ;pic12f1840.h: 4633: } STKPTRbits_t;
3779[; ;pic12f1840.h: 4634: extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
3780[; ;pic12f1840.h: 4643: extern volatile unsigned char TOSL @ 0xFEE;
3781"4645
3782[; ;pic12f1840.h: 4645: asm("TOSL equ 0FEEh");
3783[; <" TOSL equ 0FEEh ;# ">
3784[; ;pic12f1840.h: 4648: typedef union {
3785[; ;pic12f1840.h: 4649: struct {
3786[; ;pic12f1840.h: 4650: unsigned TOSL :8;
3787[; ;pic12f1840.h: 4651: };
3788[; ;pic12f1840.h: 4652: } TOSLbits_t;
3789[; ;pic12f1840.h: 4653: extern volatile TOSLbits_t TOSLbits @ 0xFEE;
3790[; ;pic12f1840.h: 4662: extern volatile unsigned char TOSH @ 0xFEF;
3791"4664
3792[; ;pic12f1840.h: 4664: asm("TOSH equ 0FEFh");
3793[; <" TOSH equ 0FEFh ;# ">
3794[; ;pic12f1840.h: 4667: typedef union {
3795[; ;pic12f1840.h: 4668: struct {
3796[; ;pic12f1840.h: 4669: unsigned TOSH :7;
3797[; ;pic12f1840.h: 4670: };
3798[; ;pic12f1840.h: 4671: } TOSHbits_t;
3799[; ;pic12f1840.h: 4672: extern volatile TOSHbits_t TOSHbits @ 0xFEF;
3800[; ;pic12f1840.h: 4687: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
3801[; ;pic12f1840.h: 4689: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
3802[; ;pic12f1840.h: 4691: extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
3803[; ;pic12f1840.h: 4693: extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
3804[; ;pic12f1840.h: 4695: extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
3805[; ;pic12f1840.h: 4697: extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
3806[; ;pic12f1840.h: 4699: extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 4;
3807[; ;pic12f1840.h: 4701: extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 5;
3808[; ;pic12f1840.h: 4703: extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
3809[; ;pic12f1840.h: 4705: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
3810[; ;pic12f1840.h: 4707: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
3811[; ;pic12f1840.h: 4709: extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
3812[; ;pic12f1840.h: 4711: extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
3813[; ;pic12f1840.h: 4713: extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
3814[; ;pic12f1840.h: 4715: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
3815[; ;pic12f1840.h: 4717: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
3816[; ;pic12f1840.h: 4719: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
3817[; ;pic12f1840.h: 4721: extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
3818[; ;pic12f1840.h: 4723: extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
3819[; ;pic12f1840.h: 4725: extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
3820[; ;pic12f1840.h: 4727: extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
3821[; ;pic12f1840.h: 4729: extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
3822[; ;pic12f1840.h: 4731: extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
3823[; ;pic12f1840.h: 4733: extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
3824[; ;pic12f1840.h: 4735: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
3825[; ;pic12f1840.h: 4737: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
3826[; ;pic12f1840.h: 4739: extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
3827[; ;pic12f1840.h: 4741: extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
3828[; ;pic12f1840.h: 4743: extern volatile __bit BORFS @ (((unsigned) &BORCON)*8) + 6;
3829[; ;pic12f1840.h: 4745: extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
3830[; ;pic12f1840.h: 4747: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
3831[; ;pic12f1840.h: 4749: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
3832[; ;pic12f1840.h: 4751: extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
3833[; ;pic12f1840.h: 4753: extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
3834[; ;pic12f1840.h: 4755: extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
3835[; ;pic12f1840.h: 4757: extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
3836[; ;pic12f1840.h: 4759: extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
3837[; ;pic12f1840.h: 4761: extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
3838[; ;pic12f1840.h: 4763: extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
3839[; ;pic12f1840.h: 4765: extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
3840[; ;pic12f1840.h: 4767: extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
3841[; ;pic12f1840.h: 4769: extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
3842[; ;pic12f1840.h: 4771: extern volatile __bit C1NCH @ (((unsigned) &CM1CON1)*8) + 0;
3843[; ;pic12f1840.h: 4773: extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
3844[; ;pic12f1840.h: 4775: extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
3845[; ;pic12f1840.h: 4777: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
3846[; ;pic12f1840.h: 4779: extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 6;
3847[; ;pic12f1840.h: 4781: extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
3848[; ;pic12f1840.h: 4783: extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
3849[; ;pic12f1840.h: 4785: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
3850[; ;pic12f1840.h: 4787: extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
3851[; ;pic12f1840.h: 4789: extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
3852[; ;pic12f1840.h: 4791: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
3853[; ;pic12f1840.h: 4793: extern volatile __bit CCP1AS0 @ (((unsigned) &CCP1AS)*8) + 4;
3854[; ;pic12f1840.h: 4795: extern volatile __bit CCP1AS1 @ (((unsigned) &CCP1AS)*8) + 5;
3855[; ;pic12f1840.h: 4797: extern volatile __bit CCP1AS2 @ (((unsigned) &CCP1AS)*8) + 6;
3856[; ;pic12f1840.h: 4799: extern volatile __bit CCP1ASE @ (((unsigned) &CCP1AS)*8) + 7;
3857[; ;pic12f1840.h: 4801: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
3858[; ;pic12f1840.h: 4803: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
3859[; ;pic12f1840.h: 4805: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
3860[; ;pic12f1840.h: 4807: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
3861[; ;pic12f1840.h: 4809: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
3862[; ;pic12f1840.h: 4811: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
3863[; ;pic12f1840.h: 4813: extern volatile __bit CCP1SEL @ (((unsigned) &APFCON)*8) + 0;
3864[; ;pic12f1840.h: 4815: extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
3865[; ;pic12f1840.h: 4817: extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
3866[; ;pic12f1840.h: 4819: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;
3867[; ;pic12f1840.h: 4821: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
3868[; ;pic12f1840.h: 4823: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
3869[; ;pic12f1840.h: 4825: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
3870[; ;pic12f1840.h: 4827: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
3871[; ;pic12f1840.h: 4829: extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
3872[; ;pic12f1840.h: 4831: extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
3873[; ;pic12f1840.h: 4833: extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
3874[; ;pic12f1840.h: 4835: extern volatile __bit CLKRDC0 @ (((unsigned) &CLKRCON)*8) + 3;
3875[; ;pic12f1840.h: 4837: extern volatile __bit CLKRDC1 @ (((unsigned) &CLKRCON)*8) + 4;
3876[; ;pic12f1840.h: 4839: extern volatile __bit CLKRDIV0 @ (((unsigned) &CLKRCON)*8) + 0;
3877[; ;pic12f1840.h: 4841: extern volatile __bit CLKRDIV1 @ (((unsigned) &CLKRCON)*8) + 1;
3878[; ;pic12f1840.h: 4843: extern volatile __bit CLKRDIV2 @ (((unsigned) &CLKRCON)*8) + 2;
3879[; ;pic12f1840.h: 4845: extern volatile __bit CLKREN @ (((unsigned) &CLKRCON)*8) + 7;
3880[; ;pic12f1840.h: 4847: extern volatile __bit CLKROE @ (((unsigned) &CLKRCON)*8) + 6;
3881[; ;pic12f1840.h: 4849: extern volatile __bit CLKRSLR @ (((unsigned) &CLKRCON)*8) + 5;
3882[; ;pic12f1840.h: 4851: extern volatile __bit CPSCH0 @ (((unsigned) &CPSCON1)*8) + 0;
3883[; ;pic12f1840.h: 4853: extern volatile __bit CPSCH1 @ (((unsigned) &CPSCON1)*8) + 1;
3884[; ;pic12f1840.h: 4855: extern volatile __bit CPSON @ (((unsigned) &CPSCON0)*8) + 7;
3885[; ;pic12f1840.h: 4857: extern volatile __bit CPSOUT @ (((unsigned) &CPSCON0)*8) + 1;
3886[; ;pic12f1840.h: 4859: extern volatile __bit CPSRM @ (((unsigned) &CPSCON0)*8) + 6;
3887[; ;pic12f1840.h: 4861: extern volatile __bit CPSRNG0 @ (((unsigned) &CPSCON0)*8) + 2;
3888[; ;pic12f1840.h: 4863: extern volatile __bit CPSRNG1 @ (((unsigned) &CPSCON0)*8) + 3;
3889[; ;pic12f1840.h: 4865: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
3890[; ;pic12f1840.h: 4867: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
3891[; ;pic12f1840.h: 4869: extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
3892[; ;pic12f1840.h: 4871: extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
3893[; ;pic12f1840.h: 4873: extern volatile __bit DACLPS @ (((unsigned) &DACCON0)*8) + 6;
3894[; ;pic12f1840.h: 4875: extern volatile __bit DACOE @ (((unsigned) &DACCON0)*8) + 5;
3895[; ;pic12f1840.h: 4877: extern volatile __bit DACPSS0 @ (((unsigned) &DACCON0)*8) + 2;
3896[; ;pic12f1840.h: 4879: extern volatile __bit DACPSS1 @ (((unsigned) &DACCON0)*8) + 3;
3897[; ;pic12f1840.h: 4881: extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
3898[; ;pic12f1840.h: 4883: extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
3899[; ;pic12f1840.h: 4885: extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
3900[; ;pic12f1840.h: 4887: extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
3901[; ;pic12f1840.h: 4889: extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
3902[; ;pic12f1840.h: 4891: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
3903[; ;pic12f1840.h: 4893: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
3904[; ;pic12f1840.h: 4895: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
3905[; ;pic12f1840.h: 4897: extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
3906[; ;pic12f1840.h: 4899: extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
3907[; ;pic12f1840.h: 4901: extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
3908[; ;pic12f1840.h: 4903: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;
3909[; ;pic12f1840.h: 4905: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;
3910[; ;pic12f1840.h: 4907: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
3911[; ;pic12f1840.h: 4909: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
3912[; ;pic12f1840.h: 4911: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
3913[; ;pic12f1840.h: 4913: extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
3914[; ;pic12f1840.h: 4915: extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
3915[; ;pic12f1840.h: 4917: extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
3916[; ;pic12f1840.h: 4919: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
3917[; ;pic12f1840.h: 4921: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
3918[; ;pic12f1840.h: 4923: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
3919[; ;pic12f1840.h: 4925: extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
3920[; ;pic12f1840.h: 4927: extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
3921[; ;pic12f1840.h: 4929: extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
3922[; ;pic12f1840.h: 4931: extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
3923[; ;pic12f1840.h: 4933: extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
3924[; ;pic12f1840.h: 4935: extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
3925[; ;pic12f1840.h: 4937: extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
3926[; ;pic12f1840.h: 4939: extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
3927[; ;pic12f1840.h: 4941: extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
3928[; ;pic12f1840.h: 4943: extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
3929[; ;pic12f1840.h: 4945: extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
3930[; ;pic12f1840.h: 4947: extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
3931[; ;pic12f1840.h: 4949: extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
3932[; ;pic12f1840.h: 4951: extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
3933[; ;pic12f1840.h: 4953: extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
3934[; ;pic12f1840.h: 4955: extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
3935[; ;pic12f1840.h: 4957: extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
3936[; ;pic12f1840.h: 4959: extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
3937[; ;pic12f1840.h: 4961: extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
3938[; ;pic12f1840.h: 4963: extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
3939[; ;pic12f1840.h: 4965: extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
3940[; ;pic12f1840.h: 4967: extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
3941[; ;pic12f1840.h: 4969: extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
3942[; ;pic12f1840.h: 4971: extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
3943[; ;pic12f1840.h: 4973: extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
3944[; ;pic12f1840.h: 4975: extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
3945[; ;pic12f1840.h: 4977: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
3946[; ;pic12f1840.h: 4979: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
3947[; ;pic12f1840.h: 4981: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
3948[; ;pic12f1840.h: 4983: extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
3949[; ;pic12f1840.h: 4985: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
3950[; ;pic12f1840.h: 4987: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
3951[; ;pic12f1840.h: 4989: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
3952[; ;pic12f1840.h: 4991: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
3953[; ;pic12f1840.h: 4993: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
3954[; ;pic12f1840.h: 4995: extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
3955[; ;pic12f1840.h: 4997: extern volatile __bit LWLO @ (((unsigned) &EECON1)*8) + 5;
3956[; ;pic12f1840.h: 4999: extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
3957[; ;pic12f1840.h: 5001: extern volatile __bit MDBIT @ (((unsigned) &MDCON)*8) + 0;
3958[; ;pic12f1840.h: 5003: extern volatile __bit MDCH0 @ (((unsigned) &MDCARH)*8) + 0;
3959[; ;pic12f1840.h: 5005: extern volatile __bit MDCH1 @ (((unsigned) &MDCARH)*8) + 1;
3960[; ;pic12f1840.h: 5007: extern volatile __bit MDCH2 @ (((unsigned) &MDCARH)*8) + 2;
3961[; ;pic12f1840.h: 5009: extern volatile __bit MDCH3 @ (((unsigned) &MDCARH)*8) + 3;
3962[; ;pic12f1840.h: 5011: extern volatile __bit MDCHODIS @ (((unsigned) &MDCARH)*8) + 7;
3963[; ;pic12f1840.h: 5013: extern volatile __bit MDCHPOL @ (((unsigned) &MDCARH)*8) + 6;
3964[; ;pic12f1840.h: 5015: extern volatile __bit MDCHSYNC @ (((unsigned) &MDCARH)*8) + 5;
3965[; ;pic12f1840.h: 5017: extern volatile __bit MDCL0 @ (((unsigned) &MDCARL)*8) + 0;
3966[; ;pic12f1840.h: 5019: extern volatile __bit MDCL1 @ (((unsigned) &MDCARL)*8) + 1;
3967[; ;pic12f1840.h: 5021: extern volatile __bit MDCL2 @ (((unsigned) &MDCARL)*8) + 2;
3968[; ;pic12f1840.h: 5023: extern volatile __bit MDCL3 @ (((unsigned) &MDCARL)*8) + 3;
3969[; ;pic12f1840.h: 5025: extern volatile __bit MDCLODIS @ (((unsigned) &MDCARL)*8) + 7;
3970[; ;pic12f1840.h: 5027: extern volatile __bit MDCLPOL @ (((unsigned) &MDCARL)*8) + 6;
3971[; ;pic12f1840.h: 5029: extern volatile __bit MDCLSYNC @ (((unsigned) &MDCARL)*8) + 5;
3972[; ;pic12f1840.h: 5031: extern volatile __bit MDEN @ (((unsigned) &MDCON)*8) + 7;
3973[; ;pic12f1840.h: 5033: extern volatile __bit MDMS0 @ (((unsigned) &MDSRC)*8) + 0;
3974[; ;pic12f1840.h: 5035: extern volatile __bit MDMS1 @ (((unsigned) &MDSRC)*8) + 1;
3975[; ;pic12f1840.h: 5037: extern volatile __bit MDMS2 @ (((unsigned) &MDSRC)*8) + 2;
3976[; ;pic12f1840.h: 5039: extern volatile __bit MDMS3 @ (((unsigned) &MDSRC)*8) + 3;
3977[; ;pic12f1840.h: 5041: extern volatile __bit MDMSODIS @ (((unsigned) &MDSRC)*8) + 7;
3978[; ;pic12f1840.h: 5043: extern volatile __bit MDOE @ (((unsigned) &MDCON)*8) + 6;
3979[; ;pic12f1840.h: 5045: extern volatile __bit MDOPOL @ (((unsigned) &MDCON)*8) + 4;
3980[; ;pic12f1840.h: 5047: extern volatile __bit MDOUT @ (((unsigned) &MDCON)*8) + 3;
3981[; ;pic12f1840.h: 5049: extern volatile __bit MDSLR @ (((unsigned) &MDCON)*8) + 5;
3982[; ;pic12f1840.h: 5051: extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
3983[; ;pic12f1840.h: 5053: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
3984[; ;pic12f1840.h: 5055: extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
3985[; ;pic12f1840.h: 5057: extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
3986[; ;pic12f1840.h: 5059: extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
3987[; ;pic12f1840.h: 5061: extern volatile __bit P1BSEL @ (((unsigned) &APFCON)*8) + 1;
3988[; ;pic12f1840.h: 5063: extern volatile __bit P1DC0 @ (((unsigned) &PWM1CON)*8) + 0;
3989[; ;pic12f1840.h: 5065: extern volatile __bit P1DC1 @ (((unsigned) &PWM1CON)*8) + 1;
3990[; ;pic12f1840.h: 5067: extern volatile __bit P1DC2 @ (((unsigned) &PWM1CON)*8) + 2;
3991[; ;pic12f1840.h: 5069: extern volatile __bit P1DC3 @ (((unsigned) &PWM1CON)*8) + 3;
3992[; ;pic12f1840.h: 5071: extern volatile __bit P1DC4 @ (((unsigned) &PWM1CON)*8) + 4;
3993[; ;pic12f1840.h: 5073: extern volatile __bit P1DC5 @ (((unsigned) &PWM1CON)*8) + 5;
3994[; ;pic12f1840.h: 5075: extern volatile __bit P1DC6 @ (((unsigned) &PWM1CON)*8) + 6;
3995[; ;pic12f1840.h: 5077: extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
3996[; ;pic12f1840.h: 5079: extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
3997[; ;pic12f1840.h: 5081: extern volatile __bit P1RSEN @ (((unsigned) &PWM1CON)*8) + 7;
3998[; ;pic12f1840.h: 5083: extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
3999[; ;pic12f1840.h: 5085: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
4000[; ;pic12f1840.h: 5087: extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
4001[; ;pic12f1840.h: 5089: extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
4002[; ;pic12f1840.h: 5091: extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
4003[; ;pic12f1840.h: 5093: extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
4004[; ;pic12f1840.h: 5095: extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
4005[; ;pic12f1840.h: 5097: extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
4006[; ;pic12f1840.h: 5099: extern volatile __bit PSS1AC0 @ (((unsigned) &CCP1AS)*8) + 2;
4007[; ;pic12f1840.h: 5101: extern volatile __bit PSS1AC1 @ (((unsigned) &CCP1AS)*8) + 3;
4008[; ;pic12f1840.h: 5103: extern volatile __bit PSS1BD0 @ (((unsigned) &CCP1AS)*8) + 0;
4009[; ;pic12f1840.h: 5105: extern volatile __bit PSS1BD1 @ (((unsigned) &CCP1AS)*8) + 1;
4010[; ;pic12f1840.h: 5107: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
4011[; ;pic12f1840.h: 5109: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
4012[; ;pic12f1840.h: 5111: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
4013[; ;pic12f1840.h: 5113: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
4014[; ;pic12f1840.h: 5115: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
4015[; ;pic12f1840.h: 5117: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
4016[; ;pic12f1840.h: 5119: extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
4017[; ;pic12f1840.h: 5121: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
4018[; ;pic12f1840.h: 5123: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
4019[; ;pic12f1840.h: 5125: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
4020[; ;pic12f1840.h: 5127: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;
4021[; ;pic12f1840.h: 5129: extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
4022[; ;pic12f1840.h: 5131: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
4023[; ;pic12f1840.h: 5133: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
4024[; ;pic12f1840.h: 5135: extern volatile __bit RXDTSEL @ (((unsigned) &APFCON)*8) + 7;
4025[; ;pic12f1840.h: 5137: extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
4026[; ;pic12f1840.h: 5139: extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
4027[; ;pic12f1840.h: 5141: extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
4028[; ;pic12f1840.h: 5143: extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
4029[; ;pic12f1840.h: 5145: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
4030[; ;pic12f1840.h: 5147: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
4031[; ;pic12f1840.h: 5149: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
4032[; ;pic12f1840.h: 5151: extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
4033[; ;pic12f1840.h: 5153: extern volatile __bit SDO1SEL @ (((unsigned) &APFCON)*8) + 6;
4034[; ;pic12f1840.h: 5155: extern volatile __bit SDOSEL @ (((unsigned) &APFCON)*8) + 6;
4035[; ;pic12f1840.h: 5157: extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
4036[; ;pic12f1840.h: 5159: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
4037[; ;pic12f1840.h: 5161: extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
4038[; ;pic12f1840.h: 5163: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
4039[; ;pic12f1840.h: 5165: extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
4040[; ;pic12f1840.h: 5167: extern volatile __bit SRCLK0 @ (((unsigned) &SRCON0)*8) + 4;
4041[; ;pic12f1840.h: 5169: extern volatile __bit SRCLK1 @ (((unsigned) &SRCON0)*8) + 5;
4042[; ;pic12f1840.h: 5171: extern volatile __bit SRCLK2 @ (((unsigned) &SRCON0)*8) + 6;
4043[; ;pic12f1840.h: 5173: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
4044[; ;pic12f1840.h: 5175: extern volatile __bit SRLEN @ (((unsigned) &SRCON0)*8) + 7;
4045[; ;pic12f1840.h: 5177: extern volatile __bit SRNQEN @ (((unsigned) &SRCON0)*8) + 2;
4046[; ;pic12f1840.h: 5179: extern volatile __bit SRPR @ (((unsigned) &SRCON0)*8) + 0;
4047[; ;pic12f1840.h: 5181: extern volatile __bit SRPS @ (((unsigned) &SRCON0)*8) + 1;
4048[; ;pic12f1840.h: 5183: extern volatile __bit SRQEN @ (((unsigned) &SRCON0)*8) + 3;
4049[; ;pic12f1840.h: 5185: extern volatile __bit SRRC1E @ (((unsigned) &SRCON1)*8) + 0;
4050[; ;pic12f1840.h: 5187: extern volatile __bit SRRCKE @ (((unsigned) &SRCON1)*8) + 2;
4051[; ;pic12f1840.h: 5189: extern volatile __bit SRRPE @ (((unsigned) &SRCON1)*8) + 3;
4052[; ;pic12f1840.h: 5191: extern volatile __bit SRSC1E @ (((unsigned) &SRCON1)*8) + 4;
4053[; ;pic12f1840.h: 5193: extern volatile __bit SRSCKE @ (((unsigned) &SRCON1)*8) + 6;
4054[; ;pic12f1840.h: 5195: extern volatile __bit SRSPE @ (((unsigned) &SRCON1)*8) + 7;
4055[; ;pic12f1840.h: 5197: extern volatile __bit SS1SEL @ (((unsigned) &APFCON)*8) + 5;
4056[; ;pic12f1840.h: 5199: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
4057[; ;pic12f1840.h: 5201: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
4058[; ;pic12f1840.h: 5203: extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
4059[; ;pic12f1840.h: 5205: extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
4060[; ;pic12f1840.h: 5207: extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
4061[; ;pic12f1840.h: 5209: extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
4062[; ;pic12f1840.h: 5211: extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
4063[; ;pic12f1840.h: 5213: extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
4064[; ;pic12f1840.h: 5215: extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 5;
4065[; ;pic12f1840.h: 5217: extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
4066[; ;pic12f1840.h: 5219: extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
4067[; ;pic12f1840.h: 5221: extern volatile __bit STR1A @ (((unsigned) &PSTR1CON)*8) + 0;
4068[; ;pic12f1840.h: 5223: extern volatile __bit STR1B @ (((unsigned) &PSTR1CON)*8) + 1;
4069[; ;pic12f1840.h: 5225: extern volatile __bit STR1SYNC @ (((unsigned) &PSTR1CON)*8) + 4;
4070[; ;pic12f1840.h: 5227: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
4071[; ;pic12f1840.h: 5229: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
4072[; ;pic12f1840.h: 5231: extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
4073[; ;pic12f1840.h: 5233: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
4074[; ;pic12f1840.h: 5235: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
4075[; ;pic12f1840.h: 5237: extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
4076[; ;pic12f1840.h: 5239: extern volatile __bit T0XCS @ (((unsigned) &CPSCON0)*8) + 0;
4077[; ;pic12f1840.h: 5241: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
4078[; ;pic12f1840.h: 5243: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
4079[; ;pic12f1840.h: 5245: extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
4080[; ;pic12f1840.h: 5247: extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
4081[; ;pic12f1840.h: 5249: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
4082[; ;pic12f1840.h: 5251: extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
4083[; ;pic12f1840.h: 5253: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
4084[; ;pic12f1840.h: 5255: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
4085[; ;pic12f1840.h: 5257: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
4086[; ;pic12f1840.h: 5259: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
4087[; ;pic12f1840.h: 5261: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
4088[; ;pic12f1840.h: 5263: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
4089[; ;pic12f1840.h: 5265: extern volatile __bit T1OSCR @ (((unsigned) &OSCSTAT)*8) + 7;
4090[; ;pic12f1840.h: 5267: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
4091[; ;pic12f1840.h: 5269: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
4092[; ;pic12f1840.h: 5271: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
4093[; ;pic12f1840.h: 5273: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
4094[; ;pic12f1840.h: 5275: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
4095[; ;pic12f1840.h: 5277: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
4096[; ;pic12f1840.h: 5279: extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
4097[; ;pic12f1840.h: 5281: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
4098[; ;pic12f1840.h: 5283: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
4099[; ;pic12f1840.h: 5285: extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
4100[; ;pic12f1840.h: 5287: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
4101[; ;pic12f1840.h: 5289: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
4102[; ;pic12f1840.h: 5291: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
4103[; ;pic12f1840.h: 5293: extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
4104[; ;pic12f1840.h: 5295: extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
4105[; ;pic12f1840.h: 5297: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
4106[; ;pic12f1840.h: 5299: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
4107[; ;pic12f1840.h: 5301: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
4108[; ;pic12f1840.h: 5303: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
4109[; ;pic12f1840.h: 5305: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
4110[; ;pic12f1840.h: 5307: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
4111[; ;pic12f1840.h: 5309: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
4112[; ;pic12f1840.h: 5311: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
4113[; ;pic12f1840.h: 5313: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
4114[; ;pic12f1840.h: 5315: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
4115[; ;pic12f1840.h: 5317: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
4116[; ;pic12f1840.h: 5319: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
4117[; ;pic12f1840.h: 5321: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
4118[; ;pic12f1840.h: 5323: extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
4119[; ;pic12f1840.h: 5325: extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
4120[; ;pic12f1840.h: 5327: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
4121[; ;pic12f1840.h: 5329: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
4122[; ;pic12f1840.h: 5331: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
4123[; ;pic12f1840.h: 5333: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
4124[; ;pic12f1840.h: 5335: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
4125[; ;pic12f1840.h: 5337: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
4126[; ;pic12f1840.h: 5339: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
4127[; ;pic12f1840.h: 5341: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
4128[; ;pic12f1840.h: 5343: extern volatile __bit TXCKSEL @ (((unsigned) &APFCON)*8) + 2;
4129[; ;pic12f1840.h: 5345: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
4130[; ;pic12f1840.h: 5347: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
4131[; ;pic12f1840.h: 5349: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
4132[; ;pic12f1840.h: 5351: extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
4133[; ;pic12f1840.h: 5353: extern volatile __bit VREGPM0 @ (((unsigned) &VREGCON)*8) + 0;
4134[; ;pic12f1840.h: 5355: extern volatile __bit VREGPM1 @ (((unsigned) &VREGCON)*8) + 1;
4135[; ;pic12f1840.h: 5357: extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
4136[; ;pic12f1840.h: 5359: extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
4137[; ;pic12f1840.h: 5361: extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
4138[; ;pic12f1840.h: 5363: extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
4139[; ;pic12f1840.h: 5365: extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
4140[; ;pic12f1840.h: 5367: extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
4141[; ;pic12f1840.h: 5369: extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
4142[; ;pic12f1840.h: 5371: extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
4143[; ;pic12f1840.h: 5373: extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
4144[; ;pic12f1840.h: 5375: extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
4145[; ;pic12f1840.h: 5377: extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
4146[; ;pic12f1840.h: 5379: extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
4147[; ;pic12f1840.h: 5381: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
4148[; ;pic12f1840.h: 5383: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
4149[; ;pic12f1840.h: 5385: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
4150[; ;pic12f1840.h: 5387: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
4151[; ;pic12f1840.h: 5389: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
4152[; ;pic12f1840.h: 5391: extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
4153[; ;pic12f1840.h: 5393: extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
4154[; ;pic12f1840.h: 5395: extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
4155[; ;pic12f1840.h: 5397: extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
4156[; ;pic12f1840.h: 5399: extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
4157[; ;pic12f1840.h: 5401: extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
4158[; ;pic12f1840.h: 5403: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
4159[; ;pic12f1840.h: 5405: extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
4160[; ;pic12f1840.h: 5407: extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
4161[; ;system.h: 31: void ConfigureOscillator(void);
4162[; ;user.h: 13: void InitApp(void);
4163[; ;user.h: 14: bool msg_empty(void);
4164[; ;user.h: 15: void msg_write(const char *msg);
4165[; ;user.h: 16: void msg_writebyte(const char msg);
4166[; ;user.h: 17: void msg_sendnext(void);
4167[; ;user.h: 18: void tohex(char val[3], char i);
4168[; ;user.h: 19: void msg_recvnext(void);
4169[; ;user.h: 20: bool msg_recvready(void);
4170[; ;user.h: 21: char msg_recv(void);
4171[; ;user.h: 22: void putch(char);
4172[; ;user.h: 24: void int_disable(void);
4173[; ;user.h: 25: void int_enable(void);
4174[; ;onewire.h: 11: bool OW_reset(void);
4175[; ;onewire.h: 12: void OW_write_bit(bool val);
4176[; ;onewire.h: 13: bool OW_read_bit();
4177[; ;onewire.h: 14: void OW_write_byte(unsigned char byte);
4178[; ;onewire.h: 15: unsigned char OW_read_byte(void);
4179[; ;onewire.h: 17: void OW_search_init();
4180[; ;onewire.h: 18: bool OW_search(void);
4181[; ;onewire.h: 19: void OW_start(void);
4182[; ;onewire.h: 21: void OW_identify();
4183[; ;onewire.h: 22: bool OW_parasite(void);
4184[; ;onewire.h: 23: void OW_read_block(uint8_t code, uint8_t * data, uint8_t len);
4185[; ;onewire.h: 24: void OW_convert();
4186[; ;onewire.h: 27: inline void drive_OW_low(void);
4187[; ;onewire.h: 28: inline void drive_OW_high(void);
4188[; ;onewire.h: 29: inline void float_OW(void);
4189[; ;onewire.h: 30: inline bool read_OW(void);
4190[; ;onewire.h: 32: extern unsigned char romid[8];
4191"27 onewire.h
4192[v F3573 `(v ~T0 @X0 1 tf ]
4193"25 onewire.c
4194[v _drive_OW_low `TF3573 ~T0 @X0 1 e ]
4195{
4196[; ;onewire.c: 24: inline void drive_OW_low(void)
4197[; ;onewire.c: 25: {
4198[e :U _drive_OW_low ]
4199[f ]
4200[; ;onewire.c: 26: PORTAbits.RA5 = 0;
4201"26
4202[e = . . _PORTAbits 0 5 -> -> 0 `i `uc ]
4203[; ;onewire.c: 27: TRISAbits.TRISA5 = 0;
4204"27
4205[e = . . _TRISAbits 0 5 -> -> 0 `i `uc ]
4206[; ;onewire.c: 28: }
4207"28
4208[e :UE 524 ]
4209}
4210"28 onewire.h
4211[v F3576 `(v ~T0 @X0 1 tf ]
4212"31 onewire.c
4213[v _drive_OW_high `TF3576 ~T0 @X0 1 e ]
4214{
4215[; ;onewire.c: 30: inline void drive_OW_high(void)
4216[; ;onewire.c: 31: {
4217[e :U _drive_OW_high ]
4218[f ]
4219[; ;onewire.c: 32: PORTAbits.RA5 = 1;
4220"32
4221[e = . . _PORTAbits 0 5 -> -> 1 `i `uc ]
4222[; ;onewire.c: 33: TRISAbits.TRISA5 = 0;
4223"33
4224[e = . . _TRISAbits 0 5 -> -> 0 `i `uc ]
4225[; ;onewire.c: 34: }
4226"34
4227[e :UE 525 ]
4228}
4229"29 onewire.h
4230[v F3579 `(v ~T0 @X0 1 tf ]
4231"37 onewire.c
4232[v _float_OW `TF3579 ~T0 @X0 1 e ]
4233{
4234[; ;onewire.c: 36: inline void float_OW(void)
4235[; ;onewire.c: 37: {
4236[e :U _float_OW ]
4237[f ]
4238[; ;onewire.c: 38: TRISAbits.TRISA5 = 1;
4239"38
4240[e = . . _TRISAbits 0 5 -> -> 1 `i `uc ]
4241[; ;onewire.c: 39: }
4242"39
4243[e :UE 526 ]
4244}
4245"30 onewire.h
4246[v F3582 `(uc ~T0 @X0 1 tf ]
4247"42 onewire.c
4248[v _read_OW `TF3582 ~T0 @X0 1 e ]
4249{
4250[; ;onewire.c: 41: inline bool read_OW(void)
4251[; ;onewire.c: 42: {
4252[e :U _read_OW ]
4253[f ]
4254[; ;onewire.c: 43: TRISAbits.TRISA5 = 1;
4255"43
4256[e = . . _TRISAbits 0 5 -> -> 1 `i `uc ]
4257[; ;onewire.c: 44: return PORTAbits.RA5;
4258"44
4259[e ) . . _PORTAbits 0 5 ]
4260[e $UE 527 ]
4261[; ;onewire.c: 45: }
4262"45
4263[e :UE 527 ]
4264}
4265"52
4266[v _OW_start `(v ~T0 @X0 1 ef ]
4267{
4268[; ;onewire.c: 51: void OW_start(void)
4269[; ;onewire.c: 52: {
4270[e :U _OW_start ]
4271[f ]
4272[; ;onewire.c: 54: float_OW();
4273"54
4274[e ( _float_OW .. ]
4275[; ;onewire.c: 55: }
4276"55
4277[e :UE 528 ]
4278}
4279"59
4280[v _OW_reset `(uc ~T0 @X0 1 ef ]
4281{
4282[; ;onewire.c: 58: bool OW_reset(void)
4283[; ;onewire.c: 59: {
4284[e :U _OW_reset ]
4285[f ]
4286"60
4287[v _presence `uc ~T0 @X0 1 a ]
4288[; ;onewire.c: 60: bool presence = 0;
4289[e = _presence -> -> 0 `i `uc ]
4290[; ;onewire.c: 62: { PORTAbits.RA5 = 0; TRISAbits.TRISA5 = 0; };
4291"62
4292{
4293[e = . . _PORTAbits 0 5 -> -> 0 `i `uc ]
4294[e = . . _TRISAbits 0 5 -> -> 0 `i `uc ]
4295}
4296[; ;onewire.c: 63: _delay(250);
4297"63
4298[e ( __delay (1 -> -> -> 250 `i `l `ul ]
4299[; ;onewire.c: 64: _delay(250);
4300"64
4301[e ( __delay (1 -> -> -> 250 `i `l `ul ]
4302[; ;onewire.c: 65: { TRISAbits.TRISA5 = 1; };
4303"65
4304{
4305[e = . . _TRISAbits 0 5 -> -> 1 `i `uc ]
4306}
4307[; ;onewire.c: 66: _delay(70);
4308"66
4309[e ( __delay (1 -> -> -> 70 `i `l `ul ]
4310[; ;onewire.c: 67: presence = (PORTAbits.RA5);
4311"67
4312[e = _presence . . _PORTAbits 0 5 ]
4313[; ;onewire.c: 68: _delay(215);
4314"68
4315[e ( __delay (1 -> -> -> 215 `i `l `ul ]
4316[; ;onewire.c: 69: _delay(215);
4317"69
4318[e ( __delay (1 -> -> -> 215 `i `l `ul ]
4319[; ;onewire.c: 71: return ! presence;
4320"71
4321[e ) -> -> ! != -> _presence `i -> -> -> 0 `i `uc `i `i `uc ]
4322[e $UE 529 ]
4323[; ;onewire.c: 72: }
4324"72
4325[e :UE 529 ]
4326}
4327"75
4328[v _OW_write_bit `(v ~T0 @X0 1 ef1`uc ]
4329{
4330[; ;onewire.c: 74: void OW_write_bit(bool val)
4331[; ;onewire.c: 75: {
4332[e :U _OW_write_bit ]
4333[v _val `uc ~T0 @X0 1 r1 ]
4334[f ]
4335[; ;onewire.c: 84: { PORTAbits.RA5 = 0; TRISAbits.TRISA5 = 0; };
4336"84
4337{
4338[e = . . _PORTAbits 0 5 -> -> 0 `i `uc ]
4339[e = . . _TRISAbits 0 5 -> -> 0 `i `uc ]
4340}
4341[; ;onewire.c: 85: _nop();
4342"85
4343[e ( __nop .. ]
4344[; ;onewire.c: 86: _nop();
4345"86
4346[e ( __nop .. ]
4347[; ;onewire.c: 88: if (val) { TRISAbits.TRISA5 = 1; };
4348"88
4349[e $ ! != -> _val `i -> -> -> 0 `i `uc `i 531 ]
4350{
4351[e = . . _TRISAbits 0 5 -> -> 1 `i `uc ]
4352}
4353[e :U 531 ]
4354[; ;onewire.c: 89: _delay(60);
4355"89
4356[e ( __delay (1 -> -> -> 60 `i `l `ul ]
4357[; ;onewire.c: 90: { TRISAbits.TRISA5 = 1; };
4358"90
4359{
4360[e = . . _TRISAbits 0 5 -> -> 1 `i `uc ]
4361}
4362[; ;onewire.c: 91: _nop();
4363"91
4364[e ( __nop .. ]
4365[; ;onewire.c: 92: _nop();
4366"92
4367[e ( __nop .. ]
4368[; ;onewire.c: 94: }
4369"94
4370[e :UE 530 ]
4371}
4372"97
4373[v _OW_read_bit `(uc ~T0 @X0 1 ef ]
4374{
4375[; ;onewire.c: 96: bool OW_read_bit()
4376[; ;onewire.c: 97: {
4377[e :U _OW_read_bit ]
4378[f ]
4379"98
4380[v _val `uc ~T0 @X0 1 a ]
4381[; ;onewire.c: 98: bool val;
4382[; ;onewire.c: 107: { PORTAbits.RA5 = 0; TRISAbits.TRISA5 = 0; };
4383"107
4384{
4385[e = . . _PORTAbits 0 5 -> -> 0 `i `uc ]
4386[e = . . _TRISAbits 0 5 -> -> 0 `i `uc ]
4387}
4388[; ;onewire.c: 109: _nop();
4389"109
4390[e ( __nop .. ]
4391[; ;onewire.c: 110: _nop();
4392"110
4393[e ( __nop .. ]
4394[; ;onewire.c: 111: _nop();
4395"111
4396[e ( __nop .. ]
4397[; ;onewire.c: 112: _nop();
4398"112
4399[e ( __nop .. ]
4400[; ;onewire.c: 113: _nop();
4401"113
4402[e ( __nop .. ]
4403[; ;onewire.c: 114: { TRISAbits.TRISA5 = 1; };
4404"114
4405{
4406[e = . . _TRISAbits 0 5 -> -> 1 `i `uc ]
4407}
4408[; ;onewire.c: 116: _nop();
4409"116
4410[e ( __nop .. ]
4411[; ;onewire.c: 117: _nop();
4412"117
4413[e ( __nop .. ]
4414[; ;onewire.c: 118: _nop();
4415"118
4416[e ( __nop .. ]
4417[; ;onewire.c: 119: val = read_OW();
4418"119
4419[e = _val ( _read_OW .. ]
4420[; ;onewire.c: 120: _delay(50);
4421"120
4422[e ( __delay (1 -> -> -> 50 `i `l `ul ]
4423[; ;onewire.c: 123: return val;
4424"123
4425[e ) _val ]
4426[e $UE 532 ]
4427[; ;onewire.c: 124: }
4428"124
4429[e :UE 532 ]
4430}
4431"127
4432[v _OW_write_byte `(v ~T0 @X0 1 ef1`uc ]
4433{
4434[; ;onewire.c: 126: void OW_write_byte(unsigned char byte)
4435[; ;onewire.c: 127: {
4436[e :U _OW_write_byte ]
4437[v _byte `uc ~T0 @X0 1 r1 ]
4438[f ]
4439[; ;onewire.c: 128: for (char i=8; i!=0; i--)
4440"128
4441{
4442[v _i `uc ~T0 @X0 1 a ]
4443[e = _i -> -> 8 `i `uc ]
4444[e $ != -> _i `i -> 0 `i 534 ]
4445[e $U 535 ]
4446"129
4447[e :U 534 ]
4448[; ;onewire.c: 129: {
4449{
4450[; ;onewire.c: 130: OW_write_bit( byte & 0x01 );
4451"130
4452[e ( _OW_write_bit (1 -> & -> _byte `i -> 1 `i `uc ]
4453[; ;onewire.c: 131: byte >>= 1;
4454"131
4455[e =>> _byte -> 1 `i ]
4456"132
4457}
4458"128
4459[e -- _i -> -> 1 `i `uc ]
4460[e $ != -> _i `i -> 0 `i 534 ]
4461[e :U 535 ]
4462"132
4463}
4464[; ;onewire.c: 132: }
4465[; ;onewire.c: 133: }
4466"133
4467[e :UE 533 ]
4468}
4469"136
4470[v _OW_read_byte `(uc ~T0 @X0 1 ef ]
4471{
4472[; ;onewire.c: 135: unsigned char OW_read_byte(void)
4473[; ;onewire.c: 136: {
4474[e :U _OW_read_byte ]
4475[f ]
4476"137
4477[v _byte `uc ~T0 @X0 1 a ]
4478[; ;onewire.c: 137: unsigned char byte = 0;
4479[e = _byte -> -> 0 `i `uc ]
4480[; ;onewire.c: 138: for (char i=8; i!=0; i--)
4481"138
4482{
4483[v _i `uc ~T0 @X0 1 a ]
4484[e = _i -> -> 8 `i `uc ]
4485[e $ != -> _i `i -> 0 `i 538 ]
4486[e $U 539 ]
4487"139
4488[e :U 538 ]
4489[; ;onewire.c: 139: {
4490{
4491[; ;onewire.c: 140: byte >>= 1;
4492"140
4493[e =>> _byte -> 1 `i ]
4494[; ;onewire.c: 141: if (OW_read_bit())
4495"141
4496[e $ ! != -> ( _OW_read_bit .. `i -> -> -> 0 `i `uc `i 541 ]
4497[; ;onewire.c: 142: byte |= 0x80;
4498"142
4499[e =| _byte -> -> 128 `i `uc ]
4500[e :U 541 ]
4501"144
4502}
4503"138
4504[e -- _i -> -> 1 `i `uc ]
4505[e $ != -> _i `i -> 0 `i 538 ]
4506[e :U 539 ]
4507"144
4508}
4509[; ;onewire.c: 144: }
4510[; ;onewire.c: 145: return byte;
4511"145
4512[e ) _byte ]
4513[e $UE 537 ]
4514[; ;onewire.c: 146: }
4515"146
4516[e :UE 537 ]
4517}
4518"148
4519[v _dscrc_table `Cuc ~T0 @X0 -> 0 `x s ]
4520[i _dscrc_table
4521:U ..
4522"149
4523-> -> 0 `i `uc
4524-> -> 94 `i `uc
4525-> -> 188 `i `uc
4526-> -> 226 `i `uc
4527-> -> 97 `i `uc
4528-> -> 63 `i `uc
4529-> -> 221 `i `uc
4530-> -> 131 `i `uc
4531-> -> 194 `i `uc
4532-> -> 156 `i `uc
4533-> -> 126 `i `uc
4534-> -> 32 `i `uc
4535-> -> 163 `i `uc
4536-> -> 253 `i `uc
4537-> -> 31 `i `uc
4538-> -> 65 `i `uc
4539"150
4540-> -> 157 `i `uc
4541-> -> 195 `i `uc
4542-> -> 33 `i `uc
4543-> -> 127 `i `uc
4544-> -> 252 `i `uc
4545-> -> 162 `i `uc
4546-> -> 64 `i `uc
4547-> -> 30 `i `uc
4548-> -> 95 `i `uc
4549-> -> 1 `i `uc
4550-> -> 227 `i `uc
4551-> -> 189 `i `uc
4552-> -> 62 `i `uc
4553-> -> 96 `i `uc
4554-> -> 130 `i `uc
4555-> -> 220 `i `uc
4556"151
4557-> -> 35 `i `uc
4558-> -> 125 `i `uc
4559-> -> 159 `i `uc
4560-> -> 193 `i `uc
4561-> -> 66 `i `uc
4562-> -> 28 `i `uc
4563-> -> 254 `i `uc
4564-> -> 160 `i `uc
4565-> -> 225 `i `uc
4566-> -> 191 `i `uc
4567-> -> 93 `i `uc
4568-> -> 3 `i `uc
4569-> -> 128 `i `uc
4570-> -> 222 `i `uc
4571-> -> 60 `i `uc
4572-> -> 98 `i `uc
4573"152
4574-> -> 190 `i `uc
4575-> -> 224 `i `uc
4576-> -> 2 `i `uc
4577-> -> 92 `i `uc
4578-> -> 223 `i `uc
4579-> -> 129 `i `uc
4580-> -> 99 `i `uc
4581-> -> 61 `i `uc
4582-> -> 124 `i `uc
4583-> -> 34 `i `uc
4584-> -> 192 `i `uc
4585-> -> 158 `i `uc
4586-> -> 29 `i `uc
4587-> -> 67 `i `uc
4588-> -> 161 `i `uc
4589-> -> 255 `i `uc
4590"153
4591-> -> 70 `i `uc
4592-> -> 24 `i `uc
4593-> -> 250 `i `uc
4594-> -> 164 `i `uc
4595-> -> 39 `i `uc
4596-> -> 121 `i `uc
4597-> -> 155 `i `uc
4598-> -> 197 `i `uc
4599-> -> 132 `i `uc
4600-> -> 218 `i `uc
4601-> -> 56 `i `uc
4602-> -> 102 `i `uc
4603-> -> 229 `i `uc
4604-> -> 187 `i `uc
4605-> -> 89 `i `uc
4606-> -> 7 `i `uc
4607"154
4608-> -> 219 `i `uc
4609-> -> 133 `i `uc
4610-> -> 103 `i `uc
4611-> -> 57 `i `uc
4612-> -> 186 `i `uc
4613-> -> 228 `i `uc
4614-> -> 6 `i `uc
4615-> -> 88 `i `uc
4616-> -> 25 `i `uc
4617-> -> 71 `i `uc
4618-> -> 165 `i `uc
4619-> -> 251 `i `uc
4620-> -> 120 `i `uc
4621-> -> 38 `i `uc
4622-> -> 196 `i `uc
4623-> -> 154 `i `uc
4624"155
4625-> -> 101 `i `uc
4626-> -> 59 `i `uc
4627-> -> 217 `i `uc
4628-> -> 135 `i `uc
4629-> -> 4 `i `uc
4630-> -> 90 `i `uc
4631-> -> 184 `i `uc
4632-> -> 230 `i `uc
4633-> -> 167 `i `uc
4634-> -> 249 `i `uc
4635-> -> 27 `i `uc
4636-> -> 69 `i `uc
4637-> -> 198 `i `uc
4638-> -> 152 `i `uc
4639-> -> 122 `i `uc
4640-> -> 36 `i `uc
4641"156
4642-> -> 248 `i `uc
4643-> -> 166 `i `uc
4644-> -> 68 `i `uc
4645-> -> 26 `i `uc
4646-> -> 153 `i `uc
4647-> -> 199 `i `uc
4648-> -> 37 `i `uc
4649-> -> 123 `i `uc
4650-> -> 58 `i `uc
4651-> -> 100 `i `uc
4652-> -> 134 `i `uc
4653-> -> 216 `i `uc
4654-> -> 91 `i `uc
4655-> -> 5 `i `uc
4656-> -> 231 `i `uc
4657-> -> 185 `i `uc
4658"157
4659-> -> 140 `i `uc
4660-> -> 210 `i `uc
4661-> -> 48 `i `uc
4662-> -> 110 `i `uc
4663-> -> 237 `i `uc
4664-> -> 179 `i `uc
4665-> -> 81 `i `uc
4666-> -> 15 `i `uc
4667-> -> 78 `i `uc
4668-> -> 16 `i `uc
4669-> -> 242 `i `uc
4670-> -> 172 `i `uc
4671-> -> 47 `i `uc
4672-> -> 113 `i `uc
4673-> -> 147 `i `uc
4674-> -> 205 `i `uc
4675"158
4676-> -> 17 `i `uc
4677-> -> 79 `i `uc
4678-> -> 173 `i `uc
4679-> -> 243 `i `uc
4680-> -> 112 `i `uc
4681-> -> 46 `i `uc
4682-> -> 204 `i `uc
4683-> -> 146 `i `uc
4684-> -> 211 `i `uc
4685-> -> 141 `i `uc
4686-> -> 111 `i `uc
4687-> -> 49 `i `uc
4688-> -> 178 `i `uc
4689-> -> 236 `i `uc
4690-> -> 14 `i `uc
4691-> -> 80 `i `uc
4692"159
4693-> -> 175 `i `uc
4694-> -> 241 `i `uc
4695-> -> 19 `i `uc
4696-> -> 77 `i `uc
4697-> -> 206 `i `uc
4698-> -> 144 `i `uc
4699-> -> 114 `i `uc
4700-> -> 44 `i `uc
4701-> -> 109 `i `uc
4702-> -> 51 `i `uc
4703-> -> 209 `i `uc
4704-> -> 143 `i `uc
4705-> -> 12 `i `uc
4706-> -> 82 `i `uc
4707-> -> 176 `i `uc
4708-> -> 238 `i `uc
4709"160
4710-> -> 50 `i `uc
4711-> -> 108 `i `uc
4712-> -> 142 `i `uc
4713-> -> 208 `i `uc
4714-> -> 83 `i `uc
4715-> -> 13 `i `uc
4716-> -> 239 `i `uc
4717-> -> 177 `i `uc
4718-> -> 240 `i `uc
4719-> -> 174 `i `uc
4720-> -> 76 `i `uc
4721-> -> 18 `i `uc
4722-> -> 145 `i `uc
4723-> -> 207 `i `uc
4724-> -> 45 `i `uc
4725-> -> 115 `i `uc
4726"161
4727-> -> 202 `i `uc
4728-> -> 148 `i `uc
4729-> -> 118 `i `uc
4730-> -> 40 `i `uc
4731-> -> 171 `i `uc
4732-> -> 245 `i `uc
4733-> -> 23 `i `uc
4734-> -> 73 `i `uc
4735-> -> 8 `i `uc
4736-> -> 86 `i `uc
4737-> -> 180 `i `uc
4738-> -> 234 `i `uc
4739-> -> 105 `i `uc
4740-> -> 55 `i `uc
4741-> -> 213 `i `uc
4742-> -> 139 `i `uc
4743"162
4744-> -> 87 `i `uc
4745-> -> 9 `i `uc
4746-> -> 235 `i `uc
4747-> -> 181 `i `uc
4748-> -> 54 `i `uc
4749-> -> 104 `i `uc
4750-> -> 138 `i `uc
4751-> -> 212 `i `uc
4752-> -> 149 `i `uc
4753-> -> 203 `i `uc
4754-> -> 41 `i `uc
4755-> -> 119 `i `uc
4756-> -> 244 `i `uc
4757-> -> 170 `i `uc
4758-> -> 72 `i `uc
4759-> -> 22 `i `uc
4760"163
4761-> -> 233 `i `uc
4762-> -> 183 `i `uc
4763-> -> 85 `i `uc
4764-> -> 11 `i `uc
4765-> -> 136 `i `uc
4766-> -> 214 `i `uc
4767-> -> 52 `i `uc
4768-> -> 106 `i `uc
4769-> -> 43 `i `uc
4770-> -> 117 `i `uc
4771-> -> 151 `i `uc
4772-> -> 201 `i `uc
4773-> -> 74 `i `uc
4774-> -> 20 `i `uc
4775-> -> 246 `i `uc
4776-> -> 168 `i `uc
4777"164
4778-> -> 116 `i `uc
4779-> -> 42 `i `uc
4780-> -> 200 `i `uc
4781-> -> 150 `i `uc
4782-> -> 21 `i `uc
4783-> -> 75 `i `uc
4784-> -> 169 `i `uc
4785-> -> 247 `i `uc
4786-> -> 182 `i `uc
4787-> -> 232 `i `uc
4788-> -> 10 `i `uc
4789-> -> 84 `i `uc
4790-> -> 215 `i `uc
4791-> -> 137 `i `uc
4792-> -> 107 `i `uc
4793"165
4794-> -> 53 `i `uc
4795..
4796]
4797[; ;onewire.c: 148: static const unsigned char dscrc_table[] = {
4798[; ;onewire.c: 149: 0, 94,188,226, 97, 63,221,131,194,156,126, 32,163,253, 31, 65,
4799[; ;onewire.c: 150: 157,195, 33,127,252,162, 64, 30, 95, 1,227,189, 62, 96,130,220,
4800[; ;onewire.c: 151: 35,125,159,193, 66, 28,254,160,225,191, 93, 3,128,222, 60, 98,
4801[; ;onewire.c: 152: 190,224, 2, 92,223,129, 99, 61,124, 34,192,158, 29, 67,161,255,
4802[; ;onewire.c: 153: 70, 24,250,164, 39,121,155,197,132,218, 56,102,229,187, 89, 7,
4803[; ;onewire.c: 154: 219,133,103, 57,186,228, 6, 88, 25, 71,165,251,120, 38,196,154,
4804[; ;onewire.c: 155: 101, 59,217,135, 4, 90,184,230,167,249, 27, 69,198,152,122, 36,
4805[; ;onewire.c: 156: 248,166, 68, 26,153,199, 37,123, 58,100,134,216, 91, 5,231,185,
4806[; ;onewire.c: 157: 140,210, 48,110,237,179, 81, 15, 78, 16,242,172, 47,113,147,205,
4807[; ;onewire.c: 158: 17, 79,173,243,112, 46,204,146,211,141,111, 49,178,236, 14, 80,
4808[; ;onewire.c: 159: 175,241, 19, 77,206,144,114, 44,109, 51,209,143, 12, 82,176,238,
4809[; ;onewire.c: 160: 50,108,142,208, 83, 13,239,177,240,174, 76, 18,145,207, 45,115,
4810[; ;onewire.c: 161: 202,148,118, 40,171,245, 23, 73, 8, 86,180,234,105, 55,213,139,
4811[; ;onewire.c: 162: 87, 9,235,181, 54,104,138,212,149,203, 41,119,244,170, 72, 22,
4812[; ;onewire.c: 163: 233,183, 85, 11,136,214, 52,106, 43,117,151,201, 74, 20,246,168,
4813[; ;onewire.c: 164: 116, 42,200,150, 21, 75,169,247,182,232, 10, 84,215,137,107, 53
4814[; ;onewire.c: 165: };
4815"167
4816[v _romid `uc ~T0 @X0 -> 8 `i e ]
4817[; ;onewire.c: 167: unsigned char romid[8];
4818"168
4819[v _LastDiscrepancy `uc ~T0 @X0 1 e ]
4820[i _LastDiscrepancy
4821-> -> 0 `i `uc
4822]
4823[; ;onewire.c: 168: char LastDiscrepancy = 0;
4824"169
4825[v _LastFamilyDiscrepancy `uc ~T0 @X0 1 e ]
4826[i _LastFamilyDiscrepancy
4827-> -> 0 `i `uc
4828]
4829[; ;onewire.c: 169: char LastFamilyDiscrepancy = 0;
4830"170
4831[v _LastDeviceFlag `uc ~T0 @X0 1 e ]
4832[i _LastDeviceFlag
4833-> -> 0 `i `uc
4834]
4835[; ;onewire.c: 170: char LastDeviceFlag = 0;
4836"171
4837[v _crc8 `uc ~T0 @X0 1 e ]
4838[; ;onewire.c: 171: unsigned char crc8;
4839"174
4840[v _docrc8 `(uc ~T0 @X0 1 sf1`uc ]
4841{
4842[; ;onewire.c: 173: static unsigned char docrc8(unsigned char value)
4843[; ;onewire.c: 174: {
4844[e :U _docrc8 ]
4845[v _value `uc ~T0 @X0 1 r1 ]
4846[f ]
4847[; ;onewire.c: 175: crc8 = dscrc_table[crc8 ^ value];
4848"175
4849[e = _crc8 *U + &U _dscrc_table * -> -> ^ -> _crc8 `i -> _value `i `ui `ux -> -> # *U &U _dscrc_table `ui `ux ]
4850[; ;onewire.c: 176: return crc8;
4851"176
4852[e ) _crc8 ]
4853[e $UE 542 ]
4854[; ;onewire.c: 177: }
4855"177
4856[e :UE 542 ]
4857}
4858"181
4859[v _OW_search `(uc ~T0 @X0 1 ef ]
4860{
4861[; ;onewire.c: 180: bool OW_search()
4862[; ;onewire.c: 181: {
4863[e :U _OW_search ]
4864[f ]
4865"182
4866[v _id_bit_number `uc ~T0 @X0 1 a ]
4867[; ;onewire.c: 182: char id_bit_number = 1;
4868[e = _id_bit_number -> -> 1 `i `uc ]
4869"183
4870[v _last_zero `uc ~T0 @X0 1 a ]
4871[; ;onewire.c: 183: char last_zero = 0;
4872[e = _last_zero -> -> 0 `i `uc ]
4873"184
4874[v _rom_byte_number `uc ~T0 @X0 1 a ]
4875[; ;onewire.c: 184: char rom_byte_number = 0;
4876[e = _rom_byte_number -> -> 0 `i `uc ]
4877"185
4878[v _search_result `uc ~T0 @X0 1 a ]
4879[; ;onewire.c: 185: char search_result = 0;
4880[e = _search_result -> -> 0 `i `uc ]
4881"186
4882[v _rom_byte_mask `uc ~T0 @X0 1 a ]
4883[; ;onewire.c: 186: unsigned char rom_byte_mask = 1;
4884[e = _rom_byte_mask -> -> 1 `i `uc ]
4885"187
4886[v _search_direction `uc ~T0 @X0 1 a ]
4887[; ;onewire.c: 187: unsigned char search_direction;
4888[; ;onewire.c: 189: crc8 = 0;
4889"189
4890[e = _crc8 -> -> 0 `i `uc ]
4891[; ;onewire.c: 192: int_disable();
4892"192
4893[e ( _int_disable .. ]
4894[; ;onewire.c: 195: if (!LastDeviceFlag) {
4895"195
4896[e $ ! ! != -> _LastDeviceFlag `i -> -> -> 0 `i `uc `i 544 ]
4897{
4898[; ;onewire.c: 196: if (!OW_reset())
4899"196
4900[e $ ! ! != -> ( _OW_reset .. `i -> -> -> 0 `i `uc `i 545 ]
4901[; ;onewire.c: 197: {
4902"197
4903{
4904[; ;onewire.c: 198: msg_write("Reset said nothing there.\r\n");
4905"198
4906[e ( _msg_write (1 :s 1C ]
4907[; ;onewire.c: 200: LastDiscrepancy = 0;
4908"200
4909[e = _LastDiscrepancy -> -> 0 `i `uc ]
4910[; ;onewire.c: 201: LastDeviceFlag = 0;
4911"201
4912[e = _LastDeviceFlag -> -> 0 `i `uc ]
4913[; ;onewire.c: 202: LastFamilyDiscrepancy = 0;
4914"202
4915[e = _LastFamilyDiscrepancy -> -> 0 `i `uc ]
4916[; ;onewire.c: 203: int_enable();
4917"203
4918[e ( _int_enable .. ]
4919[; ;onewire.c: 204: return 0;
4920"204
4921[e ) -> -> 0 `i `uc ]
4922[e $UE 543 ]
4923"205
4924}
4925[e :U 545 ]
4926[; ;onewire.c: 205: }
4927[; ;onewire.c: 208: OW_write_byte(0xF0);
4928"208
4929[e ( _OW_write_byte (1 -> -> 240 `i `uc ]
4930[; ;onewire.c: 211: do {
4931"211
4932[e :U 548 ]
4933{
4934"213
4935[v _id_bit `uc ~T0 @X0 1 a ]
4936[; ;onewire.c: 213: bool id_bit = OW_read_bit();
4937[e = _id_bit ( _OW_read_bit .. ]
4938[; ;onewire.c: 214: _delay(6);
4939"214
4940[e ( __delay (1 -> -> -> 6 `i `l `ul ]
4941"215
4942[v _cmp_id_bit `uc ~T0 @X0 1 a ]
4943[; ;onewire.c: 215: bool cmp_id_bit = OW_read_bit();
4944[e = _cmp_id_bit ( _OW_read_bit .. ]
4945[; ;onewire.c: 218: if (id_bit && cmp_id_bit) {
4946"218
4947[e $ ! && != -> _id_bit `i -> -> -> 0 `i `uc `i != -> _cmp_id_bit `i -> -> -> 0 `i `uc `i 549 ]
4948{
4949[; ;onewire.c: 219: break;
4950"219
4951[e $U 547 ]
4952"220
4953}
4954[e :U 549 ]
4955[; ;onewire.c: 220: }
4956[; ;onewire.c: 222: if (id_bit != cmp_id_bit) {
4957"222
4958[e $ ! != -> _id_bit `i -> _cmp_id_bit `i 550 ]
4959{
4960[; ;onewire.c: 224: search_direction = id_bit;
4961"224
4962[e = _search_direction _id_bit ]
4963"225
4964}
4965[; ;onewire.c: 225: } else {
4966[e $U 551 ]
4967[e :U 550 ]
4968{
4969[; ;onewire.c: 230: if (id_bit_number < LastDiscrepancy) {
4970"230
4971[e $ ! < -> _id_bit_number `i -> _LastDiscrepancy `i 552 ]
4972{
4973[; ;onewire.c: 231: search_direction = ((romid[rom_byte_number] & rom_byte_mask) > 0);
4974"231
4975[e = _search_direction -> -> > & -> *U + &U _romid * -> _rom_byte_number `ux -> -> # *U &U _romid `ui `ux `i -> _rom_byte_mask `i -> 0 `i `i `uc ]
4976"232
4977}
4978[; ;onewire.c: 232: } else {
4979[e $U 553 ]
4980[e :U 552 ]
4981{
4982[; ;onewire.c: 234: search_direction = (id_bit_number == LastDiscrepancy);
4983"234
4984[e = _search_direction -> -> == -> _id_bit_number `i -> _LastDiscrepancy `i `i `uc ]
4985"235
4986}
4987[e :U 553 ]
4988[; ;onewire.c: 235: }
4989[; ;onewire.c: 238: if (search_direction == 0)
4990"238
4991[e $ ! == -> _search_direction `i -> 0 `i 554 ]
4992[; ;onewire.c: 239: {
4993"239
4994{
4995[; ;onewire.c: 240: last_zero = id_bit_number;
4996"240
4997[e = _last_zero _id_bit_number ]
4998[; ;onewire.c: 242: if (last_zero < 9)
4999"242
5000[e $ ! < -> _last_zero `i -> 9 `i 555 ]
5001[; ;onewire.c: 243: LastFamilyDiscrepancy = last_zero;
5002"243
5003[e = _LastFamilyDiscrepancy _last_zero ]
5004[e :U 555 ]
5005"244
5006}
5007[e :U 554 ]
5008"245
5009}
5010[e :U 551 ]
5011[; ;onewire.c: 244: }
5012[; ;onewire.c: 245: }
5013[; ;onewire.c: 249: if (search_direction == 1)
5014"249
5015[e $ ! == -> _search_direction `i -> 1 `i 556 ]
5016[; ;onewire.c: 250: romid[rom_byte_number] |= rom_byte_mask;
5017"250
5018[e =| *U + &U _romid * -> _rom_byte_number `ux -> -> # *U &U _romid `ui `ux _rom_byte_mask ]
5019[e $U 557 ]
5020"251
5021[e :U 556 ]
5022[; ;onewire.c: 251: else
5023[; ;onewire.c: 252: romid[rom_byte_number] &= ~rom_byte_mask;
5024"252
5025[e =& *U + &U _romid * -> _rom_byte_number `ux -> -> # *U &U _romid `ui `ux -> ~ -> _rom_byte_mask `i `uc ]
5026[e :U 557 ]
5027[; ;onewire.c: 255: OW_write_bit(search_direction);
5028"255
5029[e ( _OW_write_bit (1 _search_direction ]
5030[; ;onewire.c: 259: id_bit_number++;
5031"259
5032[e ++ _id_bit_number -> -> 1 `i `uc ]
5033[; ;onewire.c: 260: rom_byte_mask <<= 1;
5034"260
5035[e =<< _rom_byte_mask -> 1 `i ]
5036[; ;onewire.c: 263: if (rom_byte_mask == 0)
5037"263
5038[e $ ! == -> _rom_byte_mask `i -> 0 `i 558 ]
5039[; ;onewire.c: 264: {
5040"264
5041{
5042[; ;onewire.c: 265: docrc8(romid[rom_byte_number]);
5043"265
5044[e ( _docrc8 (1 *U + &U _romid * -> _rom_byte_number `ux -> -> # *U &U _romid `ui `ux ]
5045[; ;onewire.c: 266: rom_byte_number++;
5046"266
5047[e ++ _rom_byte_number -> -> 1 `i `uc ]
5048[; ;onewire.c: 267: rom_byte_mask = 1;
5049"267
5050[e = _rom_byte_mask -> -> 1 `i `uc ]
5051"268
5052}
5053[e :U 558 ]
5054"269
5055}
5056[; ;onewire.c: 268: }
5057[; ;onewire.c: 269: } while (rom_byte_number < 8);
5058[e $ < -> _rom_byte_number `i -> 8 `i 548 ]
5059[e :U 547 ]
5060"270
5061}
5062[e :U 544 ]
5063[; ;onewire.c: 270: }
5064[; ;onewire.c: 273: if (!(id_bit_number < 65 || crc8 != 0))
5065"273
5066[e $ ! ! || < -> _id_bit_number `i -> 65 `i != -> _crc8 `i -> 0 `i 559 ]
5067[; ;onewire.c: 274: {
5068"274
5069{
5070[; ;onewire.c: 276: LastDiscrepancy = last_zero;
5071"276
5072[e = _LastDiscrepancy _last_zero ]
5073[; ;onewire.c: 279: if (LastDiscrepancy == 0)
5074"279
5075[e $ ! == -> _LastDiscrepancy `i -> 0 `i 560 ]
5076[; ;onewire.c: 280: LastDeviceFlag = 1;
5077"280
5078[e = _LastDeviceFlag -> -> 1 `i `uc ]
5079[e :U 560 ]
5080[; ;onewire.c: 282: search_result = 1;
5081"282
5082[e = _search_result -> -> 1 `i `uc ]
5083"283
5084}
5085[e :U 559 ]
5086[; ;onewire.c: 283: }
5087[; ;onewire.c: 285: if (!search_result || !romid[0])
5088"285
5089[e $ ! || ! != -> _search_result `i -> -> -> 0 `i `uc `i ! != -> *U + &U _romid * -> -> -> 0 `i `ui `ux -> -> # *U &U _romid `ui `ux `i -> -> -> 0 `i `uc `i 561 ]
5090[; ;onewire.c: 286: {
5091"286
5092{
5093[; ;onewire.c: 287: LastDiscrepancy = 0;
5094"287
5095[e = _LastDiscrepancy -> -> 0 `i `uc ]
5096[; ;onewire.c: 288: LastDeviceFlag = 0;
5097"288
5098[e = _LastDeviceFlag -> -> 0 `i `uc ]
5099[; ;onewire.c: 289: LastFamilyDiscrepancy = 0;
5100"289
5101[e = _LastFamilyDiscrepancy -> -> 0 `i `uc ]
5102[; ;onewire.c: 290: search_result = 0;
5103"290
5104[e = _search_result -> -> 0 `i `uc ]
5105"291
5106}
5107[e :U 561 ]
5108[; ;onewire.c: 291: }
5109[; ;onewire.c: 293: int_enable();
5110"293
5111[e ( _int_enable .. ]
5112[; ;onewire.c: 294: return search_result;
5113"294
5114[e ) _search_result ]
5115[e $UE 543 ]
5116[; ;onewire.c: 295: }
5117"295
5118[e :UE 543 ]
5119}
5120"299
5121[v _OW_search_init `(v ~T0 @X0 1 ef ]
5122{
5123[; ;onewire.c: 298: void OW_search_init()
5124[; ;onewire.c: 299: {
5125[e :U _OW_search_init ]
5126[f ]
5127[; ;onewire.c: 300: LastDiscrepancy = 0;
5128"300
5129[e = _LastDiscrepancy -> -> 0 `i `uc ]
5130[; ;onewire.c: 301: LastDeviceFlag = 0;
5131"301
5132[e = _LastDeviceFlag -> -> 0 `i `uc ]
5133[; ;onewire.c: 302: LastFamilyDiscrepancy = 0;
5134"302
5135[e = _LastFamilyDiscrepancy -> -> 0 `i `uc ]
5136[; ;onewire.c: 304: for (int j=0; j<8; j++) romid[j]=0;
5137"304
5138{
5139[v _j `i ~T0 @X0 1 a ]
5140[e = _j -> 0 `i ]
5141[e $ < _j -> 8 `i 563 ]
5142[e $U 564 ]
5143[e :U 563 ]
5144[e = *U + &U _romid * -> -> _j `ui `ux -> -> # *U &U _romid `ui `ux -> -> 0 `i `uc ]
5145[e ++ _j -> 1 `i ]
5146[e $ < _j -> 8 `i 563 ]
5147[e :U 564 ]
5148}
5149[; ;onewire.c: 305: }
5150"305
5151[e :UE 562 ]
5152}
5153"310
5154[v _OW_identify `(v ~T0 @X0 1 ef ]
5155{
5156[; ;onewire.c: 309: void OW_identify()
5157[; ;onewire.c: 310: {
5158[e :U _OW_identify ]
5159[f ]
5160[; ;onewire.c: 311: int_disable();
5161"311
5162[e ( _int_disable .. ]
5163[; ;onewire.c: 312: OW_reset();
5164"312
5165[e ( _OW_reset .. ]
5166[; ;onewire.c: 314: OW_write_byte(0x33);
5167"314
5168[e ( _OW_write_byte (1 -> -> 51 `i `uc ]
5169[; ;onewire.c: 315: for (int j=0; j<8; j++)
5170"315
5171{
5172[v _j `i ~T0 @X0 1 a ]
5173[e = _j -> 0 `i ]
5174[e $ < _j -> 8 `i 567 ]
5175[e $U 568 ]
5176"316
5177[e :U 567 ]
5178[; ;onewire.c: 316: romid[j] = OW_read_byte();
5179[e = *U + &U _romid * -> -> _j `ui `ux -> -> # *U &U _romid `ui `ux ( _OW_read_byte .. ]
5180"315
5181[e ++ _j -> 1 `i ]
5182[e $ < _j -> 8 `i 567 ]
5183[e :U 568 ]
5184"316
5185}
5186[; ;onewire.c: 317: int_enable();
5187"317
5188[e ( _int_enable .. ]
5189[; ;onewire.c: 318: }
5190"318
5191[e :UE 566 ]
5192}
5193"322
5194[v _OW_parasite `(uc ~T0 @X0 1 ef ]
5195{
5196[; ;onewire.c: 321: bool OW_parasite(void)
5197[; ;onewire.c: 322: {
5198[e :U _OW_parasite ]
5199[f ]
5200[; ;onewire.c: 323: int_disable();
5201"323
5202[e ( _int_disable .. ]
5203[; ;onewire.c: 324: OW_reset();
5204"324
5205[e ( _OW_reset .. ]
5206[; ;onewire.c: 325: OW_write_byte(0xCC);
5207"325
5208[e ( _OW_write_byte (1 -> -> 204 `i `uc ]
5209[; ;onewire.c: 326: OW_write_byte(0xB4);
5210"326
5211[e ( _OW_write_byte (1 -> -> 180 `i `uc ]
5212"327
5213[v _no `uc ~T0 @X0 1 a ]
5214[; ;onewire.c: 327: bool no = OW_read_bit();
5215[e = _no ( _OW_read_bit .. ]
5216[; ;onewire.c: 328: int_enable();
5217"328
5218[e ( _int_enable .. ]
5219[; ;onewire.c: 329: return !no;
5220"329
5221[e ) -> -> ! != -> _no `i -> -> -> 0 `i `uc `i `i `uc ]
5222[e $UE 570 ]
5223[; ;onewire.c: 330: }
5224"330
5225[e :UE 570 ]
5226}
5227"336
5228[v _OW_select_id `(v ~T0 @X0 1 sf ]
5229{
5230[; ;onewire.c: 335: static void OW_select_id(void)
5231[; ;onewire.c: 336: {
5232[e :U _OW_select_id ]
5233[f ]
5234[; ;onewire.c: 337: if (romid[0] == 0) {
5235"337
5236[e $ ! == -> *U + &U _romid * -> -> -> 0 `i `ui `ux -> -> # *U &U _romid `ui `ux `i -> 0 `i 572 ]
5237{
5238[; ;onewire.c: 338: OW_write_byte(0xCC);
5239"338
5240[e ( _OW_write_byte (1 -> -> 204 `i `uc ]
5241"339
5242}
5243[; ;onewire.c: 339: } else {
5244[e $U 573 ]
5245[e :U 572 ]
5246{
5247[; ;onewire.c: 340: OW_write_byte(0x55);
5248"340
5249[e ( _OW_write_byte (1 -> -> 85 `i `uc ]
5250[; ;onewire.c: 341: for (int8_t j=0; j<8; j++) {
5251"341
5252{
5253[v _j `c ~T0 @X0 1 a ]
5254[e = _j -> -> 0 `i `c ]
5255[e $ < -> _j `i -> 8 `i 574 ]
5256[e $U 575 ]
5257[e :U 574 ]
5258{
5259[; ;onewire.c: 342: OW_write_byte(romid[j]);
5260"342
5261[e ( _OW_write_byte (1 *U + &U _romid * -> -> _j `uc `ux -> -> # *U &U _romid `ui `ux ]
5262"343
5263}
5264"341
5265[e ++ _j -> -> 1 `i `c ]
5266[e $ < -> _j `i -> 8 `i 574 ]
5267[e :U 575 ]
5268"343
5269}
5270"344
5271}
5272[e :U 573 ]
5273[; ;onewire.c: 343: }
5274[; ;onewire.c: 344: }
5275[; ;onewire.c: 345: }
5276"345
5277[e :UE 571 ]
5278}
5279"350
5280[v _OW_read_block `(v ~T0 @X0 1 ef3`uc`*uc`uc ]
5281{
5282[; ;onewire.c: 349: void OW_read_block(uint8_t code, uint8_t * data, uint8_t len)
5283[; ;onewire.c: 350: {
5284[e :U _OW_read_block ]
5285[v _code `uc ~T0 @X0 1 r1 ]
5286[v _data `*uc ~T0 @X0 1 r2 ]
5287[v _len `uc ~T0 @X0 1 r3 ]
5288[f ]
5289[; ;onewire.c: 351: int_disable();
5290"351
5291[e ( _int_disable .. ]
5292[; ;onewire.c: 352: OW_reset();
5293"352
5294[e ( _OW_reset .. ]
5295[; ;onewire.c: 353: OW_select_id();
5296"353
5297[e ( _OW_select_id .. ]
5298[; ;onewire.c: 354: OW_write_byte(code);
5299"354
5300[e ( _OW_write_byte (1 _code ]
5301[; ;onewire.c: 355: for (int8_t j=0; j<len; j++)
5302"355
5303{
5304[v _j `c ~T0 @X0 1 a ]
5305[e = _j -> -> 0 `i `c ]
5306[e $U 581 ]
5307"356
5308[e :U 578 ]
5309[; ;onewire.c: 356: data[j] = OW_read_byte();
5310[e = *U + _data * -> _j `x -> -> # *U _data `i `x ( _OW_read_byte .. ]
5311"355
5312[e ++ _j -> -> 1 `i `c ]
5313[e :U 581 ]
5314[e $ < -> _j `i -> _len `i 578 ]
5315[e :U 579 ]
5316"356
5317}
5318[; ;onewire.c: 357: int_enable();
5319"357
5320[e ( _int_enable .. ]
5321[; ;onewire.c: 358: }
5322"358
5323[e :UE 577 ]
5324}
5325"362
5326[v _OW_write_block `(v ~T0 @X0 1 ef3`uc`*uc`uc ]
5327{
5328[; ;onewire.c: 361: void OW_write_block(uint8_t code, uint8_t * data, uint8_t len)
5329[; ;onewire.c: 362: {
5330[e :U _OW_write_block ]
5331[v _code `uc ~T0 @X0 1 r1 ]
5332[v _data `*uc ~T0 @X0 1 r2 ]
5333[v _len `uc ~T0 @X0 1 r3 ]
5334[f ]
5335[; ;onewire.c: 363: int_disable();
5336"363
5337[e ( _int_disable .. ]
5338[; ;onewire.c: 364: OW_reset();
5339"364
5340[e ( _OW_reset .. ]
5341[; ;onewire.c: 365: OW_select_id();
5342"365
5343[e ( _OW_select_id .. ]
5344[; ;onewire.c: 366: OW_write_byte(code);
5345"366
5346[e ( _OW_write_byte (1 _code ]
5347[; ;onewire.c: 367: for (int8_t j=0; j<len; j++) {
5348"367
5349{
5350[v _j `c ~T0 @X0 1 a ]
5351[e = _j -> -> 0 `i `c ]
5352[e $U 586 ]
5353[e :U 583 ]
5354{
5355[; ;onewire.c: 368: OW_write_byte(data[j]);
5356"368
5357[e ( _OW_write_byte (1 *U + _data * -> _j `x -> -> # *U _data `i `x ]
5358"369
5359}
5360"367
5361[e ++ _j -> -> 1 `i `c ]
5362[e :U 586 ]
5363[e $ < -> _j `i -> _len `i 583 ]
5364[e :U 584 ]
5365"369
5366}
5367[; ;onewire.c: 369: }
5368[; ;onewire.c: 370: int_enable();
5369"370
5370[e ( _int_enable .. ]
5371[; ;onewire.c: 371: }
5372"371
5373[e :UE 582 ]
5374}
5375"376
5376[v _OW_convert `(v ~T0 @X0 1 ef ]
5377{
5378[; ;onewire.c: 375: void OW_convert()
5379[; ;onewire.c: 376: {
5380[e :U _OW_convert ]
5381[f ]
5382"378
5383[v _para `uc ~T0 @X0 1 a ]
5384[; ;onewire.c: 378: bool para = OW_parasite();
5385[e = _para ( _OW_parasite .. ]
5386[; ;onewire.c: 380: int_disable();
5387"380
5388[e ( _int_disable .. ]
5389[; ;onewire.c: 381: OW_reset();
5390"381
5391[e ( _OW_reset .. ]
5392[; ;onewire.c: 382: OW_select_id();
5393"382
5394[e ( _OW_select_id .. ]
5395[; ;onewire.c: 384: OW_write_byte(0x44);
5396"384
5397[e ( _OW_write_byte (1 -> -> 68 `i `uc ]
5398[; ;onewire.c: 385: if (para) {
5399"385
5400[e $ ! != -> _para `i -> -> -> 0 `i `uc `i 588 ]
5401{
5402[; ;onewire.c: 387: { PORTAbits.RA5 = 1; TRISAbits.TRISA5 = 0; };
5403"387
5404{
5405[e = . . _PORTAbits 0 5 -> -> 1 `i `uc ]
5406[e = . . _TRISAbits 0 5 -> -> 0 `i `uc ]
5407}
5408[; ;onewire.c: 388: _delay(250000);
5409"388
5410[e ( __delay (1 -> -> 250000 `l `ul ]
5411[; ;onewire.c: 389: _delay(250000);
5412"389
5413[e ( __delay (1 -> -> 250000 `l `ul ]
5414[; ;onewire.c: 390: _delay(250000);
5415"390
5416[e ( __delay (1 -> -> 250000 `l `ul ]
5417[; ;onewire.c: 391: _delay(250000);
5418"391
5419[e ( __delay (1 -> -> 250000 `l `ul ]
5420"392
5421}
5422[; ;onewire.c: 392: } else {
5423[e $U 589 ]
5424[e :U 588 ]
5425{
5426[; ;onewire.c: 395: do {
5427"395
5428[e :U 592 ]
5429{
5430[; ;onewire.c: 396: _delay(1000);
5431"396
5432[e ( __delay (1 -> -> -> 1000 `i `l `ul ]
5433"397
5434}
5435[; ;onewire.c: 397: } while (!OW_read_bit());
5436[e $ ! != -> ( _OW_read_bit .. `i -> -> -> 0 `i `uc `i 592 ]
5437[e :U 591 ]
5438"398
5439}
5440[e :U 589 ]
5441[; ;onewire.c: 398: }
5442[; ;onewire.c: 399: int_enable();
5443"399
5444[e ( _int_enable .. ]
5445[; ;onewire.c: 400: }
5446"400
5447[e :UE 587 ]
5448}
5449[a 1C 82 101 115 101 116 32 115 97 105 100 32 110 111 116 104 105 110 103 32 116 104 101 114 101 46 13 10 0 ]
5450
1-Wire to USB Bridge