Initial import of onewire-to-usb bridge
[onewire] / build / XC8_12F1822 / production / interrupts.p1
CommitLineData
bba33fe1
JM
1Version 3.2 HI-TECH Software Intermediate Code
2[s S72 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
3[n S72 . TMR1IE TMR2IE CCP1IE SSP1IE TXIE RCIE ADIE TMR1GIE ]
4[u S71 `S72 1 ]
5[n S71 . . ]
6"1274 /opt/microchip/xc8/v1.12/include/pic12f1822.h
7[v _PIE1bits `VS71 ~T0 @X0 0 e@145 ]
8[s S41 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
9[n S41 . TMR1IF TMR2IF CCP1IF SSP1IF TXIF RCIF ADIF TMR1GIF ]
10[u S40 `S41 1 ]
11[n S40 . . ]
12"715
13[v _PIR1bits `VS40 ~T0 @X0 0 e@17 ]
14"17 user.h
15[v _msg_sendnext `(v ~T0 @X0 0 ef ]
16"19
17[v _msg_recvnext `(v ~T0 @X0 0 ef ]
18[; ;pic12f1822.h: 44: extern volatile unsigned char INDF0 @ 0x000;
19"46 /opt/microchip/xc8/v1.12/include/pic12f1822.h
20[; ;pic12f1822.h: 46: asm("INDF0 equ 00h");
21[; <" INDF0 equ 00h ;# ">
22[; ;pic12f1822.h: 49: typedef union {
23[; ;pic12f1822.h: 50: struct {
24[; ;pic12f1822.h: 51: unsigned INDF0 :8;
25[; ;pic12f1822.h: 52: };
26[; ;pic12f1822.h: 53: } INDF0bits_t;
27[; ;pic12f1822.h: 54: extern volatile INDF0bits_t INDF0bits @ 0x000;
28[; ;pic12f1822.h: 63: extern volatile unsigned char INDF1 @ 0x001;
29"65
30[; ;pic12f1822.h: 65: asm("INDF1 equ 01h");
31[; <" INDF1 equ 01h ;# ">
32[; ;pic12f1822.h: 68: typedef union {
33[; ;pic12f1822.h: 69: struct {
34[; ;pic12f1822.h: 70: unsigned INDF1 :8;
35[; ;pic12f1822.h: 71: };
36[; ;pic12f1822.h: 72: } INDF1bits_t;
37[; ;pic12f1822.h: 73: extern volatile INDF1bits_t INDF1bits @ 0x001;
38[; ;pic12f1822.h: 82: extern volatile unsigned char PCL @ 0x002;
39"84
40[; ;pic12f1822.h: 84: asm("PCL equ 02h");
41[; <" PCL equ 02h ;# ">
42[; ;pic12f1822.h: 87: typedef union {
43[; ;pic12f1822.h: 88: struct {
44[; ;pic12f1822.h: 89: unsigned PCL :8;
45[; ;pic12f1822.h: 90: };
46[; ;pic12f1822.h: 91: } PCLbits_t;
47[; ;pic12f1822.h: 92: extern volatile PCLbits_t PCLbits @ 0x002;
48[; ;pic12f1822.h: 101: extern volatile unsigned char STATUS @ 0x003;
49"103
50[; ;pic12f1822.h: 103: asm("STATUS equ 03h");
51[; <" STATUS equ 03h ;# ">
52[; ;pic12f1822.h: 106: typedef union {
53[; ;pic12f1822.h: 107: struct {
54[; ;pic12f1822.h: 108: unsigned C :1;
55[; ;pic12f1822.h: 109: unsigned DC :1;
56[; ;pic12f1822.h: 110: unsigned Z :1;
57[; ;pic12f1822.h: 111: unsigned nPD :1;
58[; ;pic12f1822.h: 112: unsigned nTO :1;
59[; ;pic12f1822.h: 113: };
60[; ;pic12f1822.h: 114: struct {
61[; ;pic12f1822.h: 115: unsigned CARRY :1;
62[; ;pic12f1822.h: 116: };
63[; ;pic12f1822.h: 117: struct {
64[; ;pic12f1822.h: 118: unsigned :2;
65[; ;pic12f1822.h: 119: unsigned ZERO :1;
66[; ;pic12f1822.h: 120: };
67[; ;pic12f1822.h: 121: } STATUSbits_t;
68[; ;pic12f1822.h: 122: extern volatile STATUSbits_t STATUSbits @ 0x003;
69[; ;pic12f1822.h: 161: extern volatile unsigned short FSR0 @ 0x004;
70[; ;pic12f1822.h: 164: extern volatile unsigned char FSR0L @ 0x004;
71"166
72[; ;pic12f1822.h: 166: asm("FSR0L equ 04h");
73[; <" FSR0L equ 04h ;# ">
74[; ;pic12f1822.h: 169: typedef union {
75[; ;pic12f1822.h: 170: struct {
76[; ;pic12f1822.h: 171: unsigned FSR0L :8;
77[; ;pic12f1822.h: 172: };
78[; ;pic12f1822.h: 173: } FSR0Lbits_t;
79[; ;pic12f1822.h: 174: extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
80[; ;pic12f1822.h: 183: extern volatile unsigned char FSR0H @ 0x005;
81"185
82[; ;pic12f1822.h: 185: asm("FSR0H equ 05h");
83[; <" FSR0H equ 05h ;# ">
84[; ;pic12f1822.h: 188: typedef union {
85[; ;pic12f1822.h: 189: struct {
86[; ;pic12f1822.h: 190: unsigned FSR0H :8;
87[; ;pic12f1822.h: 191: };
88[; ;pic12f1822.h: 192: } FSR0Hbits_t;
89[; ;pic12f1822.h: 193: extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
90[; ;pic12f1822.h: 202: extern volatile unsigned short FSR1 @ 0x006;
91[; ;pic12f1822.h: 205: extern volatile unsigned char FSR1L @ 0x006;
92"207
93[; ;pic12f1822.h: 207: asm("FSR1L equ 06h");
94[; <" FSR1L equ 06h ;# ">
95[; ;pic12f1822.h: 210: typedef union {
96[; ;pic12f1822.h: 211: struct {
97[; ;pic12f1822.h: 212: unsigned FSR1L :8;
98[; ;pic12f1822.h: 213: };
99[; ;pic12f1822.h: 214: } FSR1Lbits_t;
100[; ;pic12f1822.h: 215: extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
101[; ;pic12f1822.h: 224: extern volatile unsigned char FSR1H @ 0x007;
102"226
103[; ;pic12f1822.h: 226: asm("FSR1H equ 07h");
104[; <" FSR1H equ 07h ;# ">
105[; ;pic12f1822.h: 229: typedef union {
106[; ;pic12f1822.h: 230: struct {
107[; ;pic12f1822.h: 231: unsigned FSR1H :8;
108[; ;pic12f1822.h: 232: };
109[; ;pic12f1822.h: 233: } FSR1Hbits_t;
110[; ;pic12f1822.h: 234: extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
111[; ;pic12f1822.h: 243: extern volatile unsigned char BSR @ 0x008;
112"245
113[; ;pic12f1822.h: 245: asm("BSR equ 08h");
114[; <" BSR equ 08h ;# ">
115[; ;pic12f1822.h: 248: typedef union {
116[; ;pic12f1822.h: 249: struct {
117[; ;pic12f1822.h: 250: unsigned BSR0 :1;
118[; ;pic12f1822.h: 251: unsigned BSR1 :1;
119[; ;pic12f1822.h: 252: unsigned BSR2 :1;
120[; ;pic12f1822.h: 253: unsigned BSR3 :1;
121[; ;pic12f1822.h: 254: unsigned BSR4 :1;
122[; ;pic12f1822.h: 255: };
123[; ;pic12f1822.h: 256: struct {
124[; ;pic12f1822.h: 257: unsigned BSR :5;
125[; ;pic12f1822.h: 258: };
126[; ;pic12f1822.h: 259: } BSRbits_t;
127[; ;pic12f1822.h: 260: extern volatile BSRbits_t BSRbits @ 0x008;
128[; ;pic12f1822.h: 294: extern volatile unsigned char WREG @ 0x009;
129"296
130[; ;pic12f1822.h: 296: asm("WREG equ 09h");
131[; <" WREG equ 09h ;# ">
132[; ;pic12f1822.h: 299: typedef union {
133[; ;pic12f1822.h: 300: struct {
134[; ;pic12f1822.h: 301: unsigned WREG0 :8;
135[; ;pic12f1822.h: 302: };
136[; ;pic12f1822.h: 303: } WREGbits_t;
137[; ;pic12f1822.h: 304: extern volatile WREGbits_t WREGbits @ 0x009;
138[; ;pic12f1822.h: 313: extern volatile unsigned char PCLATH @ 0x00A;
139"315
140[; ;pic12f1822.h: 315: asm("PCLATH equ 0Ah");
141[; <" PCLATH equ 0Ah ;# ">
142[; ;pic12f1822.h: 318: typedef union {
143[; ;pic12f1822.h: 319: struct {
144[; ;pic12f1822.h: 320: unsigned PCLATH :7;
145[; ;pic12f1822.h: 321: };
146[; ;pic12f1822.h: 322: } PCLATHbits_t;
147[; ;pic12f1822.h: 323: extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
148[; ;pic12f1822.h: 332: extern volatile unsigned char INTCON @ 0x00B;
149"334
150[; ;pic12f1822.h: 334: asm("INTCON equ 0Bh");
151[; <" INTCON equ 0Bh ;# ">
152[; ;pic12f1822.h: 337: typedef union {
153[; ;pic12f1822.h: 338: struct {
154[; ;pic12f1822.h: 339: unsigned IOCIF :1;
155[; ;pic12f1822.h: 340: unsigned INTF :1;
156[; ;pic12f1822.h: 341: unsigned TMR0IF :1;
157[; ;pic12f1822.h: 342: unsigned IOCIE :1;
158[; ;pic12f1822.h: 343: unsigned INTE :1;
159[; ;pic12f1822.h: 344: unsigned TMR0IE :1;
160[; ;pic12f1822.h: 345: unsigned PEIE :1;
161[; ;pic12f1822.h: 346: unsigned GIE :1;
162[; ;pic12f1822.h: 347: };
163[; ;pic12f1822.h: 348: struct {
164[; ;pic12f1822.h: 349: unsigned :2;
165[; ;pic12f1822.h: 350: unsigned T0IF :1;
166[; ;pic12f1822.h: 351: unsigned :2;
167[; ;pic12f1822.h: 352: unsigned T0IE :1;
168[; ;pic12f1822.h: 353: };
169[; ;pic12f1822.h: 354: } INTCONbits_t;
170[; ;pic12f1822.h: 355: extern volatile INTCONbits_t INTCONbits @ 0x00B;
171[; ;pic12f1822.h: 409: extern volatile unsigned char PORTA @ 0x00C;
172"411
173[; ;pic12f1822.h: 411: asm("PORTA equ 0Ch");
174[; <" PORTA equ 0Ch ;# ">
175[; ;pic12f1822.h: 414: typedef union {
176[; ;pic12f1822.h: 415: struct {
177[; ;pic12f1822.h: 416: unsigned RA0 :1;
178[; ;pic12f1822.h: 417: unsigned RA1 :1;
179[; ;pic12f1822.h: 418: unsigned RA2 :1;
180[; ;pic12f1822.h: 419: unsigned RA3 :1;
181[; ;pic12f1822.h: 420: unsigned RA4 :1;
182[; ;pic12f1822.h: 421: unsigned RA5 :1;
183[; ;pic12f1822.h: 422: };
184[; ;pic12f1822.h: 423: struct {
185[; ;pic12f1822.h: 424: unsigned AN0 :1;
186[; ;pic12f1822.h: 425: unsigned AN1 :1;
187[; ;pic12f1822.h: 426: unsigned AN2 :1;
188[; ;pic12f1822.h: 427: unsigned :1;
189[; ;pic12f1822.h: 428: unsigned AN3 :1;
190[; ;pic12f1822.h: 429: };
191[; ;pic12f1822.h: 430: struct {
192[; ;pic12f1822.h: 431: unsigned CPS0 :1;
193[; ;pic12f1822.h: 432: unsigned CPS1 :1;
194[; ;pic12f1822.h: 433: unsigned CPS2 :1;
195[; ;pic12f1822.h: 434: unsigned :1;
196[; ;pic12f1822.h: 435: unsigned CPS3 :1;
197[; ;pic12f1822.h: 436: };
198[; ;pic12f1822.h: 437: struct {
199[; ;pic12f1822.h: 438: unsigned C1INP :1;
200[; ;pic12f1822.h: 439: unsigned C1IN0N :1;
201[; ;pic12f1822.h: 440: unsigned C1OUT :1;
202[; ;pic12f1822.h: 441: unsigned :1;
203[; ;pic12f1822.h: 442: unsigned C1IN1N :1;
204[; ;pic12f1822.h: 443: };
205[; ;pic12f1822.h: 444: struct {
206[; ;pic12f1822.h: 445: unsigned DACOUT :1;
207[; ;pic12f1822.h: 446: unsigned SRI :1;
208[; ;pic12f1822.h: 447: unsigned SRQ :1;
209[; ;pic12f1822.h: 448: unsigned :2;
210[; ;pic12f1822.h: 449: unsigned SRNQ :1;
211[; ;pic12f1822.h: 450: };
212[; ;pic12f1822.h: 451: struct {
213[; ;pic12f1822.h: 452: unsigned :1;
214[; ;pic12f1822.h: 453: unsigned SCK :1;
215[; ;pic12f1822.h: 454: unsigned T0CKI :1;
216[; ;pic12f1822.h: 455: unsigned :1;
217[; ;pic12f1822.h: 456: unsigned T1OSO :1;
218[; ;pic12f1822.h: 457: unsigned T1CKI :1;
219[; ;pic12f1822.h: 458: };
220[; ;pic12f1822.h: 459: struct {
221[; ;pic12f1822.h: 460: unsigned :1;
222[; ;pic12f1822.h: 461: unsigned SCL :1;
223[; ;pic12f1822.h: 462: unsigned SDA :1;
224[; ;pic12f1822.h: 463: unsigned nMCLR :1;
225[; ;pic12f1822.h: 464: unsigned CLKR :1;
226[; ;pic12f1822.h: 465: unsigned T1OSI :1;
227[; ;pic12f1822.h: 466: };
228[; ;pic12f1822.h: 467: struct {
229[; ;pic12f1822.h: 468: unsigned MDOUT :1;
230[; ;pic12f1822.h: 469: unsigned MDMIN :1;
231[; ;pic12f1822.h: 470: unsigned MDCIN1 :1;
232[; ;pic12f1822.h: 471: unsigned :1;
233[; ;pic12f1822.h: 472: unsigned MDCIN2 :1;
234[; ;pic12f1822.h: 473: };
235[; ;pic12f1822.h: 474: struct {
236[; ;pic12f1822.h: 475: unsigned :2;
237[; ;pic12f1822.h: 476: unsigned SDI :1;
238[; ;pic12f1822.h: 477: unsigned :1;
239[; ;pic12f1822.h: 478: unsigned OSC2 :1;
240[; ;pic12f1822.h: 479: unsigned OSC1 :1;
241[; ;pic12f1822.h: 480: };
242[; ;pic12f1822.h: 481: struct {
243[; ;pic12f1822.h: 482: unsigned :2;
244[; ;pic12f1822.h: 483: unsigned FLT0 :1;
245[; ;pic12f1822.h: 484: unsigned :1;
246[; ;pic12f1822.h: 485: unsigned CLKOUT :1;
247[; ;pic12f1822.h: 486: unsigned CLKIN :1;
248[; ;pic12f1822.h: 487: };
249[; ;pic12f1822.h: 488: } PORTAbits_t;
250[; ;pic12f1822.h: 489: extern volatile PORTAbits_t PORTAbits @ 0x00C;
251[; ;pic12f1822.h: 698: extern volatile unsigned char PIR1 @ 0x011;
252"700
253[; ;pic12f1822.h: 700: asm("PIR1 equ 011h");
254[; <" PIR1 equ 011h ;# ">
255[; ;pic12f1822.h: 703: typedef union {
256[; ;pic12f1822.h: 704: struct {
257[; ;pic12f1822.h: 705: unsigned TMR1IF :1;
258[; ;pic12f1822.h: 706: unsigned TMR2IF :1;
259[; ;pic12f1822.h: 707: unsigned CCP1IF :1;
260[; ;pic12f1822.h: 708: unsigned SSP1IF :1;
261[; ;pic12f1822.h: 709: unsigned TXIF :1;
262[; ;pic12f1822.h: 710: unsigned RCIF :1;
263[; ;pic12f1822.h: 711: unsigned ADIF :1;
264[; ;pic12f1822.h: 712: unsigned TMR1GIF :1;
265[; ;pic12f1822.h: 713: };
266[; ;pic12f1822.h: 714: } PIR1bits_t;
267[; ;pic12f1822.h: 715: extern volatile PIR1bits_t PIR1bits @ 0x011;
268[; ;pic12f1822.h: 759: extern volatile unsigned char PIR2 @ 0x012;
269"761
270[; ;pic12f1822.h: 761: asm("PIR2 equ 012h");
271[; <" PIR2 equ 012h ;# ">
272[; ;pic12f1822.h: 764: typedef union {
273[; ;pic12f1822.h: 765: struct {
274[; ;pic12f1822.h: 766: unsigned :3;
275[; ;pic12f1822.h: 767: unsigned BCL1IF :1;
276[; ;pic12f1822.h: 768: unsigned EEIF :1;
277[; ;pic12f1822.h: 769: unsigned C1IF :1;
278[; ;pic12f1822.h: 770: unsigned :1;
279[; ;pic12f1822.h: 771: unsigned OSFIF :1;
280[; ;pic12f1822.h: 772: };
281[; ;pic12f1822.h: 773: } PIR2bits_t;
282[; ;pic12f1822.h: 774: extern volatile PIR2bits_t PIR2bits @ 0x012;
283[; ;pic12f1822.h: 798: extern volatile unsigned char TMR0 @ 0x015;
284"800
285[; ;pic12f1822.h: 800: asm("TMR0 equ 015h");
286[; <" TMR0 equ 015h ;# ">
287[; ;pic12f1822.h: 803: typedef union {
288[; ;pic12f1822.h: 804: struct {
289[; ;pic12f1822.h: 805: unsigned TMR0 :8;
290[; ;pic12f1822.h: 806: };
291[; ;pic12f1822.h: 807: } TMR0bits_t;
292[; ;pic12f1822.h: 808: extern volatile TMR0bits_t TMR0bits @ 0x015;
293[; ;pic12f1822.h: 817: extern volatile unsigned short TMR1 @ 0x016;
294"819
295[; ;pic12f1822.h: 819: asm("TMR1 equ 016h");
296[; <" TMR1 equ 016h ;# ">
297[; ;pic12f1822.h: 823: extern volatile unsigned char TMR1L @ 0x016;
298"825
299[; ;pic12f1822.h: 825: asm("TMR1L equ 016h");
300[; <" TMR1L equ 016h ;# ">
301[; ;pic12f1822.h: 828: typedef union {
302[; ;pic12f1822.h: 829: struct {
303[; ;pic12f1822.h: 830: unsigned TMR1L :8;
304[; ;pic12f1822.h: 831: };
305[; ;pic12f1822.h: 832: } TMR1Lbits_t;
306[; ;pic12f1822.h: 833: extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
307[; ;pic12f1822.h: 842: extern volatile unsigned char TMR1H @ 0x017;
308"844
309[; ;pic12f1822.h: 844: asm("TMR1H equ 017h");
310[; <" TMR1H equ 017h ;# ">
311[; ;pic12f1822.h: 847: typedef union {
312[; ;pic12f1822.h: 848: struct {
313[; ;pic12f1822.h: 849: unsigned TMR1H :8;
314[; ;pic12f1822.h: 850: };
315[; ;pic12f1822.h: 851: } TMR1Hbits_t;
316[; ;pic12f1822.h: 852: extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
317[; ;pic12f1822.h: 861: extern volatile unsigned char T1CON @ 0x018;
318"863
319[; ;pic12f1822.h: 863: asm("T1CON equ 018h");
320[; <" T1CON equ 018h ;# ">
321[; ;pic12f1822.h: 866: typedef union {
322[; ;pic12f1822.h: 867: struct {
323[; ;pic12f1822.h: 868: unsigned TMR1ON :1;
324[; ;pic12f1822.h: 869: unsigned :1;
325[; ;pic12f1822.h: 870: unsigned nT1SYNC :1;
326[; ;pic12f1822.h: 871: unsigned T1OSCEN :1;
327[; ;pic12f1822.h: 872: unsigned T1CKPS0 :1;
328[; ;pic12f1822.h: 873: unsigned T1CKPS1 :1;
329[; ;pic12f1822.h: 874: unsigned TMR1CS0 :1;
330[; ;pic12f1822.h: 875: unsigned TMR1CS1 :1;
331[; ;pic12f1822.h: 876: };
332[; ;pic12f1822.h: 877: struct {
333[; ;pic12f1822.h: 878: unsigned :4;
334[; ;pic12f1822.h: 879: unsigned T1CKPS :2;
335[; ;pic12f1822.h: 880: unsigned TMR1CS :2;
336[; ;pic12f1822.h: 881: };
337[; ;pic12f1822.h: 882: } T1CONbits_t;
338[; ;pic12f1822.h: 883: extern volatile T1CONbits_t T1CONbits @ 0x018;
339[; ;pic12f1822.h: 932: extern volatile unsigned char T1GCON @ 0x019;
340"934
341[; ;pic12f1822.h: 934: asm("T1GCON equ 019h");
342[; <" T1GCON equ 019h ;# ">
343[; ;pic12f1822.h: 937: typedef union {
344[; ;pic12f1822.h: 938: struct {
345[; ;pic12f1822.h: 939: unsigned T1GSS0 :1;
346[; ;pic12f1822.h: 940: unsigned T1GSS1 :1;
347[; ;pic12f1822.h: 941: unsigned T1GVAL :1;
348[; ;pic12f1822.h: 942: unsigned T1GGO_nDONE :1;
349[; ;pic12f1822.h: 943: unsigned T1GSPM :1;
350[; ;pic12f1822.h: 944: unsigned T1GTM :1;
351[; ;pic12f1822.h: 945: unsigned T1GPOL :1;
352[; ;pic12f1822.h: 946: unsigned TMR1GE :1;
353[; ;pic12f1822.h: 947: };
354[; ;pic12f1822.h: 948: struct {
355[; ;pic12f1822.h: 949: unsigned T1GSS :2;
356[; ;pic12f1822.h: 950: unsigned :1;
357[; ;pic12f1822.h: 951: unsigned T1GGO :1;
358[; ;pic12f1822.h: 952: };
359[; ;pic12f1822.h: 953: } T1GCONbits_t;
360[; ;pic12f1822.h: 954: extern volatile T1GCONbits_t T1GCONbits @ 0x019;
361[; ;pic12f1822.h: 1008: extern volatile unsigned char TMR2 @ 0x01A;
362"1010
363[; ;pic12f1822.h: 1010: asm("TMR2 equ 01Ah");
364[; <" TMR2 equ 01Ah ;# ">
365[; ;pic12f1822.h: 1013: typedef union {
366[; ;pic12f1822.h: 1014: struct {
367[; ;pic12f1822.h: 1015: unsigned TMR2 :8;
368[; ;pic12f1822.h: 1016: };
369[; ;pic12f1822.h: 1017: } TMR2bits_t;
370[; ;pic12f1822.h: 1018: extern volatile TMR2bits_t TMR2bits @ 0x01A;
371[; ;pic12f1822.h: 1027: extern volatile unsigned char PR2 @ 0x01B;
372"1029
373[; ;pic12f1822.h: 1029: asm("PR2 equ 01Bh");
374[; <" PR2 equ 01Bh ;# ">
375[; ;pic12f1822.h: 1032: typedef union {
376[; ;pic12f1822.h: 1033: struct {
377[; ;pic12f1822.h: 1034: unsigned PR2 :8;
378[; ;pic12f1822.h: 1035: };
379[; ;pic12f1822.h: 1036: } PR2bits_t;
380[; ;pic12f1822.h: 1037: extern volatile PR2bits_t PR2bits @ 0x01B;
381[; ;pic12f1822.h: 1046: extern volatile unsigned char T2CON @ 0x01C;
382"1048
383[; ;pic12f1822.h: 1048: asm("T2CON equ 01Ch");
384[; <" T2CON equ 01Ch ;# ">
385[; ;pic12f1822.h: 1051: typedef union {
386[; ;pic12f1822.h: 1052: struct {
387[; ;pic12f1822.h: 1053: unsigned T2CKPS0 :1;
388[; ;pic12f1822.h: 1054: unsigned T2CKPS1 :1;
389[; ;pic12f1822.h: 1055: unsigned TMR2ON :1;
390[; ;pic12f1822.h: 1056: unsigned T2OUTPS0 :1;
391[; ;pic12f1822.h: 1057: unsigned T2OUTPS1 :1;
392[; ;pic12f1822.h: 1058: unsigned T2OUTPS2 :1;
393[; ;pic12f1822.h: 1059: unsigned T2OUTPS3 :1;
394[; ;pic12f1822.h: 1060: };
395[; ;pic12f1822.h: 1061: struct {
396[; ;pic12f1822.h: 1062: unsigned T2CKPS :2;
397[; ;pic12f1822.h: 1063: unsigned :1;
398[; ;pic12f1822.h: 1064: unsigned T2OUTPS :4;
399[; ;pic12f1822.h: 1065: };
400[; ;pic12f1822.h: 1066: } T2CONbits_t;
401[; ;pic12f1822.h: 1067: extern volatile T2CONbits_t T2CONbits @ 0x01C;
402[; ;pic12f1822.h: 1116: extern volatile unsigned char CPSCON0 @ 0x01E;
403"1118
404[; ;pic12f1822.h: 1118: asm("CPSCON0 equ 01Eh");
405[; <" CPSCON0 equ 01Eh ;# ">
406[; ;pic12f1822.h: 1121: typedef union {
407[; ;pic12f1822.h: 1122: struct {
408[; ;pic12f1822.h: 1123: unsigned T0XCS :1;
409[; ;pic12f1822.h: 1124: unsigned CPSOUT :1;
410[; ;pic12f1822.h: 1125: unsigned CPSRNG0 :1;
411[; ;pic12f1822.h: 1126: unsigned CPSRNG1 :1;
412[; ;pic12f1822.h: 1127: unsigned :2;
413[; ;pic12f1822.h: 1128: unsigned CPSRM :1;
414[; ;pic12f1822.h: 1129: unsigned CPSON :1;
415[; ;pic12f1822.h: 1130: };
416[; ;pic12f1822.h: 1131: struct {
417[; ;pic12f1822.h: 1132: unsigned :2;
418[; ;pic12f1822.h: 1133: unsigned CPSRNG :2;
419[; ;pic12f1822.h: 1134: };
420[; ;pic12f1822.h: 1135: } CPSCON0bits_t;
421[; ;pic12f1822.h: 1136: extern volatile CPSCON0bits_t CPSCON0bits @ 0x01E;
422[; ;pic12f1822.h: 1175: extern volatile unsigned char CPSCON1 @ 0x01F;
423"1177
424[; ;pic12f1822.h: 1177: asm("CPSCON1 equ 01Fh");
425[; <" CPSCON1 equ 01Fh ;# ">
426[; ;pic12f1822.h: 1180: typedef union {
427[; ;pic12f1822.h: 1181: struct {
428[; ;pic12f1822.h: 1182: unsigned CPSCH0 :1;
429[; ;pic12f1822.h: 1183: unsigned CPSCH1 :1;
430[; ;pic12f1822.h: 1184: };
431[; ;pic12f1822.h: 1185: struct {
432[; ;pic12f1822.h: 1186: unsigned CPSCH :2;
433[; ;pic12f1822.h: 1187: };
434[; ;pic12f1822.h: 1188: } CPSCON1bits_t;
435[; ;pic12f1822.h: 1189: extern volatile CPSCON1bits_t CPSCON1bits @ 0x01F;
436[; ;pic12f1822.h: 1208: extern volatile unsigned char TRISA @ 0x08C;
437"1210
438[; ;pic12f1822.h: 1210: asm("TRISA equ 08Ch");
439[; <" TRISA equ 08Ch ;# ">
440[; ;pic12f1822.h: 1213: typedef union {
441[; ;pic12f1822.h: 1214: struct {
442[; ;pic12f1822.h: 1215: unsigned TRISA0 :1;
443[; ;pic12f1822.h: 1216: unsigned TRISA1 :1;
444[; ;pic12f1822.h: 1217: unsigned TRISA2 :1;
445[; ;pic12f1822.h: 1218: unsigned TRISA3 :1;
446[; ;pic12f1822.h: 1219: unsigned TRISA4 :1;
447[; ;pic12f1822.h: 1220: unsigned TRISA5 :1;
448[; ;pic12f1822.h: 1221: };
449[; ;pic12f1822.h: 1222: } TRISAbits_t;
450[; ;pic12f1822.h: 1223: extern volatile TRISAbits_t TRISAbits @ 0x08C;
451[; ;pic12f1822.h: 1257: extern volatile unsigned char PIE1 @ 0x091;
452"1259
453[; ;pic12f1822.h: 1259: asm("PIE1 equ 091h");
454[; <" PIE1 equ 091h ;# ">
455[; ;pic12f1822.h: 1262: typedef union {
456[; ;pic12f1822.h: 1263: struct {
457[; ;pic12f1822.h: 1264: unsigned TMR1IE :1;
458[; ;pic12f1822.h: 1265: unsigned TMR2IE :1;
459[; ;pic12f1822.h: 1266: unsigned CCP1IE :1;
460[; ;pic12f1822.h: 1267: unsigned SSP1IE :1;
461[; ;pic12f1822.h: 1268: unsigned TXIE :1;
462[; ;pic12f1822.h: 1269: unsigned RCIE :1;
463[; ;pic12f1822.h: 1270: unsigned ADIE :1;
464[; ;pic12f1822.h: 1271: unsigned TMR1GIE :1;
465[; ;pic12f1822.h: 1272: };
466[; ;pic12f1822.h: 1273: } PIE1bits_t;
467[; ;pic12f1822.h: 1274: extern volatile PIE1bits_t PIE1bits @ 0x091;
468[; ;pic12f1822.h: 1318: extern volatile unsigned char PIE2 @ 0x092;
469"1320
470[; ;pic12f1822.h: 1320: asm("PIE2 equ 092h");
471[; <" PIE2 equ 092h ;# ">
472[; ;pic12f1822.h: 1323: typedef union {
473[; ;pic12f1822.h: 1324: struct {
474[; ;pic12f1822.h: 1325: unsigned :3;
475[; ;pic12f1822.h: 1326: unsigned BCL1IE :1;
476[; ;pic12f1822.h: 1327: unsigned EEIE :1;
477[; ;pic12f1822.h: 1328: unsigned C1IE :1;
478[; ;pic12f1822.h: 1329: unsigned :1;
479[; ;pic12f1822.h: 1330: unsigned OSFIE :1;
480[; ;pic12f1822.h: 1331: };
481[; ;pic12f1822.h: 1332: } PIE2bits_t;
482[; ;pic12f1822.h: 1333: extern volatile PIE2bits_t PIE2bits @ 0x092;
483[; ;pic12f1822.h: 1357: extern volatile unsigned char OPTION_REG @ 0x095;
484"1359
485[; ;pic12f1822.h: 1359: asm("OPTION_REG equ 095h");
486[; <" OPTION_REG equ 095h ;# ">
487[; ;pic12f1822.h: 1362: typedef union {
488[; ;pic12f1822.h: 1363: struct {
489[; ;pic12f1822.h: 1364: unsigned PS0 :1;
490[; ;pic12f1822.h: 1365: unsigned PS1 :1;
491[; ;pic12f1822.h: 1366: unsigned PS2 :1;
492[; ;pic12f1822.h: 1367: unsigned PSA :1;
493[; ;pic12f1822.h: 1368: unsigned TMR0SE :1;
494[; ;pic12f1822.h: 1369: unsigned TMR0CS :1;
495[; ;pic12f1822.h: 1370: unsigned INTEDG :1;
496[; ;pic12f1822.h: 1371: unsigned nWPUEN :1;
497[; ;pic12f1822.h: 1372: };
498[; ;pic12f1822.h: 1373: struct {
499[; ;pic12f1822.h: 1374: unsigned PS :3;
500[; ;pic12f1822.h: 1375: unsigned :1;
501[; ;pic12f1822.h: 1376: unsigned T0SE :1;
502[; ;pic12f1822.h: 1377: unsigned T0CS :1;
503[; ;pic12f1822.h: 1378: };
504[; ;pic12f1822.h: 1379: } OPTION_REGbits_t;
505[; ;pic12f1822.h: 1380: extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
506[; ;pic12f1822.h: 1439: extern volatile unsigned char PCON @ 0x096;
507"1441
508[; ;pic12f1822.h: 1441: asm("PCON equ 096h");
509[; <" PCON equ 096h ;# ">
510[; ;pic12f1822.h: 1444: typedef union {
511[; ;pic12f1822.h: 1445: struct {
512[; ;pic12f1822.h: 1446: unsigned nBOR :1;
513[; ;pic12f1822.h: 1447: unsigned nPOR :1;
514[; ;pic12f1822.h: 1448: unsigned nRI :1;
515[; ;pic12f1822.h: 1449: unsigned nRMCLR :1;
516[; ;pic12f1822.h: 1450: unsigned :2;
517[; ;pic12f1822.h: 1451: unsigned STKUNF :1;
518[; ;pic12f1822.h: 1452: unsigned STKOVF :1;
519[; ;pic12f1822.h: 1453: };
520[; ;pic12f1822.h: 1454: } PCONbits_t;
521[; ;pic12f1822.h: 1455: extern volatile PCONbits_t PCONbits @ 0x096;
522[; ;pic12f1822.h: 1489: extern volatile unsigned char WDTCON @ 0x097;
523"1491
524[; ;pic12f1822.h: 1491: asm("WDTCON equ 097h");
525[; <" WDTCON equ 097h ;# ">
526[; ;pic12f1822.h: 1494: typedef union {
527[; ;pic12f1822.h: 1495: struct {
528[; ;pic12f1822.h: 1496: unsigned SWDTEN :1;
529[; ;pic12f1822.h: 1497: unsigned WDTPS0 :1;
530[; ;pic12f1822.h: 1498: unsigned WDTPS1 :1;
531[; ;pic12f1822.h: 1499: unsigned WDTPS2 :1;
532[; ;pic12f1822.h: 1500: unsigned WDTPS3 :1;
533[; ;pic12f1822.h: 1501: unsigned WDTPS4 :1;
534[; ;pic12f1822.h: 1502: };
535[; ;pic12f1822.h: 1503: struct {
536[; ;pic12f1822.h: 1504: unsigned :1;
537[; ;pic12f1822.h: 1505: unsigned WDTPS :5;
538[; ;pic12f1822.h: 1506: };
539[; ;pic12f1822.h: 1507: } WDTCONbits_t;
540[; ;pic12f1822.h: 1508: extern volatile WDTCONbits_t WDTCONbits @ 0x097;
541[; ;pic12f1822.h: 1547: extern volatile unsigned char OSCTUNE @ 0x098;
542"1549
543[; ;pic12f1822.h: 1549: asm("OSCTUNE equ 098h");
544[; <" OSCTUNE equ 098h ;# ">
545[; ;pic12f1822.h: 1552: typedef union {
546[; ;pic12f1822.h: 1553: struct {
547[; ;pic12f1822.h: 1554: unsigned TUN0 :1;
548[; ;pic12f1822.h: 1555: unsigned TUN1 :1;
549[; ;pic12f1822.h: 1556: unsigned TUN2 :1;
550[; ;pic12f1822.h: 1557: unsigned TUN3 :1;
551[; ;pic12f1822.h: 1558: unsigned TUN4 :1;
552[; ;pic12f1822.h: 1559: unsigned TUN5 :1;
553[; ;pic12f1822.h: 1560: };
554[; ;pic12f1822.h: 1561: struct {
555[; ;pic12f1822.h: 1562: unsigned TUN :6;
556[; ;pic12f1822.h: 1563: };
557[; ;pic12f1822.h: 1564: } OSCTUNEbits_t;
558[; ;pic12f1822.h: 1565: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
559[; ;pic12f1822.h: 1604: extern volatile unsigned char OSCCON @ 0x099;
560"1606
561[; ;pic12f1822.h: 1606: asm("OSCCON equ 099h");
562[; <" OSCCON equ 099h ;# ">
563[; ;pic12f1822.h: 1609: typedef union {
564[; ;pic12f1822.h: 1610: struct {
565[; ;pic12f1822.h: 1611: unsigned SCS0 :1;
566[; ;pic12f1822.h: 1612: unsigned SCS1 :1;
567[; ;pic12f1822.h: 1613: unsigned :1;
568[; ;pic12f1822.h: 1614: unsigned IRCF0 :1;
569[; ;pic12f1822.h: 1615: unsigned IRCF1 :1;
570[; ;pic12f1822.h: 1616: unsigned IRCF2 :1;
571[; ;pic12f1822.h: 1617: unsigned IRCF3 :1;
572[; ;pic12f1822.h: 1618: unsigned SPLLEN :1;
573[; ;pic12f1822.h: 1619: };
574[; ;pic12f1822.h: 1620: struct {
575[; ;pic12f1822.h: 1621: unsigned SCS :2;
576[; ;pic12f1822.h: 1622: unsigned :1;
577[; ;pic12f1822.h: 1623: unsigned IRCF :4;
578[; ;pic12f1822.h: 1624: };
579[; ;pic12f1822.h: 1625: } OSCCONbits_t;
580[; ;pic12f1822.h: 1626: extern volatile OSCCONbits_t OSCCONbits @ 0x099;
581[; ;pic12f1822.h: 1675: extern volatile unsigned char OSCSTAT @ 0x09A;
582"1677
583[; ;pic12f1822.h: 1677: asm("OSCSTAT equ 09Ah");
584[; <" OSCSTAT equ 09Ah ;# ">
585[; ;pic12f1822.h: 1680: typedef union {
586[; ;pic12f1822.h: 1681: struct {
587[; ;pic12f1822.h: 1682: unsigned HFIOFS :1;
588[; ;pic12f1822.h: 1683: unsigned LFIOFR :1;
589[; ;pic12f1822.h: 1684: unsigned MFIOFR :1;
590[; ;pic12f1822.h: 1685: unsigned HFIOFL :1;
591[; ;pic12f1822.h: 1686: unsigned HFIOFR :1;
592[; ;pic12f1822.h: 1687: unsigned OSTS :1;
593[; ;pic12f1822.h: 1688: unsigned PLLR :1;
594[; ;pic12f1822.h: 1689: unsigned T1OSCR :1;
595[; ;pic12f1822.h: 1690: };
596[; ;pic12f1822.h: 1691: } OSCSTATbits_t;
597[; ;pic12f1822.h: 1692: extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
598[; ;pic12f1822.h: 1736: extern volatile unsigned short ADRES @ 0x09B;
599"1738
600[; ;pic12f1822.h: 1738: asm("ADRES equ 09Bh");
601[; <" ADRES equ 09Bh ;# ">
602[; ;pic12f1822.h: 1742: extern volatile unsigned char ADRESL @ 0x09B;
603"1744
604[; ;pic12f1822.h: 1744: asm("ADRESL equ 09Bh");
605[; <" ADRESL equ 09Bh ;# ">
606[; ;pic12f1822.h: 1747: typedef union {
607[; ;pic12f1822.h: 1748: struct {
608[; ;pic12f1822.h: 1749: unsigned ADRESL :8;
609[; ;pic12f1822.h: 1750: };
610[; ;pic12f1822.h: 1751: } ADRESLbits_t;
611[; ;pic12f1822.h: 1752: extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
612[; ;pic12f1822.h: 1761: extern volatile unsigned char ADRESH @ 0x09C;
613"1763
614[; ;pic12f1822.h: 1763: asm("ADRESH equ 09Ch");
615[; <" ADRESH equ 09Ch ;# ">
616[; ;pic12f1822.h: 1766: typedef union {
617[; ;pic12f1822.h: 1767: struct {
618[; ;pic12f1822.h: 1768: unsigned ADRESH :8;
619[; ;pic12f1822.h: 1769: };
620[; ;pic12f1822.h: 1770: } ADRESHbits_t;
621[; ;pic12f1822.h: 1771: extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
622[; ;pic12f1822.h: 1780: extern volatile unsigned char ADCON0 @ 0x09D;
623"1782
624[; ;pic12f1822.h: 1782: asm("ADCON0 equ 09Dh");
625[; <" ADCON0 equ 09Dh ;# ">
626[; ;pic12f1822.h: 1785: typedef union {
627[; ;pic12f1822.h: 1786: struct {
628[; ;pic12f1822.h: 1787: unsigned ADON :1;
629[; ;pic12f1822.h: 1788: unsigned GO_nDONE :1;
630[; ;pic12f1822.h: 1789: unsigned CHS0 :1;
631[; ;pic12f1822.h: 1790: unsigned CHS1 :1;
632[; ;pic12f1822.h: 1791: unsigned CHS2 :1;
633[; ;pic12f1822.h: 1792: unsigned CHS3 :1;
634[; ;pic12f1822.h: 1793: unsigned CHS4 :1;
635[; ;pic12f1822.h: 1794: };
636[; ;pic12f1822.h: 1795: struct {
637[; ;pic12f1822.h: 1796: unsigned :1;
638[; ;pic12f1822.h: 1797: unsigned ADGO :1;
639[; ;pic12f1822.h: 1798: unsigned CHS :5;
640[; ;pic12f1822.h: 1799: };
641[; ;pic12f1822.h: 1800: struct {
642[; ;pic12f1822.h: 1801: unsigned :1;
643[; ;pic12f1822.h: 1802: unsigned GO :1;
644[; ;pic12f1822.h: 1803: };
645[; ;pic12f1822.h: 1804: struct {
646[; ;pic12f1822.h: 1805: unsigned :1;
647[; ;pic12f1822.h: 1806: unsigned nDONE :1;
648[; ;pic12f1822.h: 1807: };
649[; ;pic12f1822.h: 1808: } ADCON0bits_t;
650[; ;pic12f1822.h: 1809: extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
651[; ;pic12f1822.h: 1868: extern volatile unsigned char ADCON1 @ 0x09E;
652"1870
653[; ;pic12f1822.h: 1870: asm("ADCON1 equ 09Eh");
654[; <" ADCON1 equ 09Eh ;# ">
655[; ;pic12f1822.h: 1873: typedef union {
656[; ;pic12f1822.h: 1874: struct {
657[; ;pic12f1822.h: 1875: unsigned ADPREF0 :1;
658[; ;pic12f1822.h: 1876: unsigned ADPREF1 :1;
659[; ;pic12f1822.h: 1877: unsigned :2;
660[; ;pic12f1822.h: 1878: unsigned ADCS0 :1;
661[; ;pic12f1822.h: 1879: unsigned ADCS1 :1;
662[; ;pic12f1822.h: 1880: unsigned ADCS2 :1;
663[; ;pic12f1822.h: 1881: unsigned ADFM :1;
664[; ;pic12f1822.h: 1882: };
665[; ;pic12f1822.h: 1883: struct {
666[; ;pic12f1822.h: 1884: unsigned ADPREF :2;
667[; ;pic12f1822.h: 1885: unsigned :2;
668[; ;pic12f1822.h: 1886: unsigned ADCS :3;
669[; ;pic12f1822.h: 1887: };
670[; ;pic12f1822.h: 1888: } ADCON1bits_t;
671[; ;pic12f1822.h: 1889: extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
672[; ;pic12f1822.h: 1933: extern volatile unsigned char LATA @ 0x10C;
673"1935
674[; ;pic12f1822.h: 1935: asm("LATA equ 010Ch");
675[; <" LATA equ 010Ch ;# ">
676[; ;pic12f1822.h: 1938: typedef union {
677[; ;pic12f1822.h: 1939: struct {
678[; ;pic12f1822.h: 1940: unsigned LATA0 :1;
679[; ;pic12f1822.h: 1941: unsigned LATA1 :1;
680[; ;pic12f1822.h: 1942: unsigned LATA2 :1;
681[; ;pic12f1822.h: 1943: unsigned :1;
682[; ;pic12f1822.h: 1944: unsigned LATA4 :1;
683[; ;pic12f1822.h: 1945: unsigned LATA5 :1;
684[; ;pic12f1822.h: 1946: };
685[; ;pic12f1822.h: 1947: } LATAbits_t;
686[; ;pic12f1822.h: 1948: extern volatile LATAbits_t LATAbits @ 0x10C;
687[; ;pic12f1822.h: 1977: extern volatile unsigned char CM1CON0 @ 0x111;
688"1979
689[; ;pic12f1822.h: 1979: asm("CM1CON0 equ 0111h");
690[; <" CM1CON0 equ 0111h ;# ">
691[; ;pic12f1822.h: 1982: typedef union {
692[; ;pic12f1822.h: 1983: struct {
693[; ;pic12f1822.h: 1984: unsigned C1SYNC :1;
694[; ;pic12f1822.h: 1985: unsigned C1HYS :1;
695[; ;pic12f1822.h: 1986: unsigned C1SP :1;
696[; ;pic12f1822.h: 1987: unsigned :1;
697[; ;pic12f1822.h: 1988: unsigned C1POL :1;
698[; ;pic12f1822.h: 1989: unsigned C1OE :1;
699[; ;pic12f1822.h: 1990: unsigned C1OUT :1;
700[; ;pic12f1822.h: 1991: unsigned C1ON :1;
701[; ;pic12f1822.h: 1992: };
702[; ;pic12f1822.h: 1993: } CM1CON0bits_t;
703[; ;pic12f1822.h: 1994: extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
704[; ;pic12f1822.h: 2033: extern volatile unsigned char CM1CON1 @ 0x112;
705"2035
706[; ;pic12f1822.h: 2035: asm("CM1CON1 equ 0112h");
707[; <" CM1CON1 equ 0112h ;# ">
708[; ;pic12f1822.h: 2038: typedef union {
709[; ;pic12f1822.h: 2039: struct {
710[; ;pic12f1822.h: 2040: unsigned C1NCH0 :1;
711[; ;pic12f1822.h: 2041: unsigned :3;
712[; ;pic12f1822.h: 2042: unsigned C1PCH0 :1;
713[; ;pic12f1822.h: 2043: unsigned C1PCH1 :1;
714[; ;pic12f1822.h: 2044: unsigned C1INTN :1;
715[; ;pic12f1822.h: 2045: unsigned C1INTP :1;
716[; ;pic12f1822.h: 2046: };
717[; ;pic12f1822.h: 2047: struct {
718[; ;pic12f1822.h: 2048: unsigned :4;
719[; ;pic12f1822.h: 2049: unsigned C1PCH :2;
720[; ;pic12f1822.h: 2050: };
721[; ;pic12f1822.h: 2051: } CM1CON1bits_t;
722[; ;pic12f1822.h: 2052: extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
723[; ;pic12f1822.h: 2086: extern volatile unsigned char CMOUT @ 0x115;
724"2088
725[; ;pic12f1822.h: 2088: asm("CMOUT equ 0115h");
726[; <" CMOUT equ 0115h ;# ">
727[; ;pic12f1822.h: 2091: typedef union {
728[; ;pic12f1822.h: 2092: struct {
729[; ;pic12f1822.h: 2093: unsigned MC1OUT :1;
730[; ;pic12f1822.h: 2094: };
731[; ;pic12f1822.h: 2095: } CMOUTbits_t;
732[; ;pic12f1822.h: 2096: extern volatile CMOUTbits_t CMOUTbits @ 0x115;
733[; ;pic12f1822.h: 2105: extern volatile unsigned char BORCON @ 0x116;
734"2107
735[; ;pic12f1822.h: 2107: asm("BORCON equ 0116h");
736[; <" BORCON equ 0116h ;# ">
737[; ;pic12f1822.h: 2110: typedef union {
738[; ;pic12f1822.h: 2111: struct {
739[; ;pic12f1822.h: 2112: unsigned BORRDY :1;
740[; ;pic12f1822.h: 2113: unsigned :6;
741[; ;pic12f1822.h: 2114: unsigned SBOREN :1;
742[; ;pic12f1822.h: 2115: };
743[; ;pic12f1822.h: 2116: } BORCONbits_t;
744[; ;pic12f1822.h: 2117: extern volatile BORCONbits_t BORCONbits @ 0x116;
745[; ;pic12f1822.h: 2131: extern volatile unsigned char FVRCON @ 0x117;
746"2133
747[; ;pic12f1822.h: 2133: asm("FVRCON equ 0117h");
748[; <" FVRCON equ 0117h ;# ">
749[; ;pic12f1822.h: 2136: typedef union {
750[; ;pic12f1822.h: 2137: struct {
751[; ;pic12f1822.h: 2138: unsigned ADFVR0 :1;
752[; ;pic12f1822.h: 2139: unsigned ADFVR1 :1;
753[; ;pic12f1822.h: 2140: unsigned CDAFVR0 :1;
754[; ;pic12f1822.h: 2141: unsigned CDAFVR1 :1;
755[; ;pic12f1822.h: 2142: unsigned TSRNG :1;
756[; ;pic12f1822.h: 2143: unsigned TSEN :1;
757[; ;pic12f1822.h: 2144: unsigned FVRRDY :1;
758[; ;pic12f1822.h: 2145: unsigned FVREN :1;
759[; ;pic12f1822.h: 2146: };
760[; ;pic12f1822.h: 2147: struct {
761[; ;pic12f1822.h: 2148: unsigned ADFVR :2;
762[; ;pic12f1822.h: 2149: unsigned CDAFVR :2;
763[; ;pic12f1822.h: 2150: };
764[; ;pic12f1822.h: 2151: } FVRCONbits_t;
765[; ;pic12f1822.h: 2152: extern volatile FVRCONbits_t FVRCONbits @ 0x117;
766[; ;pic12f1822.h: 2206: extern volatile unsigned char DACCON0 @ 0x118;
767"2208
768[; ;pic12f1822.h: 2208: asm("DACCON0 equ 0118h");
769[; <" DACCON0 equ 0118h ;# ">
770[; ;pic12f1822.h: 2211: typedef union {
771[; ;pic12f1822.h: 2212: struct {
772[; ;pic12f1822.h: 2213: unsigned :2;
773[; ;pic12f1822.h: 2214: unsigned DACPSS0 :1;
774[; ;pic12f1822.h: 2215: unsigned DACPSS1 :1;
775[; ;pic12f1822.h: 2216: unsigned :1;
776[; ;pic12f1822.h: 2217: unsigned DACOE :1;
777[; ;pic12f1822.h: 2218: unsigned DACLPS :1;
778[; ;pic12f1822.h: 2219: unsigned DACEN :1;
779[; ;pic12f1822.h: 2220: };
780[; ;pic12f1822.h: 2221: struct {
781[; ;pic12f1822.h: 2222: unsigned :2;
782[; ;pic12f1822.h: 2223: unsigned DACPSS :2;
783[; ;pic12f1822.h: 2224: };
784[; ;pic12f1822.h: 2225: } DACCON0bits_t;
785[; ;pic12f1822.h: 2226: extern volatile DACCON0bits_t DACCON0bits @ 0x118;
786[; ;pic12f1822.h: 2260: extern volatile unsigned char DACCON1 @ 0x119;
787"2262
788[; ;pic12f1822.h: 2262: asm("DACCON1 equ 0119h");
789[; <" DACCON1 equ 0119h ;# ">
790[; ;pic12f1822.h: 2265: typedef union {
791[; ;pic12f1822.h: 2266: struct {
792[; ;pic12f1822.h: 2267: unsigned DACR0 :1;
793[; ;pic12f1822.h: 2268: unsigned DACR1 :1;
794[; ;pic12f1822.h: 2269: unsigned DACR2 :1;
795[; ;pic12f1822.h: 2270: unsigned DACR3 :1;
796[; ;pic12f1822.h: 2271: unsigned DACR4 :1;
797[; ;pic12f1822.h: 2272: };
798[; ;pic12f1822.h: 2273: struct {
799[; ;pic12f1822.h: 2274: unsigned DACR :5;
800[; ;pic12f1822.h: 2275: };
801[; ;pic12f1822.h: 2276: } DACCON1bits_t;
802[; ;pic12f1822.h: 2277: extern volatile DACCON1bits_t DACCON1bits @ 0x119;
803[; ;pic12f1822.h: 2311: extern volatile unsigned char SRCON0 @ 0x11A;
804"2313
805[; ;pic12f1822.h: 2313: asm("SRCON0 equ 011Ah");
806[; <" SRCON0 equ 011Ah ;# ">
807[; ;pic12f1822.h: 2316: typedef union {
808[; ;pic12f1822.h: 2317: struct {
809[; ;pic12f1822.h: 2318: unsigned SRPR :1;
810[; ;pic12f1822.h: 2319: unsigned SRPS :1;
811[; ;pic12f1822.h: 2320: unsigned SRNQEN :1;
812[; ;pic12f1822.h: 2321: unsigned SRQEN :1;
813[; ;pic12f1822.h: 2322: unsigned SRCLK0 :1;
814[; ;pic12f1822.h: 2323: unsigned SRCLK1 :1;
815[; ;pic12f1822.h: 2324: unsigned SRCLK2 :1;
816[; ;pic12f1822.h: 2325: unsigned SRLEN :1;
817[; ;pic12f1822.h: 2326: };
818[; ;pic12f1822.h: 2327: struct {
819[; ;pic12f1822.h: 2328: unsigned :4;
820[; ;pic12f1822.h: 2329: unsigned SRCLK :3;
821[; ;pic12f1822.h: 2330: };
822[; ;pic12f1822.h: 2331: } SRCON0bits_t;
823[; ;pic12f1822.h: 2332: extern volatile SRCON0bits_t SRCON0bits @ 0x11A;
824[; ;pic12f1822.h: 2381: extern volatile unsigned char SRCON1 @ 0x11B;
825"2383
826[; ;pic12f1822.h: 2383: asm("SRCON1 equ 011Bh");
827[; <" SRCON1 equ 011Bh ;# ">
828[; ;pic12f1822.h: 2386: typedef union {
829[; ;pic12f1822.h: 2387: struct {
830[; ;pic12f1822.h: 2388: unsigned SRRC1E :1;
831[; ;pic12f1822.h: 2389: unsigned :1;
832[; ;pic12f1822.h: 2390: unsigned SRRCKE :1;
833[; ;pic12f1822.h: 2391: unsigned SRRPE :1;
834[; ;pic12f1822.h: 2392: unsigned SRSC1E :1;
835[; ;pic12f1822.h: 2393: unsigned :1;
836[; ;pic12f1822.h: 2394: unsigned SRSCKE :1;
837[; ;pic12f1822.h: 2395: unsigned SRSPE :1;
838[; ;pic12f1822.h: 2396: };
839[; ;pic12f1822.h: 2397: } SRCON1bits_t;
840[; ;pic12f1822.h: 2398: extern volatile SRCON1bits_t SRCON1bits @ 0x11B;
841[; ;pic12f1822.h: 2432: extern volatile unsigned char APFCON @ 0x11D;
842"2434
843[; ;pic12f1822.h: 2434: asm("APFCON equ 011Dh");
844[; <" APFCON equ 011Dh ;# ">
845[; ;pic12f1822.h: 2437: extern volatile unsigned char APFCON0 @ 0x11D;
846"2439
847[; ;pic12f1822.h: 2439: asm("APFCON0 equ 011Dh");
848[; <" APFCON0 equ 011Dh ;# ">
849[; ;pic12f1822.h: 2442: typedef union {
850[; ;pic12f1822.h: 2443: struct {
851[; ;pic12f1822.h: 2444: unsigned CCP1SEL :1;
852[; ;pic12f1822.h: 2445: unsigned P1BSEL :1;
853[; ;pic12f1822.h: 2446: unsigned TXCKSEL :1;
854[; ;pic12f1822.h: 2447: unsigned T1GSEL :1;
855[; ;pic12f1822.h: 2448: unsigned :1;
856[; ;pic12f1822.h: 2449: unsigned SSSEL :1;
857[; ;pic12f1822.h: 2450: unsigned SDOSEL :1;
858[; ;pic12f1822.h: 2451: unsigned RXDTSEL :1;
859[; ;pic12f1822.h: 2452: };
860[; ;pic12f1822.h: 2453: struct {
861[; ;pic12f1822.h: 2454: unsigned :5;
862[; ;pic12f1822.h: 2455: unsigned SS1SEL :1;
863[; ;pic12f1822.h: 2456: unsigned SDO1SEL :1;
864[; ;pic12f1822.h: 2457: };
865[; ;pic12f1822.h: 2458: } APFCONbits_t;
866[; ;pic12f1822.h: 2459: extern volatile APFCONbits_t APFCONbits @ 0x11D;
867[; ;pic12f1822.h: 2507: typedef union {
868[; ;pic12f1822.h: 2508: struct {
869[; ;pic12f1822.h: 2509: unsigned CCP1SEL :1;
870[; ;pic12f1822.h: 2510: unsigned P1BSEL :1;
871[; ;pic12f1822.h: 2511: unsigned TXCKSEL :1;
872[; ;pic12f1822.h: 2512: unsigned T1GSEL :1;
873[; ;pic12f1822.h: 2513: unsigned :1;
874[; ;pic12f1822.h: 2514: unsigned SSSEL :1;
875[; ;pic12f1822.h: 2515: unsigned SDOSEL :1;
876[; ;pic12f1822.h: 2516: unsigned RXDTSEL :1;
877[; ;pic12f1822.h: 2517: };
878[; ;pic12f1822.h: 2518: struct {
879[; ;pic12f1822.h: 2519: unsigned :5;
880[; ;pic12f1822.h: 2520: unsigned SS1SEL :1;
881[; ;pic12f1822.h: 2521: unsigned SDO1SEL :1;
882[; ;pic12f1822.h: 2522: };
883[; ;pic12f1822.h: 2523: } APFCON0bits_t;
884[; ;pic12f1822.h: 2524: extern volatile APFCON0bits_t APFCON0bits @ 0x11D;
885[; ;pic12f1822.h: 2573: extern volatile unsigned char ANSELA @ 0x18C;
886"2575
887[; ;pic12f1822.h: 2575: asm("ANSELA equ 018Ch");
888[; <" ANSELA equ 018Ch ;# ">
889[; ;pic12f1822.h: 2578: typedef union {
890[; ;pic12f1822.h: 2579: struct {
891[; ;pic12f1822.h: 2580: unsigned ANSA0 :1;
892[; ;pic12f1822.h: 2581: unsigned ANSA1 :1;
893[; ;pic12f1822.h: 2582: unsigned ANSA2 :1;
894[; ;pic12f1822.h: 2583: unsigned :1;
895[; ;pic12f1822.h: 2584: unsigned ANSA4 :1;
896[; ;pic12f1822.h: 2585: };
897[; ;pic12f1822.h: 2586: struct {
898[; ;pic12f1822.h: 2587: unsigned ANSELA :5;
899[; ;pic12f1822.h: 2588: };
900[; ;pic12f1822.h: 2589: } ANSELAbits_t;
901[; ;pic12f1822.h: 2590: extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
902[; ;pic12f1822.h: 2619: extern volatile unsigned short EEADR @ 0x191;
903"2621
904[; ;pic12f1822.h: 2621: asm("EEADR equ 0191h");
905[; <" EEADR equ 0191h ;# ">
906[; ;pic12f1822.h: 2625: extern volatile unsigned char EEADRL @ 0x191;
907"2627
908[; ;pic12f1822.h: 2627: asm("EEADRL equ 0191h");
909[; <" EEADRL equ 0191h ;# ">
910[; ;pic12f1822.h: 2630: typedef union {
911[; ;pic12f1822.h: 2631: struct {
912[; ;pic12f1822.h: 2632: unsigned EEADRL :8;
913[; ;pic12f1822.h: 2633: };
914[; ;pic12f1822.h: 2634: } EEADRLbits_t;
915[; ;pic12f1822.h: 2635: extern volatile EEADRLbits_t EEADRLbits @ 0x191;
916[; ;pic12f1822.h: 2644: extern volatile unsigned char EEADRH @ 0x192;
917"2646
918[; ;pic12f1822.h: 2646: asm("EEADRH equ 0192h");
919[; <" EEADRH equ 0192h ;# ">
920[; ;pic12f1822.h: 2649: typedef union {
921[; ;pic12f1822.h: 2650: struct {
922[; ;pic12f1822.h: 2651: unsigned EEADRH :7;
923[; ;pic12f1822.h: 2652: };
924[; ;pic12f1822.h: 2653: } EEADRHbits_t;
925[; ;pic12f1822.h: 2654: extern volatile EEADRHbits_t EEADRHbits @ 0x192;
926[; ;pic12f1822.h: 2663: extern volatile unsigned short EEDAT @ 0x193;
927"2665
928[; ;pic12f1822.h: 2665: asm("EEDAT equ 0193h");
929[; <" EEDAT equ 0193h ;# ">
930[; ;pic12f1822.h: 2669: extern volatile unsigned char EEDATL @ 0x193;
931"2671
932[; ;pic12f1822.h: 2671: asm("EEDATL equ 0193h");
933[; <" EEDATL equ 0193h ;# ">
934[; ;pic12f1822.h: 2674: extern volatile unsigned char EEDATA @ 0x193;
935"2676
936[; ;pic12f1822.h: 2676: asm("EEDATA equ 0193h");
937[; <" EEDATA equ 0193h ;# ">
938[; ;pic12f1822.h: 2679: typedef union {
939[; ;pic12f1822.h: 2680: struct {
940[; ;pic12f1822.h: 2681: unsigned EEDATL :8;
941[; ;pic12f1822.h: 2682: };
942[; ;pic12f1822.h: 2683: } EEDATLbits_t;
943[; ;pic12f1822.h: 2684: extern volatile EEDATLbits_t EEDATLbits @ 0x193;
944[; ;pic12f1822.h: 2692: typedef union {
945[; ;pic12f1822.h: 2693: struct {
946[; ;pic12f1822.h: 2694: unsigned EEDATL :8;
947[; ;pic12f1822.h: 2695: };
948[; ;pic12f1822.h: 2696: } EEDATAbits_t;
949[; ;pic12f1822.h: 2697: extern volatile EEDATAbits_t EEDATAbits @ 0x193;
950[; ;pic12f1822.h: 2706: extern volatile unsigned char EEDATH @ 0x194;
951"2708
952[; ;pic12f1822.h: 2708: asm("EEDATH equ 0194h");
953[; <" EEDATH equ 0194h ;# ">
954[; ;pic12f1822.h: 2711: typedef union {
955[; ;pic12f1822.h: 2712: struct {
956[; ;pic12f1822.h: 2713: unsigned EEDATH :6;
957[; ;pic12f1822.h: 2714: };
958[; ;pic12f1822.h: 2715: } EEDATHbits_t;
959[; ;pic12f1822.h: 2716: extern volatile EEDATHbits_t EEDATHbits @ 0x194;
960[; ;pic12f1822.h: 2725: extern volatile unsigned char EECON1 @ 0x195;
961"2727
962[; ;pic12f1822.h: 2727: asm("EECON1 equ 0195h");
963[; <" EECON1 equ 0195h ;# ">
964[; ;pic12f1822.h: 2730: typedef union {
965[; ;pic12f1822.h: 2731: struct {
966[; ;pic12f1822.h: 2732: unsigned RD :1;
967[; ;pic12f1822.h: 2733: unsigned WR :1;
968[; ;pic12f1822.h: 2734: unsigned WREN :1;
969[; ;pic12f1822.h: 2735: unsigned WRERR :1;
970[; ;pic12f1822.h: 2736: unsigned FREE :1;
971[; ;pic12f1822.h: 2737: unsigned LWLO :1;
972[; ;pic12f1822.h: 2738: unsigned CFGS :1;
973[; ;pic12f1822.h: 2739: unsigned EEPGD :1;
974[; ;pic12f1822.h: 2740: };
975[; ;pic12f1822.h: 2741: } EECON1bits_t;
976[; ;pic12f1822.h: 2742: extern volatile EECON1bits_t EECON1bits @ 0x195;
977[; ;pic12f1822.h: 2786: extern volatile unsigned char EECON2 @ 0x196;
978"2788
979[; ;pic12f1822.h: 2788: asm("EECON2 equ 0196h");
980[; <" EECON2 equ 0196h ;# ">
981[; ;pic12f1822.h: 2791: typedef union {
982[; ;pic12f1822.h: 2792: struct {
983[; ;pic12f1822.h: 2793: unsigned EECON2 :8;
984[; ;pic12f1822.h: 2794: };
985[; ;pic12f1822.h: 2795: } EECON2bits_t;
986[; ;pic12f1822.h: 2796: extern volatile EECON2bits_t EECON2bits @ 0x196;
987[; ;pic12f1822.h: 2805: extern volatile unsigned char RCREG @ 0x199;
988"2807
989[; ;pic12f1822.h: 2807: asm("RCREG equ 0199h");
990[; <" RCREG equ 0199h ;# ">
991[; ;pic12f1822.h: 2810: typedef union {
992[; ;pic12f1822.h: 2811: struct {
993[; ;pic12f1822.h: 2812: unsigned RCREG :8;
994[; ;pic12f1822.h: 2813: };
995[; ;pic12f1822.h: 2814: } RCREGbits_t;
996[; ;pic12f1822.h: 2815: extern volatile RCREGbits_t RCREGbits @ 0x199;
997[; ;pic12f1822.h: 2824: extern volatile unsigned char TXREG @ 0x19A;
998"2826
999[; ;pic12f1822.h: 2826: asm("TXREG equ 019Ah");
1000[; <" TXREG equ 019Ah ;# ">
1001[; ;pic12f1822.h: 2829: typedef union {
1002[; ;pic12f1822.h: 2830: struct {
1003[; ;pic12f1822.h: 2831: unsigned TXREG :8;
1004[; ;pic12f1822.h: 2832: };
1005[; ;pic12f1822.h: 2833: } TXREGbits_t;
1006[; ;pic12f1822.h: 2834: extern volatile TXREGbits_t TXREGbits @ 0x19A;
1007[; ;pic12f1822.h: 2843: extern volatile unsigned char SPBRGL @ 0x19B;
1008"2845
1009[; ;pic12f1822.h: 2845: asm("SPBRGL equ 019Bh");
1010[; <" SPBRGL equ 019Bh ;# ">
1011[; ;pic12f1822.h: 2848: extern volatile unsigned char SPBRG @ 0x19B;
1012"2850
1013[; ;pic12f1822.h: 2850: asm("SPBRG equ 019Bh");
1014[; <" SPBRG equ 019Bh ;# ">
1015[; ;pic12f1822.h: 2853: typedef union {
1016[; ;pic12f1822.h: 2854: struct {
1017[; ;pic12f1822.h: 2855: unsigned SPBRGL :8;
1018[; ;pic12f1822.h: 2856: };
1019[; ;pic12f1822.h: 2857: } SPBRGLbits_t;
1020[; ;pic12f1822.h: 2858: extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
1021[; ;pic12f1822.h: 2866: typedef union {
1022[; ;pic12f1822.h: 2867: struct {
1023[; ;pic12f1822.h: 2868: unsigned SPBRGL :8;
1024[; ;pic12f1822.h: 2869: };
1025[; ;pic12f1822.h: 2870: } SPBRGbits_t;
1026[; ;pic12f1822.h: 2871: extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
1027[; ;pic12f1822.h: 2880: extern volatile unsigned char SPBRGH @ 0x19C;
1028"2882
1029[; ;pic12f1822.h: 2882: asm("SPBRGH equ 019Ch");
1030[; <" SPBRGH equ 019Ch ;# ">
1031[; ;pic12f1822.h: 2885: typedef union {
1032[; ;pic12f1822.h: 2886: struct {
1033[; ;pic12f1822.h: 2887: unsigned SPBRGH :8;
1034[; ;pic12f1822.h: 2888: };
1035[; ;pic12f1822.h: 2889: } SPBRGHbits_t;
1036[; ;pic12f1822.h: 2890: extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
1037[; ;pic12f1822.h: 2899: extern volatile unsigned char RCSTA @ 0x19D;
1038"2901
1039[; ;pic12f1822.h: 2901: asm("RCSTA equ 019Dh");
1040[; <" RCSTA equ 019Dh ;# ">
1041[; ;pic12f1822.h: 2904: typedef union {
1042[; ;pic12f1822.h: 2905: struct {
1043[; ;pic12f1822.h: 2906: unsigned RX9D :1;
1044[; ;pic12f1822.h: 2907: unsigned OERR :1;
1045[; ;pic12f1822.h: 2908: unsigned FERR :1;
1046[; ;pic12f1822.h: 2909: unsigned ADDEN :1;
1047[; ;pic12f1822.h: 2910: unsigned CREN :1;
1048[; ;pic12f1822.h: 2911: unsigned SREN :1;
1049[; ;pic12f1822.h: 2912: unsigned RX9 :1;
1050[; ;pic12f1822.h: 2913: unsigned SPEN :1;
1051[; ;pic12f1822.h: 2914: };
1052[; ;pic12f1822.h: 2915: } RCSTAbits_t;
1053[; ;pic12f1822.h: 2916: extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
1054[; ;pic12f1822.h: 2960: extern volatile unsigned char TXSTA @ 0x19E;
1055"2962
1056[; ;pic12f1822.h: 2962: asm("TXSTA equ 019Eh");
1057[; <" TXSTA equ 019Eh ;# ">
1058[; ;pic12f1822.h: 2965: typedef union {
1059[; ;pic12f1822.h: 2966: struct {
1060[; ;pic12f1822.h: 2967: unsigned TX9D :1;
1061[; ;pic12f1822.h: 2968: unsigned TRMT :1;
1062[; ;pic12f1822.h: 2969: unsigned BRGH :1;
1063[; ;pic12f1822.h: 2970: unsigned SENDB :1;
1064[; ;pic12f1822.h: 2971: unsigned SYNC :1;
1065[; ;pic12f1822.h: 2972: unsigned TXEN :1;
1066[; ;pic12f1822.h: 2973: unsigned TX9 :1;
1067[; ;pic12f1822.h: 2974: unsigned CSRC :1;
1068[; ;pic12f1822.h: 2975: };
1069[; ;pic12f1822.h: 2976: } TXSTAbits_t;
1070[; ;pic12f1822.h: 2977: extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
1071[; ;pic12f1822.h: 3021: extern volatile unsigned char BAUDCON @ 0x19F;
1072"3023
1073[; ;pic12f1822.h: 3023: asm("BAUDCON equ 019Fh");
1074[; <" BAUDCON equ 019Fh ;# ">
1075[; ;pic12f1822.h: 3026: typedef union {
1076[; ;pic12f1822.h: 3027: struct {
1077[; ;pic12f1822.h: 3028: unsigned ABDEN :1;
1078[; ;pic12f1822.h: 3029: unsigned WUE :1;
1079[; ;pic12f1822.h: 3030: unsigned :1;
1080[; ;pic12f1822.h: 3031: unsigned BRG16 :1;
1081[; ;pic12f1822.h: 3032: unsigned SCKP :1;
1082[; ;pic12f1822.h: 3033: unsigned :1;
1083[; ;pic12f1822.h: 3034: unsigned RCIDL :1;
1084[; ;pic12f1822.h: 3035: unsigned ABDOVF :1;
1085[; ;pic12f1822.h: 3036: };
1086[; ;pic12f1822.h: 3037: } BAUDCONbits_t;
1087[; ;pic12f1822.h: 3038: extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
1088[; ;pic12f1822.h: 3072: extern volatile unsigned char WPUA @ 0x20C;
1089"3074
1090[; ;pic12f1822.h: 3074: asm("WPUA equ 020Ch");
1091[; <" WPUA equ 020Ch ;# ">
1092[; ;pic12f1822.h: 3077: typedef union {
1093[; ;pic12f1822.h: 3078: struct {
1094[; ;pic12f1822.h: 3079: unsigned WPUA0 :1;
1095[; ;pic12f1822.h: 3080: unsigned WPUA1 :1;
1096[; ;pic12f1822.h: 3081: unsigned WPUA2 :1;
1097[; ;pic12f1822.h: 3082: unsigned WPUA3 :1;
1098[; ;pic12f1822.h: 3083: unsigned WPUA4 :1;
1099[; ;pic12f1822.h: 3084: unsigned WPUA5 :1;
1100[; ;pic12f1822.h: 3085: };
1101[; ;pic12f1822.h: 3086: struct {
1102[; ;pic12f1822.h: 3087: unsigned WPUA :6;
1103[; ;pic12f1822.h: 3088: };
1104[; ;pic12f1822.h: 3089: } WPUAbits_t;
1105[; ;pic12f1822.h: 3090: extern volatile WPUAbits_t WPUAbits @ 0x20C;
1106[; ;pic12f1822.h: 3129: extern volatile unsigned char SSP1BUF @ 0x211;
1107"3131
1108[; ;pic12f1822.h: 3131: asm("SSP1BUF equ 0211h");
1109[; <" SSP1BUF equ 0211h ;# ">
1110[; ;pic12f1822.h: 3134: extern volatile unsigned char SSPBUF @ 0x211;
1111"3136
1112[; ;pic12f1822.h: 3136: asm("SSPBUF equ 0211h");
1113[; <" SSPBUF equ 0211h ;# ">
1114[; ;pic12f1822.h: 3139: typedef union {
1115[; ;pic12f1822.h: 3140: struct {
1116[; ;pic12f1822.h: 3141: unsigned SSPBUF :8;
1117[; ;pic12f1822.h: 3142: };
1118[; ;pic12f1822.h: 3143: } SSP1BUFbits_t;
1119[; ;pic12f1822.h: 3144: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
1120[; ;pic12f1822.h: 3152: typedef union {
1121[; ;pic12f1822.h: 3153: struct {
1122[; ;pic12f1822.h: 3154: unsigned SSPBUF :8;
1123[; ;pic12f1822.h: 3155: };
1124[; ;pic12f1822.h: 3156: } SSPBUFbits_t;
1125[; ;pic12f1822.h: 3157: extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
1126[; ;pic12f1822.h: 3166: extern volatile unsigned char SSP1ADD @ 0x212;
1127"3168
1128[; ;pic12f1822.h: 3168: asm("SSP1ADD equ 0212h");
1129[; <" SSP1ADD equ 0212h ;# ">
1130[; ;pic12f1822.h: 3171: extern volatile unsigned char SSPADD @ 0x212;
1131"3173
1132[; ;pic12f1822.h: 3173: asm("SSPADD equ 0212h");
1133[; <" SSPADD equ 0212h ;# ">
1134[; ;pic12f1822.h: 3176: typedef union {
1135[; ;pic12f1822.h: 3177: struct {
1136[; ;pic12f1822.h: 3178: unsigned SSPADD :8;
1137[; ;pic12f1822.h: 3179: };
1138[; ;pic12f1822.h: 3180: } SSP1ADDbits_t;
1139[; ;pic12f1822.h: 3181: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
1140[; ;pic12f1822.h: 3189: typedef union {
1141[; ;pic12f1822.h: 3190: struct {
1142[; ;pic12f1822.h: 3191: unsigned SSPADD :8;
1143[; ;pic12f1822.h: 3192: };
1144[; ;pic12f1822.h: 3193: } SSPADDbits_t;
1145[; ;pic12f1822.h: 3194: extern volatile SSPADDbits_t SSPADDbits @ 0x212;
1146[; ;pic12f1822.h: 3203: extern volatile unsigned char SSP1MSK @ 0x213;
1147"3205
1148[; ;pic12f1822.h: 3205: asm("SSP1MSK equ 0213h");
1149[; <" SSP1MSK equ 0213h ;# ">
1150[; ;pic12f1822.h: 3208: extern volatile unsigned char SSPMSK @ 0x213;
1151"3210
1152[; ;pic12f1822.h: 3210: asm("SSPMSK equ 0213h");
1153[; <" SSPMSK equ 0213h ;# ">
1154[; ;pic12f1822.h: 3213: typedef union {
1155[; ;pic12f1822.h: 3214: struct {
1156[; ;pic12f1822.h: 3215: unsigned SSPMSK :8;
1157[; ;pic12f1822.h: 3216: };
1158[; ;pic12f1822.h: 3217: } SSP1MSKbits_t;
1159[; ;pic12f1822.h: 3218: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
1160[; ;pic12f1822.h: 3226: typedef union {
1161[; ;pic12f1822.h: 3227: struct {
1162[; ;pic12f1822.h: 3228: unsigned SSPMSK :8;
1163[; ;pic12f1822.h: 3229: };
1164[; ;pic12f1822.h: 3230: } SSPMSKbits_t;
1165[; ;pic12f1822.h: 3231: extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
1166[; ;pic12f1822.h: 3240: extern volatile unsigned char SSP1STAT @ 0x214;
1167"3242
1168[; ;pic12f1822.h: 3242: asm("SSP1STAT equ 0214h");
1169[; <" SSP1STAT equ 0214h ;# ">
1170[; ;pic12f1822.h: 3245: extern volatile unsigned char SSPSTAT @ 0x214;
1171"3247
1172[; ;pic12f1822.h: 3247: asm("SSPSTAT equ 0214h");
1173[; <" SSPSTAT equ 0214h ;# ">
1174[; ;pic12f1822.h: 3250: typedef union {
1175[; ;pic12f1822.h: 3251: struct {
1176[; ;pic12f1822.h: 3252: unsigned BF :1;
1177[; ;pic12f1822.h: 3253: unsigned UA :1;
1178[; ;pic12f1822.h: 3254: unsigned R_nW :1;
1179[; ;pic12f1822.h: 3255: unsigned S :1;
1180[; ;pic12f1822.h: 3256: unsigned P :1;
1181[; ;pic12f1822.h: 3257: unsigned D_nA :1;
1182[; ;pic12f1822.h: 3258: unsigned CKE :1;
1183[; ;pic12f1822.h: 3259: unsigned SMP :1;
1184[; ;pic12f1822.h: 3260: };
1185[; ;pic12f1822.h: 3261: } SSP1STATbits_t;
1186[; ;pic12f1822.h: 3262: extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
1187[; ;pic12f1822.h: 3305: typedef union {
1188[; ;pic12f1822.h: 3306: struct {
1189[; ;pic12f1822.h: 3307: unsigned BF :1;
1190[; ;pic12f1822.h: 3308: unsigned UA :1;
1191[; ;pic12f1822.h: 3309: unsigned R_nW :1;
1192[; ;pic12f1822.h: 3310: unsigned S :1;
1193[; ;pic12f1822.h: 3311: unsigned P :1;
1194[; ;pic12f1822.h: 3312: unsigned D_nA :1;
1195[; ;pic12f1822.h: 3313: unsigned CKE :1;
1196[; ;pic12f1822.h: 3314: unsigned SMP :1;
1197[; ;pic12f1822.h: 3315: };
1198[; ;pic12f1822.h: 3316: } SSPSTATbits_t;
1199[; ;pic12f1822.h: 3317: extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
1200[; ;pic12f1822.h: 3361: extern volatile unsigned char SSP1CON1 @ 0x215;
1201"3363
1202[; ;pic12f1822.h: 3363: asm("SSP1CON1 equ 0215h");
1203[; <" SSP1CON1 equ 0215h ;# ">
1204[; ;pic12f1822.h: 3366: extern volatile unsigned char SSPCON1 @ 0x215;
1205"3368
1206[; ;pic12f1822.h: 3368: asm("SSPCON1 equ 0215h");
1207[; <" SSPCON1 equ 0215h ;# ">
1208[; ;pic12f1822.h: 3370: extern volatile unsigned char SSPCON @ 0x215;
1209"3372
1210[; ;pic12f1822.h: 3372: asm("SSPCON equ 0215h");
1211[; <" SSPCON equ 0215h ;# ">
1212[; ;pic12f1822.h: 3375: typedef union {
1213[; ;pic12f1822.h: 3376: struct {
1214[; ;pic12f1822.h: 3377: unsigned SSPM0 :1;
1215[; ;pic12f1822.h: 3378: unsigned SSPM1 :1;
1216[; ;pic12f1822.h: 3379: unsigned SSPM2 :1;
1217[; ;pic12f1822.h: 3380: unsigned SSPM3 :1;
1218[; ;pic12f1822.h: 3381: unsigned CKP :1;
1219[; ;pic12f1822.h: 3382: unsigned SSPEN :1;
1220[; ;pic12f1822.h: 3383: unsigned SSPOV :1;
1221[; ;pic12f1822.h: 3384: unsigned WCOL :1;
1222[; ;pic12f1822.h: 3385: };
1223[; ;pic12f1822.h: 3386: struct {
1224[; ;pic12f1822.h: 3387: unsigned SSPM :4;
1225[; ;pic12f1822.h: 3388: };
1226[; ;pic12f1822.h: 3389: } SSP1CON1bits_t;
1227[; ;pic12f1822.h: 3390: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
1228[; ;pic12f1822.h: 3438: typedef union {
1229[; ;pic12f1822.h: 3439: struct {
1230[; ;pic12f1822.h: 3440: unsigned SSPM0 :1;
1231[; ;pic12f1822.h: 3441: unsigned SSPM1 :1;
1232[; ;pic12f1822.h: 3442: unsigned SSPM2 :1;
1233[; ;pic12f1822.h: 3443: unsigned SSPM3 :1;
1234[; ;pic12f1822.h: 3444: unsigned CKP :1;
1235[; ;pic12f1822.h: 3445: unsigned SSPEN :1;
1236[; ;pic12f1822.h: 3446: unsigned SSPOV :1;
1237[; ;pic12f1822.h: 3447: unsigned WCOL :1;
1238[; ;pic12f1822.h: 3448: };
1239[; ;pic12f1822.h: 3449: struct {
1240[; ;pic12f1822.h: 3450: unsigned SSPM :4;
1241[; ;pic12f1822.h: 3451: };
1242[; ;pic12f1822.h: 3452: } SSPCON1bits_t;
1243[; ;pic12f1822.h: 3453: extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
1244[; ;pic12f1822.h: 3500: typedef union {
1245[; ;pic12f1822.h: 3501: struct {
1246[; ;pic12f1822.h: 3502: unsigned SSPM0 :1;
1247[; ;pic12f1822.h: 3503: unsigned SSPM1 :1;
1248[; ;pic12f1822.h: 3504: unsigned SSPM2 :1;
1249[; ;pic12f1822.h: 3505: unsigned SSPM3 :1;
1250[; ;pic12f1822.h: 3506: unsigned CKP :1;
1251[; ;pic12f1822.h: 3507: unsigned SSPEN :1;
1252[; ;pic12f1822.h: 3508: unsigned SSPOV :1;
1253[; ;pic12f1822.h: 3509: unsigned WCOL :1;
1254[; ;pic12f1822.h: 3510: };
1255[; ;pic12f1822.h: 3511: struct {
1256[; ;pic12f1822.h: 3512: unsigned SSPM :4;
1257[; ;pic12f1822.h: 3513: };
1258[; ;pic12f1822.h: 3514: } SSPCONbits_t;
1259[; ;pic12f1822.h: 3515: extern volatile SSPCONbits_t SSPCONbits @ 0x215;
1260[; ;pic12f1822.h: 3564: extern volatile unsigned char SSP1CON2 @ 0x216;
1261"3566
1262[; ;pic12f1822.h: 3566: asm("SSP1CON2 equ 0216h");
1263[; <" SSP1CON2 equ 0216h ;# ">
1264[; ;pic12f1822.h: 3569: extern volatile unsigned char SSPCON2 @ 0x216;
1265"3571
1266[; ;pic12f1822.h: 3571: asm("SSPCON2 equ 0216h");
1267[; <" SSPCON2 equ 0216h ;# ">
1268[; ;pic12f1822.h: 3574: typedef union {
1269[; ;pic12f1822.h: 3575: struct {
1270[; ;pic12f1822.h: 3576: unsigned SEN :1;
1271[; ;pic12f1822.h: 3577: unsigned RSEN :1;
1272[; ;pic12f1822.h: 3578: unsigned PEN :1;
1273[; ;pic12f1822.h: 3579: unsigned RCEN :1;
1274[; ;pic12f1822.h: 3580: unsigned ACKEN :1;
1275[; ;pic12f1822.h: 3581: unsigned ACKDT :1;
1276[; ;pic12f1822.h: 3582: unsigned ACKSTAT :1;
1277[; ;pic12f1822.h: 3583: unsigned GCEN :1;
1278[; ;pic12f1822.h: 3584: };
1279[; ;pic12f1822.h: 3585: } SSP1CON2bits_t;
1280[; ;pic12f1822.h: 3586: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
1281[; ;pic12f1822.h: 3629: typedef union {
1282[; ;pic12f1822.h: 3630: struct {
1283[; ;pic12f1822.h: 3631: unsigned SEN :1;
1284[; ;pic12f1822.h: 3632: unsigned RSEN :1;
1285[; ;pic12f1822.h: 3633: unsigned PEN :1;
1286[; ;pic12f1822.h: 3634: unsigned RCEN :1;
1287[; ;pic12f1822.h: 3635: unsigned ACKEN :1;
1288[; ;pic12f1822.h: 3636: unsigned ACKDT :1;
1289[; ;pic12f1822.h: 3637: unsigned ACKSTAT :1;
1290[; ;pic12f1822.h: 3638: unsigned GCEN :1;
1291[; ;pic12f1822.h: 3639: };
1292[; ;pic12f1822.h: 3640: } SSPCON2bits_t;
1293[; ;pic12f1822.h: 3641: extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
1294[; ;pic12f1822.h: 3685: extern volatile unsigned char SSP1CON3 @ 0x217;
1295"3687
1296[; ;pic12f1822.h: 3687: asm("SSP1CON3 equ 0217h");
1297[; <" SSP1CON3 equ 0217h ;# ">
1298[; ;pic12f1822.h: 3690: extern volatile unsigned char SSPCON3 @ 0x217;
1299"3692
1300[; ;pic12f1822.h: 3692: asm("SSPCON3 equ 0217h");
1301[; <" SSPCON3 equ 0217h ;# ">
1302[; ;pic12f1822.h: 3695: typedef union {
1303[; ;pic12f1822.h: 3696: struct {
1304[; ;pic12f1822.h: 3697: unsigned DHEN :1;
1305[; ;pic12f1822.h: 3698: unsigned AHEN :1;
1306[; ;pic12f1822.h: 3699: unsigned SBCDE :1;
1307[; ;pic12f1822.h: 3700: unsigned SDAHT :1;
1308[; ;pic12f1822.h: 3701: unsigned BOEN :1;
1309[; ;pic12f1822.h: 3702: unsigned SCIE :1;
1310[; ;pic12f1822.h: 3703: unsigned PCIE :1;
1311[; ;pic12f1822.h: 3704: unsigned ACKTIM :1;
1312[; ;pic12f1822.h: 3705: };
1313[; ;pic12f1822.h: 3706: } SSP1CON3bits_t;
1314[; ;pic12f1822.h: 3707: extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
1315[; ;pic12f1822.h: 3750: typedef union {
1316[; ;pic12f1822.h: 3751: struct {
1317[; ;pic12f1822.h: 3752: unsigned DHEN :1;
1318[; ;pic12f1822.h: 3753: unsigned AHEN :1;
1319[; ;pic12f1822.h: 3754: unsigned SBCDE :1;
1320[; ;pic12f1822.h: 3755: unsigned SDAHT :1;
1321[; ;pic12f1822.h: 3756: unsigned BOEN :1;
1322[; ;pic12f1822.h: 3757: unsigned SCIE :1;
1323[; ;pic12f1822.h: 3758: unsigned PCIE :1;
1324[; ;pic12f1822.h: 3759: unsigned ACKTIM :1;
1325[; ;pic12f1822.h: 3760: };
1326[; ;pic12f1822.h: 3761: } SSPCON3bits_t;
1327[; ;pic12f1822.h: 3762: extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
1328[; ;pic12f1822.h: 3806: extern volatile unsigned char CCPR1L @ 0x291;
1329"3808
1330[; ;pic12f1822.h: 3808: asm("CCPR1L equ 0291h");
1331[; <" CCPR1L equ 0291h ;# ">
1332[; ;pic12f1822.h: 3811: typedef union {
1333[; ;pic12f1822.h: 3812: struct {
1334[; ;pic12f1822.h: 3813: unsigned CCPR1L :8;
1335[; ;pic12f1822.h: 3814: };
1336[; ;pic12f1822.h: 3815: } CCPR1Lbits_t;
1337[; ;pic12f1822.h: 3816: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
1338[; ;pic12f1822.h: 3825: extern volatile unsigned char CCPR1H @ 0x292;
1339"3827
1340[; ;pic12f1822.h: 3827: asm("CCPR1H equ 0292h");
1341[; <" CCPR1H equ 0292h ;# ">
1342[; ;pic12f1822.h: 3830: typedef union {
1343[; ;pic12f1822.h: 3831: struct {
1344[; ;pic12f1822.h: 3832: unsigned CCPR1H :8;
1345[; ;pic12f1822.h: 3833: };
1346[; ;pic12f1822.h: 3834: } CCPR1Hbits_t;
1347[; ;pic12f1822.h: 3835: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
1348[; ;pic12f1822.h: 3844: extern volatile unsigned char CCP1CON @ 0x293;
1349"3846
1350[; ;pic12f1822.h: 3846: asm("CCP1CON equ 0293h");
1351[; <" CCP1CON equ 0293h ;# ">
1352[; ;pic12f1822.h: 3849: typedef union {
1353[; ;pic12f1822.h: 3850: struct {
1354[; ;pic12f1822.h: 3851: unsigned CCP1M0 :1;
1355[; ;pic12f1822.h: 3852: unsigned CCP1M1 :1;
1356[; ;pic12f1822.h: 3853: unsigned CCP1M2 :1;
1357[; ;pic12f1822.h: 3854: unsigned CCP1M3 :1;
1358[; ;pic12f1822.h: 3855: unsigned DC1B0 :1;
1359[; ;pic12f1822.h: 3856: unsigned DC1B1 :1;
1360[; ;pic12f1822.h: 3857: unsigned P1M0 :1;
1361[; ;pic12f1822.h: 3858: unsigned P1M1 :1;
1362[; ;pic12f1822.h: 3859: };
1363[; ;pic12f1822.h: 3860: struct {
1364[; ;pic12f1822.h: 3861: unsigned CCP1M :4;
1365[; ;pic12f1822.h: 3862: unsigned DC1B :2;
1366[; ;pic12f1822.h: 3863: unsigned P1M :2;
1367[; ;pic12f1822.h: 3864: };
1368[; ;pic12f1822.h: 3865: } CCP1CONbits_t;
1369[; ;pic12f1822.h: 3866: extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
1370[; ;pic12f1822.h: 3925: extern volatile unsigned char PWM1CON @ 0x294;
1371"3927
1372[; ;pic12f1822.h: 3927: asm("PWM1CON equ 0294h");
1373[; <" PWM1CON equ 0294h ;# ">
1374[; ;pic12f1822.h: 3930: typedef union {
1375[; ;pic12f1822.h: 3931: struct {
1376[; ;pic12f1822.h: 3932: unsigned P1DC0 :1;
1377[; ;pic12f1822.h: 3933: unsigned P1DC1 :1;
1378[; ;pic12f1822.h: 3934: unsigned P1DC2 :1;
1379[; ;pic12f1822.h: 3935: unsigned P1DC3 :1;
1380[; ;pic12f1822.h: 3936: unsigned P1DC4 :1;
1381[; ;pic12f1822.h: 3937: unsigned P1DC5 :1;
1382[; ;pic12f1822.h: 3938: unsigned P1DC6 :1;
1383[; ;pic12f1822.h: 3939: unsigned P1RSEN :1;
1384[; ;pic12f1822.h: 3940: };
1385[; ;pic12f1822.h: 3941: struct {
1386[; ;pic12f1822.h: 3942: unsigned P1DC :7;
1387[; ;pic12f1822.h: 3943: };
1388[; ;pic12f1822.h: 3944: } PWM1CONbits_t;
1389[; ;pic12f1822.h: 3945: extern volatile PWM1CONbits_t PWM1CONbits @ 0x294;
1390[; ;pic12f1822.h: 3994: extern volatile unsigned char CCP1AS @ 0x295;
1391"3996
1392[; ;pic12f1822.h: 3996: asm("CCP1AS equ 0295h");
1393[; <" CCP1AS equ 0295h ;# ">
1394[; ;pic12f1822.h: 3999: extern volatile unsigned char ECCP1AS @ 0x295;
1395"4001
1396[; ;pic12f1822.h: 4001: asm("ECCP1AS equ 0295h");
1397[; <" ECCP1AS equ 0295h ;# ">
1398[; ;pic12f1822.h: 4004: typedef union {
1399[; ;pic12f1822.h: 4005: struct {
1400[; ;pic12f1822.h: 4006: unsigned PSS1BD0 :1;
1401[; ;pic12f1822.h: 4007: unsigned PSS1BD1 :1;
1402[; ;pic12f1822.h: 4008: unsigned PSS1AC0 :1;
1403[; ;pic12f1822.h: 4009: unsigned PSS1AC1 :1;
1404[; ;pic12f1822.h: 4010: unsigned CCP1AS0 :1;
1405[; ;pic12f1822.h: 4011: unsigned CCP1AS1 :1;
1406[; ;pic12f1822.h: 4012: unsigned CCP1AS2 :1;
1407[; ;pic12f1822.h: 4013: unsigned CCP1ASE :1;
1408[; ;pic12f1822.h: 4014: };
1409[; ;pic12f1822.h: 4015: struct {
1410[; ;pic12f1822.h: 4016: unsigned PSS1BD :2;
1411[; ;pic12f1822.h: 4017: unsigned PSS1AC :2;
1412[; ;pic12f1822.h: 4018: unsigned CCP1AS :3;
1413[; ;pic12f1822.h: 4019: };
1414[; ;pic12f1822.h: 4020: } CCP1ASbits_t;
1415[; ;pic12f1822.h: 4021: extern volatile CCP1ASbits_t CCP1ASbits @ 0x295;
1416[; ;pic12f1822.h: 4079: typedef union {
1417[; ;pic12f1822.h: 4080: struct {
1418[; ;pic12f1822.h: 4081: unsigned PSS1BD0 :1;
1419[; ;pic12f1822.h: 4082: unsigned PSS1BD1 :1;
1420[; ;pic12f1822.h: 4083: unsigned PSS1AC0 :1;
1421[; ;pic12f1822.h: 4084: unsigned PSS1AC1 :1;
1422[; ;pic12f1822.h: 4085: unsigned CCP1AS0 :1;
1423[; ;pic12f1822.h: 4086: unsigned CCP1AS1 :1;
1424[; ;pic12f1822.h: 4087: unsigned CCP1AS2 :1;
1425[; ;pic12f1822.h: 4088: unsigned CCP1ASE :1;
1426[; ;pic12f1822.h: 4089: };
1427[; ;pic12f1822.h: 4090: struct {
1428[; ;pic12f1822.h: 4091: unsigned PSS1BD :2;
1429[; ;pic12f1822.h: 4092: unsigned PSS1AC :2;
1430[; ;pic12f1822.h: 4093: unsigned CCP1AS :3;
1431[; ;pic12f1822.h: 4094: };
1432[; ;pic12f1822.h: 4095: } ECCP1ASbits_t;
1433[; ;pic12f1822.h: 4096: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0x295;
1434[; ;pic12f1822.h: 4155: extern volatile unsigned char PSTR1CON @ 0x296;
1435"4157
1436[; ;pic12f1822.h: 4157: asm("PSTR1CON equ 0296h");
1437[; <" PSTR1CON equ 0296h ;# ">
1438[; ;pic12f1822.h: 4160: typedef union {
1439[; ;pic12f1822.h: 4161: struct {
1440[; ;pic12f1822.h: 4162: unsigned STR1A :1;
1441[; ;pic12f1822.h: 4163: unsigned STR1B :1;
1442[; ;pic12f1822.h: 4164: unsigned STR1C :1;
1443[; ;pic12f1822.h: 4165: unsigned STR1D :1;
1444[; ;pic12f1822.h: 4166: unsigned STR1SYNC :1;
1445[; ;pic12f1822.h: 4167: };
1446[; ;pic12f1822.h: 4168: } PSTR1CONbits_t;
1447[; ;pic12f1822.h: 4169: extern volatile PSTR1CONbits_t PSTR1CONbits @ 0x296;
1448[; ;pic12f1822.h: 4198: extern volatile unsigned char IOCAP @ 0x391;
1449"4200
1450[; ;pic12f1822.h: 4200: asm("IOCAP equ 0391h");
1451[; <" IOCAP equ 0391h ;# ">
1452[; ;pic12f1822.h: 4203: typedef union {
1453[; ;pic12f1822.h: 4204: struct {
1454[; ;pic12f1822.h: 4205: unsigned IOCAP0 :1;
1455[; ;pic12f1822.h: 4206: unsigned IOCAP1 :1;
1456[; ;pic12f1822.h: 4207: unsigned IOCAP2 :1;
1457[; ;pic12f1822.h: 4208: unsigned IOCAP3 :1;
1458[; ;pic12f1822.h: 4209: unsigned IOCAP4 :1;
1459[; ;pic12f1822.h: 4210: unsigned IOCAP5 :1;
1460[; ;pic12f1822.h: 4211: };
1461[; ;pic12f1822.h: 4212: struct {
1462[; ;pic12f1822.h: 4213: unsigned IOCAP :6;
1463[; ;pic12f1822.h: 4214: };
1464[; ;pic12f1822.h: 4215: } IOCAPbits_t;
1465[; ;pic12f1822.h: 4216: extern volatile IOCAPbits_t IOCAPbits @ 0x391;
1466[; ;pic12f1822.h: 4255: extern volatile unsigned char IOCAN @ 0x392;
1467"4257
1468[; ;pic12f1822.h: 4257: asm("IOCAN equ 0392h");
1469[; <" IOCAN equ 0392h ;# ">
1470[; ;pic12f1822.h: 4260: typedef union {
1471[; ;pic12f1822.h: 4261: struct {
1472[; ;pic12f1822.h: 4262: unsigned IOCAN0 :1;
1473[; ;pic12f1822.h: 4263: unsigned IOCAN1 :1;
1474[; ;pic12f1822.h: 4264: unsigned IOCAN2 :1;
1475[; ;pic12f1822.h: 4265: unsigned IOCAN3 :1;
1476[; ;pic12f1822.h: 4266: unsigned IOCAN4 :1;
1477[; ;pic12f1822.h: 4267: unsigned IOCAN5 :1;
1478[; ;pic12f1822.h: 4268: };
1479[; ;pic12f1822.h: 4269: struct {
1480[; ;pic12f1822.h: 4270: unsigned IOCAN :6;
1481[; ;pic12f1822.h: 4271: };
1482[; ;pic12f1822.h: 4272: } IOCANbits_t;
1483[; ;pic12f1822.h: 4273: extern volatile IOCANbits_t IOCANbits @ 0x392;
1484[; ;pic12f1822.h: 4312: extern volatile unsigned char IOCAF @ 0x393;
1485"4314
1486[; ;pic12f1822.h: 4314: asm("IOCAF equ 0393h");
1487[; <" IOCAF equ 0393h ;# ">
1488[; ;pic12f1822.h: 4317: typedef union {
1489[; ;pic12f1822.h: 4318: struct {
1490[; ;pic12f1822.h: 4319: unsigned IOCAF0 :1;
1491[; ;pic12f1822.h: 4320: unsigned IOCAF1 :1;
1492[; ;pic12f1822.h: 4321: unsigned IOCAF2 :1;
1493[; ;pic12f1822.h: 4322: unsigned IOCAF3 :1;
1494[; ;pic12f1822.h: 4323: unsigned IOCAF4 :1;
1495[; ;pic12f1822.h: 4324: unsigned IOCAF5 :1;
1496[; ;pic12f1822.h: 4325: };
1497[; ;pic12f1822.h: 4326: struct {
1498[; ;pic12f1822.h: 4327: unsigned IOCAF :6;
1499[; ;pic12f1822.h: 4328: };
1500[; ;pic12f1822.h: 4329: } IOCAFbits_t;
1501[; ;pic12f1822.h: 4330: extern volatile IOCAFbits_t IOCAFbits @ 0x393;
1502[; ;pic12f1822.h: 4369: extern volatile unsigned char CLKRCON @ 0x39A;
1503"4371
1504[; ;pic12f1822.h: 4371: asm("CLKRCON equ 039Ah");
1505[; <" CLKRCON equ 039Ah ;# ">
1506[; ;pic12f1822.h: 4374: typedef union {
1507[; ;pic12f1822.h: 4375: struct {
1508[; ;pic12f1822.h: 4376: unsigned CLKRDIV0 :1;
1509[; ;pic12f1822.h: 4377: unsigned CLKRDIV1 :1;
1510[; ;pic12f1822.h: 4378: unsigned CLKRDIV2 :1;
1511[; ;pic12f1822.h: 4379: unsigned CLKRDC0 :1;
1512[; ;pic12f1822.h: 4380: unsigned CLKRDC1 :1;
1513[; ;pic12f1822.h: 4381: unsigned CLKRSLR :1;
1514[; ;pic12f1822.h: 4382: unsigned CLKROE :1;
1515[; ;pic12f1822.h: 4383: unsigned CLKREN :1;
1516[; ;pic12f1822.h: 4384: };
1517[; ;pic12f1822.h: 4385: struct {
1518[; ;pic12f1822.h: 4386: unsigned CLKRDIV :3;
1519[; ;pic12f1822.h: 4387: unsigned CLKRDC :2;
1520[; ;pic12f1822.h: 4388: };
1521[; ;pic12f1822.h: 4389: } CLKRCONbits_t;
1522[; ;pic12f1822.h: 4390: extern volatile CLKRCONbits_t CLKRCONbits @ 0x39A;
1523[; ;pic12f1822.h: 4444: extern volatile unsigned char MDCON @ 0x39C;
1524"4446
1525[; ;pic12f1822.h: 4446: asm("MDCON equ 039Ch");
1526[; <" MDCON equ 039Ch ;# ">
1527[; ;pic12f1822.h: 4449: typedef union {
1528[; ;pic12f1822.h: 4450: struct {
1529[; ;pic12f1822.h: 4451: unsigned MDBIT :1;
1530[; ;pic12f1822.h: 4452: unsigned :2;
1531[; ;pic12f1822.h: 4453: unsigned MDOUT :1;
1532[; ;pic12f1822.h: 4454: unsigned MDOPOL :1;
1533[; ;pic12f1822.h: 4455: unsigned MDSLR :1;
1534[; ;pic12f1822.h: 4456: unsigned MDOE :1;
1535[; ;pic12f1822.h: 4457: unsigned MDEN :1;
1536[; ;pic12f1822.h: 4458: };
1537[; ;pic12f1822.h: 4459: } MDCONbits_t;
1538[; ;pic12f1822.h: 4460: extern volatile MDCONbits_t MDCONbits @ 0x39C;
1539[; ;pic12f1822.h: 4494: extern volatile unsigned char MDSRC @ 0x39D;
1540"4496
1541[; ;pic12f1822.h: 4496: asm("MDSRC equ 039Dh");
1542[; <" MDSRC equ 039Dh ;# ">
1543[; ;pic12f1822.h: 4499: typedef union {
1544[; ;pic12f1822.h: 4500: struct {
1545[; ;pic12f1822.h: 4501: unsigned MDMS0 :1;
1546[; ;pic12f1822.h: 4502: unsigned MDMS1 :1;
1547[; ;pic12f1822.h: 4503: unsigned MDMS2 :1;
1548[; ;pic12f1822.h: 4504: unsigned MDMS3 :1;
1549[; ;pic12f1822.h: 4505: unsigned :3;
1550[; ;pic12f1822.h: 4506: unsigned MDMSODIS :1;
1551[; ;pic12f1822.h: 4507: };
1552[; ;pic12f1822.h: 4508: struct {
1553[; ;pic12f1822.h: 4509: unsigned MDMS :4;
1554[; ;pic12f1822.h: 4510: };
1555[; ;pic12f1822.h: 4511: } MDSRCbits_t;
1556[; ;pic12f1822.h: 4512: extern volatile MDSRCbits_t MDSRCbits @ 0x39D;
1557[; ;pic12f1822.h: 4546: extern volatile unsigned char MDCARL @ 0x39E;
1558"4548
1559[; ;pic12f1822.h: 4548: asm("MDCARL equ 039Eh");
1560[; <" MDCARL equ 039Eh ;# ">
1561[; ;pic12f1822.h: 4551: typedef union {
1562[; ;pic12f1822.h: 4552: struct {
1563[; ;pic12f1822.h: 4553: unsigned MDCL0 :1;
1564[; ;pic12f1822.h: 4554: unsigned MDCL1 :1;
1565[; ;pic12f1822.h: 4555: unsigned MDCL2 :1;
1566[; ;pic12f1822.h: 4556: unsigned MDCL3 :1;
1567[; ;pic12f1822.h: 4557: unsigned :1;
1568[; ;pic12f1822.h: 4558: unsigned MDCLSYNC :1;
1569[; ;pic12f1822.h: 4559: unsigned MDCLPOL :1;
1570[; ;pic12f1822.h: 4560: unsigned MDCLODIS :1;
1571[; ;pic12f1822.h: 4561: };
1572[; ;pic12f1822.h: 4562: struct {
1573[; ;pic12f1822.h: 4563: unsigned MDCL :4;
1574[; ;pic12f1822.h: 4564: };
1575[; ;pic12f1822.h: 4565: } MDCARLbits_t;
1576[; ;pic12f1822.h: 4566: extern volatile MDCARLbits_t MDCARLbits @ 0x39E;
1577[; ;pic12f1822.h: 4610: extern volatile unsigned char MDCARH @ 0x39F;
1578"4612
1579[; ;pic12f1822.h: 4612: asm("MDCARH equ 039Fh");
1580[; <" MDCARH equ 039Fh ;# ">
1581[; ;pic12f1822.h: 4615: typedef union {
1582[; ;pic12f1822.h: 4616: struct {
1583[; ;pic12f1822.h: 4617: unsigned MDCH0 :1;
1584[; ;pic12f1822.h: 4618: unsigned MDCH1 :1;
1585[; ;pic12f1822.h: 4619: unsigned MDCH2 :1;
1586[; ;pic12f1822.h: 4620: unsigned MDCH3 :1;
1587[; ;pic12f1822.h: 4621: unsigned :1;
1588[; ;pic12f1822.h: 4622: unsigned MDCHSYNC :1;
1589[; ;pic12f1822.h: 4623: unsigned MDCHPOL :1;
1590[; ;pic12f1822.h: 4624: unsigned MDCHODIS :1;
1591[; ;pic12f1822.h: 4625: };
1592[; ;pic12f1822.h: 4626: struct {
1593[; ;pic12f1822.h: 4627: unsigned MDCH :4;
1594[; ;pic12f1822.h: 4628: };
1595[; ;pic12f1822.h: 4629: } MDCARHbits_t;
1596[; ;pic12f1822.h: 4630: extern volatile MDCARHbits_t MDCARHbits @ 0x39F;
1597[; ;pic12f1822.h: 4674: extern volatile unsigned char STATUS_SHAD @ 0xFE4;
1598"4676
1599[; ;pic12f1822.h: 4676: asm("STATUS_SHAD equ 0FE4h");
1600[; <" STATUS_SHAD equ 0FE4h ;# ">
1601[; ;pic12f1822.h: 4679: typedef union {
1602[; ;pic12f1822.h: 4680: struct {
1603[; ;pic12f1822.h: 4681: unsigned C_SHAD :1;
1604[; ;pic12f1822.h: 4682: unsigned DC_SHAD :1;
1605[; ;pic12f1822.h: 4683: unsigned Z_SHAD :1;
1606[; ;pic12f1822.h: 4684: };
1607[; ;pic12f1822.h: 4685: } STATUS_SHADbits_t;
1608[; ;pic12f1822.h: 4686: extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
1609[; ;pic12f1822.h: 4705: extern volatile unsigned char WREG_SHAD @ 0xFE5;
1610"4707
1611[; ;pic12f1822.h: 4707: asm("WREG_SHAD equ 0FE5h");
1612[; <" WREG_SHAD equ 0FE5h ;# ">
1613[; ;pic12f1822.h: 4710: typedef union {
1614[; ;pic12f1822.h: 4711: struct {
1615[; ;pic12f1822.h: 4712: unsigned WREG_SHAD :8;
1616[; ;pic12f1822.h: 4713: };
1617[; ;pic12f1822.h: 4714: } WREG_SHADbits_t;
1618[; ;pic12f1822.h: 4715: extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
1619[; ;pic12f1822.h: 4724: extern volatile unsigned char BSR_SHAD @ 0xFE6;
1620"4726
1621[; ;pic12f1822.h: 4726: asm("BSR_SHAD equ 0FE6h");
1622[; <" BSR_SHAD equ 0FE6h ;# ">
1623[; ;pic12f1822.h: 4729: typedef union {
1624[; ;pic12f1822.h: 4730: struct {
1625[; ;pic12f1822.h: 4731: unsigned BSR_SHAD :5;
1626[; ;pic12f1822.h: 4732: };
1627[; ;pic12f1822.h: 4733: } BSR_SHADbits_t;
1628[; ;pic12f1822.h: 4734: extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
1629[; ;pic12f1822.h: 4743: extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
1630"4745
1631[; ;pic12f1822.h: 4745: asm("PCLATH_SHAD equ 0FE7h");
1632[; <" PCLATH_SHAD equ 0FE7h ;# ">
1633[; ;pic12f1822.h: 4748: typedef union {
1634[; ;pic12f1822.h: 4749: struct {
1635[; ;pic12f1822.h: 4750: unsigned PCLATH_SHAD :7;
1636[; ;pic12f1822.h: 4751: };
1637[; ;pic12f1822.h: 4752: } PCLATH_SHADbits_t;
1638[; ;pic12f1822.h: 4753: extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
1639[; ;pic12f1822.h: 4762: extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
1640"4764
1641[; ;pic12f1822.h: 4764: asm("FSR0L_SHAD equ 0FE8h");
1642[; <" FSR0L_SHAD equ 0FE8h ;# ">
1643[; ;pic12f1822.h: 4767: typedef union {
1644[; ;pic12f1822.h: 4768: struct {
1645[; ;pic12f1822.h: 4769: unsigned FSR0L_SHAD :8;
1646[; ;pic12f1822.h: 4770: };
1647[; ;pic12f1822.h: 4771: } FSR0L_SHADbits_t;
1648[; ;pic12f1822.h: 4772: extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
1649[; ;pic12f1822.h: 4781: extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
1650"4783
1651[; ;pic12f1822.h: 4783: asm("FSR0H_SHAD equ 0FE9h");
1652[; <" FSR0H_SHAD equ 0FE9h ;# ">
1653[; ;pic12f1822.h: 4786: typedef union {
1654[; ;pic12f1822.h: 4787: struct {
1655[; ;pic12f1822.h: 4788: unsigned FSR0H_SHAD :8;
1656[; ;pic12f1822.h: 4789: };
1657[; ;pic12f1822.h: 4790: } FSR0H_SHADbits_t;
1658[; ;pic12f1822.h: 4791: extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
1659[; ;pic12f1822.h: 4800: extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
1660"4802
1661[; ;pic12f1822.h: 4802: asm("FSR1L_SHAD equ 0FEAh");
1662[; <" FSR1L_SHAD equ 0FEAh ;# ">
1663[; ;pic12f1822.h: 4805: typedef union {
1664[; ;pic12f1822.h: 4806: struct {
1665[; ;pic12f1822.h: 4807: unsigned FSR1L_SHAD :8;
1666[; ;pic12f1822.h: 4808: };
1667[; ;pic12f1822.h: 4809: } FSR1L_SHADbits_t;
1668[; ;pic12f1822.h: 4810: extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
1669[; ;pic12f1822.h: 4819: extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
1670"4821
1671[; ;pic12f1822.h: 4821: asm("FSR1H_SHAD equ 0FEBh");
1672[; <" FSR1H_SHAD equ 0FEBh ;# ">
1673[; ;pic12f1822.h: 4824: typedef union {
1674[; ;pic12f1822.h: 4825: struct {
1675[; ;pic12f1822.h: 4826: unsigned FSR1H_SHAD :8;
1676[; ;pic12f1822.h: 4827: };
1677[; ;pic12f1822.h: 4828: } FSR1H_SHADbits_t;
1678[; ;pic12f1822.h: 4829: extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
1679[; ;pic12f1822.h: 4838: extern volatile unsigned char STKPTR @ 0xFED;
1680"4840
1681[; ;pic12f1822.h: 4840: asm("STKPTR equ 0FEDh");
1682[; <" STKPTR equ 0FEDh ;# ">
1683[; ;pic12f1822.h: 4843: typedef union {
1684[; ;pic12f1822.h: 4844: struct {
1685[; ;pic12f1822.h: 4845: unsigned STKPTR :5;
1686[; ;pic12f1822.h: 4846: };
1687[; ;pic12f1822.h: 4847: } STKPTRbits_t;
1688[; ;pic12f1822.h: 4848: extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
1689[; ;pic12f1822.h: 4857: extern volatile unsigned char TOSL @ 0xFEE;
1690"4859
1691[; ;pic12f1822.h: 4859: asm("TOSL equ 0FEEh");
1692[; <" TOSL equ 0FEEh ;# ">
1693[; ;pic12f1822.h: 4862: typedef union {
1694[; ;pic12f1822.h: 4863: struct {
1695[; ;pic12f1822.h: 4864: unsigned TOSL :8;
1696[; ;pic12f1822.h: 4865: };
1697[; ;pic12f1822.h: 4866: } TOSLbits_t;
1698[; ;pic12f1822.h: 4867: extern volatile TOSLbits_t TOSLbits @ 0xFEE;
1699[; ;pic12f1822.h: 4876: extern volatile unsigned char TOSH @ 0xFEF;
1700"4878
1701[; ;pic12f1822.h: 4878: asm("TOSH equ 0FEFh");
1702[; <" TOSH equ 0FEFh ;# ">
1703[; ;pic12f1822.h: 4881: typedef union {
1704[; ;pic12f1822.h: 4882: struct {
1705[; ;pic12f1822.h: 4883: unsigned TOSH :7;
1706[; ;pic12f1822.h: 4884: };
1707[; ;pic12f1822.h: 4885: } TOSHbits_t;
1708[; ;pic12f1822.h: 4886: extern volatile TOSHbits_t TOSHbits @ 0xFEF;
1709[; ;pic12f1822.h: 4901: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
1710[; ;pic12f1822.h: 4903: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
1711[; ;pic12f1822.h: 4905: extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
1712[; ;pic12f1822.h: 4907: extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
1713[; ;pic12f1822.h: 4909: extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
1714[; ;pic12f1822.h: 4911: extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
1715[; ;pic12f1822.h: 4913: extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 4;
1716[; ;pic12f1822.h: 4915: extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 5;
1717[; ;pic12f1822.h: 4917: extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
1718[; ;pic12f1822.h: 4919: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
1719[; ;pic12f1822.h: 4921: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
1720[; ;pic12f1822.h: 4923: extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
1721[; ;pic12f1822.h: 4925: extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
1722[; ;pic12f1822.h: 4927: extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
1723[; ;pic12f1822.h: 4929: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
1724[; ;pic12f1822.h: 4931: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
1725[; ;pic12f1822.h: 4933: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
1726[; ;pic12f1822.h: 4935: extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
1727[; ;pic12f1822.h: 4937: extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
1728[; ;pic12f1822.h: 4939: extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
1729[; ;pic12f1822.h: 4941: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
1730[; ;pic12f1822.h: 4943: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
1731[; ;pic12f1822.h: 4945: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
1732[; ;pic12f1822.h: 4947: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 4;
1733[; ;pic12f1822.h: 4949: extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
1734[; ;pic12f1822.h: 4951: extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
1735[; ;pic12f1822.h: 4953: extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
1736[; ;pic12f1822.h: 4955: extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
1737[; ;pic12f1822.h: 4957: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
1738[; ;pic12f1822.h: 4959: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
1739[; ;pic12f1822.h: 4961: extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
1740[; ;pic12f1822.h: 4963: extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
1741[; ;pic12f1822.h: 4965: extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
1742[; ;pic12f1822.h: 4967: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
1743[; ;pic12f1822.h: 4969: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
1744[; ;pic12f1822.h: 4971: extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
1745[; ;pic12f1822.h: 4973: extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
1746[; ;pic12f1822.h: 4975: extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
1747[; ;pic12f1822.h: 4977: extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
1748[; ;pic12f1822.h: 4979: extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
1749[; ;pic12f1822.h: 4981: extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
1750[; ;pic12f1822.h: 4983: extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
1751[; ;pic12f1822.h: 4985: extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
1752[; ;pic12f1822.h: 4987: extern volatile __bit C1IN0N @ (((unsigned) &PORTA)*8) + 1;
1753[; ;pic12f1822.h: 4989: extern volatile __bit C1IN1N @ (((unsigned) &PORTA)*8) + 4;
1754[; ;pic12f1822.h: 4991: extern volatile __bit C1INP @ (((unsigned) &PORTA)*8) + 0;
1755[; ;pic12f1822.h: 4993: extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
1756[; ;pic12f1822.h: 4995: extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
1757[; ;pic12f1822.h: 4997: extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
1758[; ;pic12f1822.h: 4999: extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
1759[; ;pic12f1822.h: 5001: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
1760[; ;pic12f1822.h: 5003: extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
1761[; ;pic12f1822.h: 5005: extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
1762[; ;pic12f1822.h: 5007: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
1763[; ;pic12f1822.h: 5009: extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
1764[; ;pic12f1822.h: 5011: extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
1765[; ;pic12f1822.h: 5013: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
1766[; ;pic12f1822.h: 5015: extern volatile __bit CCP1AS0 @ (((unsigned) &CCP1AS)*8) + 4;
1767[; ;pic12f1822.h: 5017: extern volatile __bit CCP1AS1 @ (((unsigned) &CCP1AS)*8) + 5;
1768[; ;pic12f1822.h: 5019: extern volatile __bit CCP1AS2 @ (((unsigned) &CCP1AS)*8) + 6;
1769[; ;pic12f1822.h: 5021: extern volatile __bit CCP1ASE @ (((unsigned) &CCP1AS)*8) + 7;
1770[; ;pic12f1822.h: 5023: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
1771[; ;pic12f1822.h: 5025: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
1772[; ;pic12f1822.h: 5027: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
1773[; ;pic12f1822.h: 5029: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
1774[; ;pic12f1822.h: 5031: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
1775[; ;pic12f1822.h: 5033: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
1776[; ;pic12f1822.h: 5035: extern volatile __bit CCP1SEL @ (((unsigned) &APFCON)*8) + 0;
1777[; ;pic12f1822.h: 5037: extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
1778[; ;pic12f1822.h: 5039: extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
1779[; ;pic12f1822.h: 5041: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;
1780[; ;pic12f1822.h: 5043: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
1781[; ;pic12f1822.h: 5045: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
1782[; ;pic12f1822.h: 5047: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
1783[; ;pic12f1822.h: 5049: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
1784[; ;pic12f1822.h: 5051: extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
1785[; ;pic12f1822.h: 5053: extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
1786[; ;pic12f1822.h: 5055: extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
1787[; ;pic12f1822.h: 5057: extern volatile __bit CLKIN @ (((unsigned) &PORTA)*8) + 5;
1788[; ;pic12f1822.h: 5059: extern volatile __bit CLKOUT @ (((unsigned) &PORTA)*8) + 4;
1789[; ;pic12f1822.h: 5061: extern volatile __bit CLKR @ (((unsigned) &PORTA)*8) + 4;
1790[; ;pic12f1822.h: 5063: extern volatile __bit CLKRDC0 @ (((unsigned) &CLKRCON)*8) + 3;
1791[; ;pic12f1822.h: 5065: extern volatile __bit CLKRDC1 @ (((unsigned) &CLKRCON)*8) + 4;
1792[; ;pic12f1822.h: 5067: extern volatile __bit CLKRDIV0 @ (((unsigned) &CLKRCON)*8) + 0;
1793[; ;pic12f1822.h: 5069: extern volatile __bit CLKRDIV1 @ (((unsigned) &CLKRCON)*8) + 1;
1794[; ;pic12f1822.h: 5071: extern volatile __bit CLKRDIV2 @ (((unsigned) &CLKRCON)*8) + 2;
1795[; ;pic12f1822.h: 5073: extern volatile __bit CLKREN @ (((unsigned) &CLKRCON)*8) + 7;
1796[; ;pic12f1822.h: 5075: extern volatile __bit CLKROE @ (((unsigned) &CLKRCON)*8) + 6;
1797[; ;pic12f1822.h: 5077: extern volatile __bit CLKRSLR @ (((unsigned) &CLKRCON)*8) + 5;
1798[; ;pic12f1822.h: 5079: extern volatile __bit CPS0 @ (((unsigned) &PORTA)*8) + 0;
1799[; ;pic12f1822.h: 5081: extern volatile __bit CPS1 @ (((unsigned) &PORTA)*8) + 1;
1800[; ;pic12f1822.h: 5083: extern volatile __bit CPS2 @ (((unsigned) &PORTA)*8) + 2;
1801[; ;pic12f1822.h: 5085: extern volatile __bit CPS3 @ (((unsigned) &PORTA)*8) + 4;
1802[; ;pic12f1822.h: 5087: extern volatile __bit CPSCH0 @ (((unsigned) &CPSCON1)*8) + 0;
1803[; ;pic12f1822.h: 5089: extern volatile __bit CPSCH1 @ (((unsigned) &CPSCON1)*8) + 1;
1804[; ;pic12f1822.h: 5091: extern volatile __bit CPSON @ (((unsigned) &CPSCON0)*8) + 7;
1805[; ;pic12f1822.h: 5093: extern volatile __bit CPSOUT @ (((unsigned) &CPSCON0)*8) + 1;
1806[; ;pic12f1822.h: 5095: extern volatile __bit CPSRM @ (((unsigned) &CPSCON0)*8) + 6;
1807[; ;pic12f1822.h: 5097: extern volatile __bit CPSRNG0 @ (((unsigned) &CPSCON0)*8) + 2;
1808[; ;pic12f1822.h: 5099: extern volatile __bit CPSRNG1 @ (((unsigned) &CPSCON0)*8) + 3;
1809[; ;pic12f1822.h: 5101: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
1810[; ;pic12f1822.h: 5103: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
1811[; ;pic12f1822.h: 5105: extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
1812[; ;pic12f1822.h: 5107: extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
1813[; ;pic12f1822.h: 5109: extern volatile __bit DACLPS @ (((unsigned) &DACCON0)*8) + 6;
1814[; ;pic12f1822.h: 5111: extern volatile __bit DACOE @ (((unsigned) &DACCON0)*8) + 5;
1815[; ;pic12f1822.h: 5113: extern volatile __bit DACOUT @ (((unsigned) &PORTA)*8) + 0;
1816[; ;pic12f1822.h: 5115: extern volatile __bit DACPSS0 @ (((unsigned) &DACCON0)*8) + 2;
1817[; ;pic12f1822.h: 5117: extern volatile __bit DACPSS1 @ (((unsigned) &DACCON0)*8) + 3;
1818[; ;pic12f1822.h: 5119: extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
1819[; ;pic12f1822.h: 5121: extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
1820[; ;pic12f1822.h: 5123: extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
1821[; ;pic12f1822.h: 5125: extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
1822[; ;pic12f1822.h: 5127: extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
1823[; ;pic12f1822.h: 5129: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
1824[; ;pic12f1822.h: 5131: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
1825[; ;pic12f1822.h: 5133: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
1826[; ;pic12f1822.h: 5135: extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
1827[; ;pic12f1822.h: 5137: extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
1828[; ;pic12f1822.h: 5139: extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
1829[; ;pic12f1822.h: 5141: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;
1830[; ;pic12f1822.h: 5143: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;
1831[; ;pic12f1822.h: 5145: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
1832[; ;pic12f1822.h: 5147: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
1833[; ;pic12f1822.h: 5149: extern volatile __bit FLT0 @ (((unsigned) &PORTA)*8) + 2;
1834[; ;pic12f1822.h: 5151: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
1835[; ;pic12f1822.h: 5153: extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
1836[; ;pic12f1822.h: 5155: extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
1837[; ;pic12f1822.h: 5157: extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
1838[; ;pic12f1822.h: 5159: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
1839[; ;pic12f1822.h: 5161: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
1840[; ;pic12f1822.h: 5163: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
1841[; ;pic12f1822.h: 5165: extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
1842[; ;pic12f1822.h: 5167: extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
1843[; ;pic12f1822.h: 5169: extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
1844[; ;pic12f1822.h: 5171: extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
1845[; ;pic12f1822.h: 5173: extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
1846[; ;pic12f1822.h: 5175: extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
1847[; ;pic12f1822.h: 5177: extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
1848[; ;pic12f1822.h: 5179: extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
1849[; ;pic12f1822.h: 5181: extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
1850[; ;pic12f1822.h: 5183: extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
1851[; ;pic12f1822.h: 5185: extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
1852[; ;pic12f1822.h: 5187: extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
1853[; ;pic12f1822.h: 5189: extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
1854[; ;pic12f1822.h: 5191: extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
1855[; ;pic12f1822.h: 5193: extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
1856[; ;pic12f1822.h: 5195: extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
1857[; ;pic12f1822.h: 5197: extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
1858[; ;pic12f1822.h: 5199: extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
1859[; ;pic12f1822.h: 5201: extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
1860[; ;pic12f1822.h: 5203: extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
1861[; ;pic12f1822.h: 5205: extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
1862[; ;pic12f1822.h: 5207: extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
1863[; ;pic12f1822.h: 5209: extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
1864[; ;pic12f1822.h: 5211: extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
1865[; ;pic12f1822.h: 5213: extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
1866[; ;pic12f1822.h: 5215: extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
1867[; ;pic12f1822.h: 5217: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
1868[; ;pic12f1822.h: 5219: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
1869[; ;pic12f1822.h: 5221: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
1870[; ;pic12f1822.h: 5223: extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
1871[; ;pic12f1822.h: 5225: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
1872[; ;pic12f1822.h: 5227: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
1873[; ;pic12f1822.h: 5229: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
1874[; ;pic12f1822.h: 5231: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
1875[; ;pic12f1822.h: 5233: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
1876[; ;pic12f1822.h: 5235: extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
1877[; ;pic12f1822.h: 5237: extern volatile __bit LWLO @ (((unsigned) &EECON1)*8) + 5;
1878[; ;pic12f1822.h: 5239: extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
1879[; ;pic12f1822.h: 5241: extern volatile __bit MDBIT @ (((unsigned) &MDCON)*8) + 0;
1880[; ;pic12f1822.h: 5243: extern volatile __bit MDCH0 @ (((unsigned) &MDCARH)*8) + 0;
1881[; ;pic12f1822.h: 5245: extern volatile __bit MDCH1 @ (((unsigned) &MDCARH)*8) + 1;
1882[; ;pic12f1822.h: 5247: extern volatile __bit MDCH2 @ (((unsigned) &MDCARH)*8) + 2;
1883[; ;pic12f1822.h: 5249: extern volatile __bit MDCH3 @ (((unsigned) &MDCARH)*8) + 3;
1884[; ;pic12f1822.h: 5251: extern volatile __bit MDCHODIS @ (((unsigned) &MDCARH)*8) + 7;
1885[; ;pic12f1822.h: 5253: extern volatile __bit MDCHPOL @ (((unsigned) &MDCARH)*8) + 6;
1886[; ;pic12f1822.h: 5255: extern volatile __bit MDCHSYNC @ (((unsigned) &MDCARH)*8) + 5;
1887[; ;pic12f1822.h: 5257: extern volatile __bit MDCIN1 @ (((unsigned) &PORTA)*8) + 2;
1888[; ;pic12f1822.h: 5259: extern volatile __bit MDCIN2 @ (((unsigned) &PORTA)*8) + 4;
1889[; ;pic12f1822.h: 5261: extern volatile __bit MDCL0 @ (((unsigned) &MDCARL)*8) + 0;
1890[; ;pic12f1822.h: 5263: extern volatile __bit MDCL1 @ (((unsigned) &MDCARL)*8) + 1;
1891[; ;pic12f1822.h: 5265: extern volatile __bit MDCL2 @ (((unsigned) &MDCARL)*8) + 2;
1892[; ;pic12f1822.h: 5267: extern volatile __bit MDCL3 @ (((unsigned) &MDCARL)*8) + 3;
1893[; ;pic12f1822.h: 5269: extern volatile __bit MDCLODIS @ (((unsigned) &MDCARL)*8) + 7;
1894[; ;pic12f1822.h: 5271: extern volatile __bit MDCLPOL @ (((unsigned) &MDCARL)*8) + 6;
1895[; ;pic12f1822.h: 5273: extern volatile __bit MDCLSYNC @ (((unsigned) &MDCARL)*8) + 5;
1896[; ;pic12f1822.h: 5275: extern volatile __bit MDEN @ (((unsigned) &MDCON)*8) + 7;
1897[; ;pic12f1822.h: 5277: extern volatile __bit MDMIN @ (((unsigned) &PORTA)*8) + 1;
1898[; ;pic12f1822.h: 5279: extern volatile __bit MDMS0 @ (((unsigned) &MDSRC)*8) + 0;
1899[; ;pic12f1822.h: 5281: extern volatile __bit MDMS1 @ (((unsigned) &MDSRC)*8) + 1;
1900[; ;pic12f1822.h: 5283: extern volatile __bit MDMS2 @ (((unsigned) &MDSRC)*8) + 2;
1901[; ;pic12f1822.h: 5285: extern volatile __bit MDMS3 @ (((unsigned) &MDSRC)*8) + 3;
1902[; ;pic12f1822.h: 5287: extern volatile __bit MDMSODIS @ (((unsigned) &MDSRC)*8) + 7;
1903[; ;pic12f1822.h: 5289: extern volatile __bit MDOE @ (((unsigned) &MDCON)*8) + 6;
1904[; ;pic12f1822.h: 5291: extern volatile __bit MDOPOL @ (((unsigned) &MDCON)*8) + 4;
1905[; ;pic12f1822.h: 5293: extern volatile __bit MDSLR @ (((unsigned) &MDCON)*8) + 5;
1906[; ;pic12f1822.h: 5295: extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
1907[; ;pic12f1822.h: 5297: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
1908[; ;pic12f1822.h: 5299: extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 5;
1909[; ;pic12f1822.h: 5301: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 4;
1910[; ;pic12f1822.h: 5303: extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
1911[; ;pic12f1822.h: 5305: extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
1912[; ;pic12f1822.h: 5307: extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
1913[; ;pic12f1822.h: 5309: extern volatile __bit P1BSEL @ (((unsigned) &APFCON)*8) + 1;
1914[; ;pic12f1822.h: 5311: extern volatile __bit P1DC0 @ (((unsigned) &PWM1CON)*8) + 0;
1915[; ;pic12f1822.h: 5313: extern volatile __bit P1DC1 @ (((unsigned) &PWM1CON)*8) + 1;
1916[; ;pic12f1822.h: 5315: extern volatile __bit P1DC2 @ (((unsigned) &PWM1CON)*8) + 2;
1917[; ;pic12f1822.h: 5317: extern volatile __bit P1DC3 @ (((unsigned) &PWM1CON)*8) + 3;
1918[; ;pic12f1822.h: 5319: extern volatile __bit P1DC4 @ (((unsigned) &PWM1CON)*8) + 4;
1919[; ;pic12f1822.h: 5321: extern volatile __bit P1DC5 @ (((unsigned) &PWM1CON)*8) + 5;
1920[; ;pic12f1822.h: 5323: extern volatile __bit P1DC6 @ (((unsigned) &PWM1CON)*8) + 6;
1921[; ;pic12f1822.h: 5325: extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
1922[; ;pic12f1822.h: 5327: extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
1923[; ;pic12f1822.h: 5329: extern volatile __bit P1RSEN @ (((unsigned) &PWM1CON)*8) + 7;
1924[; ;pic12f1822.h: 5331: extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
1925[; ;pic12f1822.h: 5333: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
1926[; ;pic12f1822.h: 5335: extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
1927[; ;pic12f1822.h: 5337: extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
1928[; ;pic12f1822.h: 5339: extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
1929[; ;pic12f1822.h: 5341: extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
1930[; ;pic12f1822.h: 5343: extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
1931[; ;pic12f1822.h: 5345: extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
1932[; ;pic12f1822.h: 5347: extern volatile __bit PSS1AC0 @ (((unsigned) &CCP1AS)*8) + 2;
1933[; ;pic12f1822.h: 5349: extern volatile __bit PSS1AC1 @ (((unsigned) &CCP1AS)*8) + 3;
1934[; ;pic12f1822.h: 5351: extern volatile __bit PSS1BD0 @ (((unsigned) &CCP1AS)*8) + 0;
1935[; ;pic12f1822.h: 5353: extern volatile __bit PSS1BD1 @ (((unsigned) &CCP1AS)*8) + 1;
1936[; ;pic12f1822.h: 5355: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
1937[; ;pic12f1822.h: 5357: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
1938[; ;pic12f1822.h: 5359: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
1939[; ;pic12f1822.h: 5361: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
1940[; ;pic12f1822.h: 5363: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
1941[; ;pic12f1822.h: 5365: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
1942[; ;pic12f1822.h: 5367: extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
1943[; ;pic12f1822.h: 5369: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
1944[; ;pic12f1822.h: 5371: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
1945[; ;pic12f1822.h: 5373: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
1946[; ;pic12f1822.h: 5375: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;
1947[; ;pic12f1822.h: 5377: extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
1948[; ;pic12f1822.h: 5379: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
1949[; ;pic12f1822.h: 5381: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
1950[; ;pic12f1822.h: 5383: extern volatile __bit RXDTSEL @ (((unsigned) &APFCON)*8) + 7;
1951[; ;pic12f1822.h: 5385: extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
1952[; ;pic12f1822.h: 5387: extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
1953[; ;pic12f1822.h: 5389: extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
1954[; ;pic12f1822.h: 5391: extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
1955[; ;pic12f1822.h: 5393: extern volatile __bit SCK @ (((unsigned) &PORTA)*8) + 1;
1956[; ;pic12f1822.h: 5395: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
1957[; ;pic12f1822.h: 5397: extern volatile __bit SCL @ (((unsigned) &PORTA)*8) + 1;
1958[; ;pic12f1822.h: 5399: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
1959[; ;pic12f1822.h: 5401: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
1960[; ;pic12f1822.h: 5403: extern volatile __bit SDA @ (((unsigned) &PORTA)*8) + 2;
1961[; ;pic12f1822.h: 5405: extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
1962[; ;pic12f1822.h: 5407: extern volatile __bit SDI @ (((unsigned) &PORTA)*8) + 2;
1963[; ;pic12f1822.h: 5409: extern volatile __bit SDO1SEL @ (((unsigned) &APFCON)*8) + 6;
1964[; ;pic12f1822.h: 5411: extern volatile __bit SDOSEL @ (((unsigned) &APFCON)*8) + 6;
1965[; ;pic12f1822.h: 5413: extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
1966[; ;pic12f1822.h: 5415: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
1967[; ;pic12f1822.h: 5417: extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
1968[; ;pic12f1822.h: 5419: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
1969[; ;pic12f1822.h: 5421: extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
1970[; ;pic12f1822.h: 5423: extern volatile __bit SRCLK0 @ (((unsigned) &SRCON0)*8) + 4;
1971[; ;pic12f1822.h: 5425: extern volatile __bit SRCLK1 @ (((unsigned) &SRCON0)*8) + 5;
1972[; ;pic12f1822.h: 5427: extern volatile __bit SRCLK2 @ (((unsigned) &SRCON0)*8) + 6;
1973[; ;pic12f1822.h: 5429: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
1974[; ;pic12f1822.h: 5431: extern volatile __bit SRI @ (((unsigned) &PORTA)*8) + 1;
1975[; ;pic12f1822.h: 5433: extern volatile __bit SRLEN @ (((unsigned) &SRCON0)*8) + 7;
1976[; ;pic12f1822.h: 5435: extern volatile __bit SRNQ @ (((unsigned) &PORTA)*8) + 5;
1977[; ;pic12f1822.h: 5437: extern volatile __bit SRNQEN @ (((unsigned) &SRCON0)*8) + 2;
1978[; ;pic12f1822.h: 5439: extern volatile __bit SRPR @ (((unsigned) &SRCON0)*8) + 0;
1979[; ;pic12f1822.h: 5441: extern volatile __bit SRPS @ (((unsigned) &SRCON0)*8) + 1;
1980[; ;pic12f1822.h: 5443: extern volatile __bit SRQ @ (((unsigned) &PORTA)*8) + 2;
1981[; ;pic12f1822.h: 5445: extern volatile __bit SRQEN @ (((unsigned) &SRCON0)*8) + 3;
1982[; ;pic12f1822.h: 5447: extern volatile __bit SRRC1E @ (((unsigned) &SRCON1)*8) + 0;
1983[; ;pic12f1822.h: 5449: extern volatile __bit SRRCKE @ (((unsigned) &SRCON1)*8) + 2;
1984[; ;pic12f1822.h: 5451: extern volatile __bit SRRPE @ (((unsigned) &SRCON1)*8) + 3;
1985[; ;pic12f1822.h: 5453: extern volatile __bit SRSC1E @ (((unsigned) &SRCON1)*8) + 4;
1986[; ;pic12f1822.h: 5455: extern volatile __bit SRSCKE @ (((unsigned) &SRCON1)*8) + 6;
1987[; ;pic12f1822.h: 5457: extern volatile __bit SRSPE @ (((unsigned) &SRCON1)*8) + 7;
1988[; ;pic12f1822.h: 5459: extern volatile __bit SS1SEL @ (((unsigned) &APFCON)*8) + 5;
1989[; ;pic12f1822.h: 5461: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
1990[; ;pic12f1822.h: 5463: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
1991[; ;pic12f1822.h: 5465: extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
1992[; ;pic12f1822.h: 5467: extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
1993[; ;pic12f1822.h: 5469: extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
1994[; ;pic12f1822.h: 5471: extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
1995[; ;pic12f1822.h: 5473: extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
1996[; ;pic12f1822.h: 5475: extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
1997[; ;pic12f1822.h: 5477: extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 5;
1998[; ;pic12f1822.h: 5479: extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
1999[; ;pic12f1822.h: 5481: extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
2000[; ;pic12f1822.h: 5483: extern volatile __bit STR1A @ (((unsigned) &PSTR1CON)*8) + 0;
2001[; ;pic12f1822.h: 5485: extern volatile __bit STR1B @ (((unsigned) &PSTR1CON)*8) + 1;
2002[; ;pic12f1822.h: 5487: extern volatile __bit STR1C @ (((unsigned) &PSTR1CON)*8) + 2;
2003[; ;pic12f1822.h: 5489: extern volatile __bit STR1D @ (((unsigned) &PSTR1CON)*8) + 3;
2004[; ;pic12f1822.h: 5491: extern volatile __bit STR1SYNC @ (((unsigned) &PSTR1CON)*8) + 4;
2005[; ;pic12f1822.h: 5493: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
2006[; ;pic12f1822.h: 5495: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
2007[; ;pic12f1822.h: 5497: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 2;
2008[; ;pic12f1822.h: 5499: extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2009[; ;pic12f1822.h: 5501: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
2010[; ;pic12f1822.h: 5503: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
2011[; ;pic12f1822.h: 5505: extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2012[; ;pic12f1822.h: 5507: extern volatile __bit T0XCS @ (((unsigned) &CPSCON0)*8) + 0;
2013[; ;pic12f1822.h: 5509: extern volatile __bit T1CKI @ (((unsigned) &PORTA)*8) + 5;
2014[; ;pic12f1822.h: 5511: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
2015[; ;pic12f1822.h: 5513: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
2016[; ;pic12f1822.h: 5515: extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
2017[; ;pic12f1822.h: 5517: extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
2018[; ;pic12f1822.h: 5519: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
2019[; ;pic12f1822.h: 5521: extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
2020[; ;pic12f1822.h: 5523: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
2021[; ;pic12f1822.h: 5525: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
2022[; ;pic12f1822.h: 5527: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
2023[; ;pic12f1822.h: 5529: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
2024[; ;pic12f1822.h: 5531: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
2025[; ;pic12f1822.h: 5533: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
2026[; ;pic12f1822.h: 5535: extern volatile __bit T1OSCR @ (((unsigned) &OSCSTAT)*8) + 7;
2027[; ;pic12f1822.h: 5537: extern volatile __bit T1OSI @ (((unsigned) &PORTA)*8) + 5;
2028[; ;pic12f1822.h: 5539: extern volatile __bit T1OSO @ (((unsigned) &PORTA)*8) + 4;
2029[; ;pic12f1822.h: 5541: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
2030[; ;pic12f1822.h: 5543: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
2031[; ;pic12f1822.h: 5545: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
2032[; ;pic12f1822.h: 5547: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
2033[; ;pic12f1822.h: 5549: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
2034[; ;pic12f1822.h: 5551: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
2035[; ;pic12f1822.h: 5553: extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2036[; ;pic12f1822.h: 5555: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
2037[; ;pic12f1822.h: 5557: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
2038[; ;pic12f1822.h: 5559: extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2039[; ;pic12f1822.h: 5561: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
2040[; ;pic12f1822.h: 5563: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
2041[; ;pic12f1822.h: 5565: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
2042[; ;pic12f1822.h: 5567: extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
2043[; ;pic12f1822.h: 5569: extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
2044[; ;pic12f1822.h: 5571: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
2045[; ;pic12f1822.h: 5573: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
2046[; ;pic12f1822.h: 5575: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
2047[; ;pic12f1822.h: 5577: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
2048[; ;pic12f1822.h: 5579: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
2049[; ;pic12f1822.h: 5581: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
2050[; ;pic12f1822.h: 5583: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
2051[; ;pic12f1822.h: 5585: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
2052[; ;pic12f1822.h: 5587: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
2053[; ;pic12f1822.h: 5589: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
2054[; ;pic12f1822.h: 5591: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
2055[; ;pic12f1822.h: 5593: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
2056[; ;pic12f1822.h: 5595: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
2057[; ;pic12f1822.h: 5597: extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
2058[; ;pic12f1822.h: 5599: extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
2059[; ;pic12f1822.h: 5601: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
2060[; ;pic12f1822.h: 5603: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
2061[; ;pic12f1822.h: 5605: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
2062[; ;pic12f1822.h: 5607: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
2063[; ;pic12f1822.h: 5609: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
2064[; ;pic12f1822.h: 5611: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
2065[; ;pic12f1822.h: 5613: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
2066[; ;pic12f1822.h: 5615: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
2067[; ;pic12f1822.h: 5617: extern volatile __bit TXCKSEL @ (((unsigned) &APFCON)*8) + 2;
2068[; ;pic12f1822.h: 5619: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
2069[; ;pic12f1822.h: 5621: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
2070[; ;pic12f1822.h: 5623: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
2071[; ;pic12f1822.h: 5625: extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
2072[; ;pic12f1822.h: 5627: extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
2073[; ;pic12f1822.h: 5629: extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
2074[; ;pic12f1822.h: 5631: extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
2075[; ;pic12f1822.h: 5633: extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
2076[; ;pic12f1822.h: 5635: extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
2077[; ;pic12f1822.h: 5637: extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
2078[; ;pic12f1822.h: 5639: extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
2079[; ;pic12f1822.h: 5641: extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
2080[; ;pic12f1822.h: 5643: extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
2081[; ;pic12f1822.h: 5645: extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
2082[; ;pic12f1822.h: 5647: extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
2083[; ;pic12f1822.h: 5649: extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
2084[; ;pic12f1822.h: 5651: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
2085[; ;pic12f1822.h: 5653: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
2086[; ;pic12f1822.h: 5655: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
2087[; ;pic12f1822.h: 5657: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
2088[; ;pic12f1822.h: 5659: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
2089[; ;pic12f1822.h: 5661: extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
2090[; ;pic12f1822.h: 5663: extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
2091[; ;pic12f1822.h: 5665: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
2092[; ;pic12f1822.h: 5667: extern volatile __bit nMCLR @ (((unsigned) &PORTA)*8) + 3;
2093[; ;pic12f1822.h: 5669: extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
2094[; ;pic12f1822.h: 5671: extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
2095[; ;pic12f1822.h: 5673: extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
2096[; ;pic12f1822.h: 5675: extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
2097[; ;pic12f1822.h: 5677: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
2098[; ;pic12f1822.h: 5679: extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
2099[; ;pic12f1822.h: 5681: extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
2100[; ;pic.h: 28: extern void _nop(void);
2101[; ;pic.h: 77: extern unsigned int flash_read(unsigned short addr);
2102[; ;eeprom_routines.h: 41: extern void eeprom_write(unsigned char addr, unsigned char value);
2103[; ;eeprom_routines.h: 42: extern unsigned char eeprom_read(unsigned char addr);
2104[; ;eeprom_routines.h: 43: extern void eecpymem(volatile unsigned char *to, __eeprom unsigned char *from, unsigned char size);
2105[; ;eeprom_routines.h: 44: extern void memcpyee(__eeprom unsigned char *to, const unsigned char *from, unsigned char size);
2106[; ;pic.h: 151: extern void _delay(unsigned long);
2107[; ;stdint.h: 13: typedef signed char int8_t;
2108[; ;stdint.h: 20: typedef signed int int16_t;
2109[; ;stdint.h: 28: typedef signed short long int int24_t;
2110[; ;stdint.h: 36: typedef signed long int int32_t;
2111[; ;stdint.h: 43: typedef unsigned char uint8_t;
2112[; ;stdint.h: 49: typedef unsigned int uint16_t;
2113[; ;stdint.h: 56: typedef unsigned short long int uint24_t;
2114[; ;stdint.h: 63: typedef unsigned long int uint32_t;
2115[; ;stdint.h: 71: typedef signed char int_least8_t;
2116[; ;stdint.h: 78: typedef signed int int_least16_t;
2117[; ;stdint.h: 90: typedef signed short long int int_least24_t;
2118[; ;stdint.h: 98: typedef signed long int int_least32_t;
2119[; ;stdint.h: 105: typedef unsigned char uint_least8_t;
2120[; ;stdint.h: 111: typedef unsigned int uint_least16_t;
2121[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;
2122[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;
2123[; ;stdint.h: 137: typedef signed char int_fast8_t;
2124[; ;stdint.h: 144: typedef signed int int_fast16_t;
2125[; ;stdint.h: 156: typedef signed short long int int_fast24_t;
2126[; ;stdint.h: 164: typedef signed long int int_fast32_t;
2127[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;
2128[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;
2129[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;
2130[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;
2131[; ;stdint.h: 200: typedef int32_t intmax_t;
2132[; ;stdint.h: 205: typedef uint32_t uintmax_t;
2133[; ;stdint.h: 210: typedef int16_t intptr_t;
2134[; ;stdint.h: 215: typedef uint16_t uintptr_t;
2135[; ;stdbool.h: 12: typedef unsigned char bool;
2136[; ;user.h: 13: void InitApp(void);
2137[; ;user.h: 14: bool msg_empty(void);
2138[; ;user.h: 15: void msg_write(const char *msg);
2139[; ;user.h: 16: void msg_writebyte(const char msg);
2140[; ;user.h: 17: void msg_sendnext(void);
2141[; ;user.h: 18: void tohex(char val[3], char i);
2142[; ;user.h: 19: void msg_recvnext(void);
2143[; ;user.h: 20: bool msg_recvready(void);
2144[; ;user.h: 21: char msg_recv(void);
2145[; ;user.h: 22: void putch(char);
2146[; ;user.h: 24: void int_disable(void);
2147[; ;user.h: 25: void int_enable(void);
2148"25 interrupts.c
2149[v F2213 `(v ~T0 @X0 1 tf ]
2150[v _isr `IF2213 ~T0 @X0 1 e ]
2151{
2152[; ;interrupts.c: 24: void interrupt isr(void)
2153[; ;interrupts.c: 25: {
2154[e :U _isr ]
2155[f ]
2156[; ;interrupts.c: 31: if (PIE1bits.TXIE && PIR1bits.TXIF)
2157"31
2158[e $ ! && != -> . . _PIE1bits 0 4 `i -> -> -> 0 `i `Vuc `i != -> . . _PIR1bits 0 4 `i -> -> -> 0 `i `Vuc `i 267 ]
2159[; ;interrupts.c: 32: msg_sendnext();
2160"32
2161[e ( _msg_sendnext .. ]
2162[e :U 267 ]
2163[; ;interrupts.c: 34: if (PIE1bits.RCIE && PIR1bits.RCIF)
2164"34
2165[e $ ! && != -> . . _PIE1bits 0 5 `i -> -> -> 0 `i `Vuc `i != -> . . _PIR1bits 0 5 `i -> -> -> 0 `i `Vuc `i 268 ]
2166[; ;interrupts.c: 35: msg_recvnext();
2167"35
2168[e ( _msg_recvnext .. ]
2169[e :U 268 ]
2170[; ;interrupts.c: 57: }
2171"57
2172[e :UE 266 ]
2173}