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Initial import of onewire-to-usb bridge
[onewire] / build / XC8_12F1822 / production / configuration_bits.pre
CommitLineData
bba33fe1
JM		 1
2# 1 "configuration_bits.c"
3
4# 44 "/opt/microchip/xc8/v1.12/include/pic12f1822.h"
5extern volatile unsigned char INDF0 @ 0x000;
6
7asm("INDF0 equ 00h");
8
9
10typedef union {
11struct {
12unsigned INDF0 :8;
13};
14} INDF0bits_t;
15extern volatile INDF0bits_t INDF0bits @ 0x000;
16
17# 63
18extern volatile unsigned char INDF1 @ 0x001;
19
20asm("INDF1 equ 01h");
21
22
23typedef union {
24struct {
25unsigned INDF1 :8;
26};
27} INDF1bits_t;
28extern volatile INDF1bits_t INDF1bits @ 0x001;
29
30# 82
31extern volatile unsigned char PCL @ 0x002;
32
33asm("PCL equ 02h");
34
35
36typedef union {
37struct {
38unsigned PCL :8;
39};
40} PCLbits_t;
41extern volatile PCLbits_t PCLbits @ 0x002;
42
43# 101
44extern volatile unsigned char STATUS @ 0x003;
45
46asm("STATUS equ 03h");
47
48
49typedef union {
50struct {
51unsigned C :1;
52unsigned DC :1;
53unsigned Z :1;
54unsigned nPD :1;
55unsigned nTO :1;
56};
57struct {
58unsigned CARRY :1;
59};
60struct {
61unsigned :2;
62unsigned ZERO :1;
63};
64} STATUSbits_t;
65extern volatile STATUSbits_t STATUSbits @ 0x003;
66
67# 161
68extern volatile unsigned short FSR0 @ 0x004;
69
70
71extern volatile unsigned char FSR0L @ 0x004;
72
73asm("FSR0L equ 04h");
74
75
76typedef union {
77struct {
78unsigned FSR0L :8;
79};
80} FSR0Lbits_t;
81extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
82
83# 183
84extern volatile unsigned char FSR0H @ 0x005;
85
86asm("FSR0H equ 05h");
87
88
89typedef union {
90struct {
91unsigned FSR0H :8;
92};
93} FSR0Hbits_t;
94extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
95
96# 202
97extern volatile unsigned short FSR1 @ 0x006;
98
99
100extern volatile unsigned char FSR1L @ 0x006;
101
102asm("FSR1L equ 06h");
103
104
105typedef union {
106struct {
107unsigned FSR1L :8;
108};
109} FSR1Lbits_t;
110extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
111
112# 224
113extern volatile unsigned char FSR1H @ 0x007;
114
115asm("FSR1H equ 07h");
116
117
118typedef union {
119struct {
120unsigned FSR1H :8;
121};
122} FSR1Hbits_t;
123extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
124
125# 243
126extern volatile unsigned char BSR @ 0x008;
127
128asm("BSR equ 08h");
129
130
131typedef union {
132struct {
133unsigned BSR0 :1;
134unsigned BSR1 :1;
135unsigned BSR2 :1;
136unsigned BSR3 :1;
137unsigned BSR4 :1;
138};
139struct {
140unsigned BSR :5;
141};
142} BSRbits_t;
143extern volatile BSRbits_t BSRbits @ 0x008;
144
145# 294
146extern volatile unsigned char WREG @ 0x009;
147
148asm("WREG equ 09h");
149
150
151typedef union {
152struct {
153unsigned WREG0 :8;
154};
155} WREGbits_t;
156extern volatile WREGbits_t WREGbits @ 0x009;
157
158# 313
159extern volatile unsigned char PCLATH @ 0x00A;
160
161asm("PCLATH equ 0Ah");
162
163
164typedef union {
165struct {
166unsigned PCLATH :7;
167};
168} PCLATHbits_t;
169extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
170
171# 332
172extern volatile unsigned char INTCON @ 0x00B;
173
174asm("INTCON equ 0Bh");
175
176
177typedef union {
178struct {
179unsigned IOCIF :1;
180unsigned INTF :1;
181unsigned TMR0IF :1;
182unsigned IOCIE :1;
183unsigned INTE :1;
184unsigned TMR0IE :1;
185unsigned PEIE :1;
186unsigned GIE :1;
187};
188struct {
189unsigned :2;
190unsigned T0IF :1;
191unsigned :2;
192unsigned T0IE :1;
193};
194} INTCONbits_t;
195extern volatile INTCONbits_t INTCONbits @ 0x00B;
196
197# 409
198extern volatile unsigned char PORTA @ 0x00C;
199
200asm("PORTA equ 0Ch");
201
202
203typedef union {
204struct {
205unsigned RA0 :1;
206unsigned RA1 :1;
207unsigned RA2 :1;
208unsigned RA3 :1;
209unsigned RA4 :1;
210unsigned RA5 :1;
211};
212struct {
213unsigned AN0 :1;
214unsigned AN1 :1;
215unsigned AN2 :1;
216unsigned :1;
217unsigned AN3 :1;
218};
219struct {
220unsigned CPS0 :1;
221unsigned CPS1 :1;
222unsigned CPS2 :1;
223unsigned :1;
224unsigned CPS3 :1;
225};
226struct {
227unsigned C1INP :1;
228unsigned C1IN0N :1;
229unsigned C1OUT :1;
230unsigned :1;
231unsigned C1IN1N :1;
232};
233struct {
234unsigned DACOUT :1;
235unsigned SRI :1;
236unsigned SRQ :1;
237unsigned :2;
238unsigned SRNQ :1;
239};
240struct {
241unsigned :1;
242unsigned SCK :1;
243unsigned T0CKI :1;
244unsigned :1;
245unsigned T1OSO :1;
246unsigned T1CKI :1;
247};
248struct {
249unsigned :1;
250unsigned SCL :1;
251unsigned SDA :1;
252unsigned nMCLR :1;
253unsigned CLKR :1;
254unsigned T1OSI :1;
255};
256struct {
257unsigned MDOUT :1;
258unsigned MDMIN :1;
259unsigned MDCIN1 :1;
260unsigned :1;
261unsigned MDCIN2 :1;
262};
263struct {
264unsigned :2;
265unsigned SDI :1;
266unsigned :1;
267unsigned OSC2 :1;
268unsigned OSC1 :1;
269};
270struct {
271unsigned :2;
272unsigned FLT0 :1;
273unsigned :1;
274unsigned CLKOUT :1;
275unsigned CLKIN :1;
276};
277} PORTAbits_t;
278extern volatile PORTAbits_t PORTAbits @ 0x00C;
279
280# 698
281extern volatile unsigned char PIR1 @ 0x011;
282
283asm("PIR1 equ 011h");
284
285
286typedef union {
287struct {
288unsigned TMR1IF :1;
289unsigned TMR2IF :1;
290unsigned CCP1IF :1;
291unsigned SSP1IF :1;
292unsigned TXIF :1;
293unsigned RCIF :1;
294unsigned ADIF :1;
295unsigned TMR1GIF :1;
296};
297} PIR1bits_t;
298extern volatile PIR1bits_t PIR1bits @ 0x011;
299
300# 759
301extern volatile unsigned char PIR2 @ 0x012;
302
303asm("PIR2 equ 012h");
304
305
306typedef union {
307struct {
308unsigned :3;
309unsigned BCL1IF :1;
310unsigned EEIF :1;
311unsigned C1IF :1;
312unsigned :1;
313unsigned OSFIF :1;
314};
315} PIR2bits_t;
316extern volatile PIR2bits_t PIR2bits @ 0x012;
317
318# 798
319extern volatile unsigned char TMR0 @ 0x015;
320
321asm("TMR0 equ 015h");
322
323
324typedef union {
325struct {
326unsigned TMR0 :8;
327};
328} TMR0bits_t;
329extern volatile TMR0bits_t TMR0bits @ 0x015;
330
331# 817
332extern volatile unsigned short TMR1 @ 0x016;
333
334asm("TMR1 equ 016h");
335
336
337
338extern volatile unsigned char TMR1L @ 0x016;
339
340asm("TMR1L equ 016h");
341
342
343typedef union {
344struct {
345unsigned TMR1L :8;
346};
347} TMR1Lbits_t;
348extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
349
350# 842
351extern volatile unsigned char TMR1H @ 0x017;
352
353asm("TMR1H equ 017h");
354
355
356typedef union {
357struct {
358unsigned TMR1H :8;
359};
360} TMR1Hbits_t;
361extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
362
363# 861
364extern volatile unsigned char T1CON @ 0x018;
365
366asm("T1CON equ 018h");
367
368
369typedef union {
370struct {
371unsigned TMR1ON :1;
372unsigned :1;
373unsigned nT1SYNC :1;
374unsigned T1OSCEN :1;
375unsigned T1CKPS0 :1;
376unsigned T1CKPS1 :1;
377unsigned TMR1CS0 :1;
378unsigned TMR1CS1 :1;
379};
380struct {
381unsigned :4;
382unsigned T1CKPS :2;
383unsigned TMR1CS :2;
384};
385} T1CONbits_t;
386extern volatile T1CONbits_t T1CONbits @ 0x018;
387
388# 932
389extern volatile unsigned char T1GCON @ 0x019;
390
391asm("T1GCON equ 019h");
392
393
394typedef union {
395struct {
396unsigned T1GSS0 :1;
397unsigned T1GSS1 :1;
398unsigned T1GVAL :1;
399unsigned T1GGO_nDONE :1;
400unsigned T1GSPM :1;
401unsigned T1GTM :1;
402unsigned T1GPOL :1;
403unsigned TMR1GE :1;
404};
405struct {
406unsigned T1GSS :2;
407unsigned :1;
408unsigned T1GGO :1;
409};
410} T1GCONbits_t;
411extern volatile T1GCONbits_t T1GCONbits @ 0x019;
412
413# 1008
414extern volatile unsigned char TMR2 @ 0x01A;
415
416asm("TMR2 equ 01Ah");
417
418
419typedef union {
420struct {
421unsigned TMR2 :8;
422};
423} TMR2bits_t;
424extern volatile TMR2bits_t TMR2bits @ 0x01A;
425
426# 1027
427extern volatile unsigned char PR2 @ 0x01B;
428
429asm("PR2 equ 01Bh");
430
431
432typedef union {
433struct {
434unsigned PR2 :8;
435};
436} PR2bits_t;
437extern volatile PR2bits_t PR2bits @ 0x01B;
438
439# 1046
440extern volatile unsigned char T2CON @ 0x01C;
441
442asm("T2CON equ 01Ch");
443
444
445typedef union {
446struct {
447unsigned T2CKPS0 :1;
448unsigned T2CKPS1 :1;
449unsigned TMR2ON :1;
450unsigned T2OUTPS0 :1;
451unsigned T2OUTPS1 :1;
452unsigned T2OUTPS2 :1;
453unsigned T2OUTPS3 :1;
454};
455struct {
456unsigned T2CKPS :2;
457unsigned :1;
458unsigned T2OUTPS :4;
459};
460} T2CONbits_t;
461extern volatile T2CONbits_t T2CONbits @ 0x01C;
462
463# 1116
464extern volatile unsigned char CPSCON0 @ 0x01E;
465
466asm("CPSCON0 equ 01Eh");
467
468
469typedef union {
470struct {
471unsigned T0XCS :1;
472unsigned CPSOUT :1;
473unsigned CPSRNG0 :1;
474unsigned CPSRNG1 :1;
475unsigned :2;
476unsigned CPSRM :1;
477unsigned CPSON :1;
478};
479struct {
480unsigned :2;
481unsigned CPSRNG :2;
482};
483} CPSCON0bits_t;
484extern volatile CPSCON0bits_t CPSCON0bits @ 0x01E;
485
486# 1175
487extern volatile unsigned char CPSCON1 @ 0x01F;
488
489asm("CPSCON1 equ 01Fh");
490
491
492typedef union {
493struct {
494unsigned CPSCH0 :1;
495unsigned CPSCH1 :1;
496};
497struct {
498unsigned CPSCH :2;
499};
500} CPSCON1bits_t;
501extern volatile CPSCON1bits_t CPSCON1bits @ 0x01F;
502
503# 1208
504extern volatile unsigned char TRISA @ 0x08C;
505
506asm("TRISA equ 08Ch");
507
508
509typedef union {
510struct {
511unsigned TRISA0 :1;
512unsigned TRISA1 :1;
513unsigned TRISA2 :1;
514unsigned TRISA3 :1;
515unsigned TRISA4 :1;
516unsigned TRISA5 :1;
517};
518} TRISAbits_t;
519extern volatile TRISAbits_t TRISAbits @ 0x08C;
520
521# 1257
522extern volatile unsigned char PIE1 @ 0x091;
523
524asm("PIE1 equ 091h");
525
526
527typedef union {
528struct {
529unsigned TMR1IE :1;
530unsigned TMR2IE :1;
531unsigned CCP1IE :1;
532unsigned SSP1IE :1;
533unsigned TXIE :1;
534unsigned RCIE :1;
535unsigned ADIE :1;
536unsigned TMR1GIE :1;
537};
538} PIE1bits_t;
539extern volatile PIE1bits_t PIE1bits @ 0x091;
540
541# 1318
542extern volatile unsigned char PIE2 @ 0x092;
543
544asm("PIE2 equ 092h");
545
546
547typedef union {
548struct {
549unsigned :3;
550unsigned BCL1IE :1;
551unsigned EEIE :1;
552unsigned C1IE :1;
553unsigned :1;
554unsigned OSFIE :1;
555};
556} PIE2bits_t;
557extern volatile PIE2bits_t PIE2bits @ 0x092;
558
559# 1357
560extern volatile unsigned char OPTION_REG @ 0x095;
561
562asm("OPTION_REG equ 095h");
563
564
565typedef union {
566struct {
567unsigned PS0 :1;
568unsigned PS1 :1;
569unsigned PS2 :1;
570unsigned PSA :1;
571unsigned TMR0SE :1;
572unsigned TMR0CS :1;
573unsigned INTEDG :1;
574unsigned nWPUEN :1;
575};
576struct {
577unsigned PS :3;
578unsigned :1;
579unsigned T0SE :1;
580unsigned T0CS :1;
581};
582} OPTION_REGbits_t;
583extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
584
585# 1439
586extern volatile unsigned char PCON @ 0x096;
587
588asm("PCON equ 096h");
589
590
591typedef union {
592struct {
593unsigned nBOR :1;
594unsigned nPOR :1;
595unsigned nRI :1;
596unsigned nRMCLR :1;
597unsigned :2;
598unsigned STKUNF :1;
599unsigned STKOVF :1;
600};
601} PCONbits_t;
602extern volatile PCONbits_t PCONbits @ 0x096;
603
604# 1489
605extern volatile unsigned char WDTCON @ 0x097;
606
607asm("WDTCON equ 097h");
608
609
610typedef union {
611struct {
612unsigned SWDTEN :1;
613unsigned WDTPS0 :1;
614unsigned WDTPS1 :1;
615unsigned WDTPS2 :1;
616unsigned WDTPS3 :1;
617unsigned WDTPS4 :1;
618};
619struct {
620unsigned :1;
621unsigned WDTPS :5;
622};
623} WDTCONbits_t;
624extern volatile WDTCONbits_t WDTCONbits @ 0x097;
625
626# 1547
627extern volatile unsigned char OSCTUNE @ 0x098;
628
629asm("OSCTUNE equ 098h");
630
631
632typedef union {
633struct {
634unsigned TUN0 :1;
635unsigned TUN1 :1;
636unsigned TUN2 :1;
637unsigned TUN3 :1;
638unsigned TUN4 :1;
639unsigned TUN5 :1;
640};
641struct {
642unsigned TUN :6;
643};
644} OSCTUNEbits_t;
645extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
646
647# 1604
648extern volatile unsigned char OSCCON @ 0x099;
649
650asm("OSCCON equ 099h");
651
652
653typedef union {
654struct {
655unsigned SCS0 :1;
656unsigned SCS1 :1;
657unsigned :1;
658unsigned IRCF0 :1;
659unsigned IRCF1 :1;
660unsigned IRCF2 :1;
661unsigned IRCF3 :1;
662unsigned SPLLEN :1;
663};
664struct {
665unsigned SCS :2;
666unsigned :1;
667unsigned IRCF :4;
668};
669} OSCCONbits_t;
670extern volatile OSCCONbits_t OSCCONbits @ 0x099;
671
672# 1675
673extern volatile unsigned char OSCSTAT @ 0x09A;
674
675asm("OSCSTAT equ 09Ah");
676
677
678typedef union {
679struct {
680unsigned HFIOFS :1;
681unsigned LFIOFR :1;
682unsigned MFIOFR :1;
683unsigned HFIOFL :1;
684unsigned HFIOFR :1;
685unsigned OSTS :1;
686unsigned PLLR :1;
687unsigned T1OSCR :1;
688};
689} OSCSTATbits_t;
690extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
691
692# 1736
693extern volatile unsigned short ADRES @ 0x09B;
694
695asm("ADRES equ 09Bh");
696
697
698
699extern volatile unsigned char ADRESL @ 0x09B;
700
701asm("ADRESL equ 09Bh");
702
703
704typedef union {
705struct {
706unsigned ADRESL :8;
707};
708} ADRESLbits_t;
709extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
710
711# 1761
712extern volatile unsigned char ADRESH @ 0x09C;
713
714asm("ADRESH equ 09Ch");
715
716
717typedef union {
718struct {
719unsigned ADRESH :8;
720};
721} ADRESHbits_t;
722extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
723
724# 1780
725extern volatile unsigned char ADCON0 @ 0x09D;
726
727asm("ADCON0 equ 09Dh");
728
729
730typedef union {
731struct {
732unsigned ADON :1;
733unsigned GO_nDONE :1;
734unsigned CHS0 :1;
735unsigned CHS1 :1;
736unsigned CHS2 :1;
737unsigned CHS3 :1;
738unsigned CHS4 :1;
739};
740struct {
741unsigned :1;
742unsigned ADGO :1;
743unsigned CHS :5;
744};
745struct {
746unsigned :1;
747unsigned GO :1;
748};
749struct {
750unsigned :1;
751unsigned nDONE :1;
752};
753} ADCON0bits_t;
754extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
755
756# 1868
757extern volatile unsigned char ADCON1 @ 0x09E;
758
759asm("ADCON1 equ 09Eh");
760
761
762typedef union {
763struct {
764unsigned ADPREF0 :1;
765unsigned ADPREF1 :1;
766unsigned :2;
767unsigned ADCS0 :1;
768unsigned ADCS1 :1;
769unsigned ADCS2 :1;
770unsigned ADFM :1;
771};
772struct {
773unsigned ADPREF :2;
774unsigned :2;
775unsigned ADCS :3;
776};
777} ADCON1bits_t;
778extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
779
780# 1933
781extern volatile unsigned char LATA @ 0x10C;
782
783asm("LATA equ 010Ch");
784
785
786typedef union {
787struct {
788unsigned LATA0 :1;
789unsigned LATA1 :1;
790unsigned LATA2 :1;
791unsigned :1;
792unsigned LATA4 :1;
793unsigned LATA5 :1;
794};
795} LATAbits_t;
796extern volatile LATAbits_t LATAbits @ 0x10C;
797
798# 1977
799extern volatile unsigned char CM1CON0 @ 0x111;
800
801asm("CM1CON0 equ 0111h");
802
803
804typedef union {
805struct {
806unsigned C1SYNC :1;
807unsigned C1HYS :1;
808unsigned C1SP :1;
809unsigned :1;
810unsigned C1POL :1;
811unsigned C1OE :1;
812unsigned C1OUT :1;
813unsigned C1ON :1;
814};
815} CM1CON0bits_t;
816extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
817
818# 2033
819extern volatile unsigned char CM1CON1 @ 0x112;
820
821asm("CM1CON1 equ 0112h");
822
823
824typedef union {
825struct {
826unsigned C1NCH0 :1;
827unsigned :3;
828unsigned C1PCH0 :1;
829unsigned C1PCH1 :1;
830unsigned C1INTN :1;
831unsigned C1INTP :1;
832};
833struct {
834unsigned :4;
835unsigned C1PCH :2;
836};
837} CM1CON1bits_t;
838extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
839
840# 2086
841extern volatile unsigned char CMOUT @ 0x115;
842
843asm("CMOUT equ 0115h");
844
845
846typedef union {
847struct {
848unsigned MC1OUT :1;
849};
850} CMOUTbits_t;
851extern volatile CMOUTbits_t CMOUTbits @ 0x115;
852
853# 2105
854extern volatile unsigned char BORCON @ 0x116;
855
856asm("BORCON equ 0116h");
857
858
859typedef union {
860struct {
861unsigned BORRDY :1;
862unsigned :6;
863unsigned SBOREN :1;
864};
865} BORCONbits_t;
866extern volatile BORCONbits_t BORCONbits @ 0x116;
867
868# 2131
869extern volatile unsigned char FVRCON @ 0x117;
870
871asm("FVRCON equ 0117h");
872
873
874typedef union {
875struct {
876unsigned ADFVR0 :1;
877unsigned ADFVR1 :1;
878unsigned CDAFVR0 :1;
879unsigned CDAFVR1 :1;
880unsigned TSRNG :1;
881unsigned TSEN :1;
882unsigned FVRRDY :1;
883unsigned FVREN :1;
884};
885struct {
886unsigned ADFVR :2;
887unsigned CDAFVR :2;
888};
889} FVRCONbits_t;
890extern volatile FVRCONbits_t FVRCONbits @ 0x117;
891
892# 2206
893extern volatile unsigned char DACCON0 @ 0x118;
894
895asm("DACCON0 equ 0118h");
896
897
898typedef union {
899struct {
900unsigned :2;
901unsigned DACPSS0 :1;
902unsigned DACPSS1 :1;
903unsigned :1;
904unsigned DACOE :1;
905unsigned DACLPS :1;
906unsigned DACEN :1;
907};
908struct {
909unsigned :2;
910unsigned DACPSS :2;
911};
912} DACCON0bits_t;
913extern volatile DACCON0bits_t DACCON0bits @ 0x118;
914
915# 2260
916extern volatile unsigned char DACCON1 @ 0x119;
917
918asm("DACCON1 equ 0119h");
919
920
921typedef union {
922struct {
923unsigned DACR0 :1;
924unsigned DACR1 :1;
925unsigned DACR2 :1;
926unsigned DACR3 :1;
927unsigned DACR4 :1;
928};
929struct {
930unsigned DACR :5;
931};
932} DACCON1bits_t;
933extern volatile DACCON1bits_t DACCON1bits @ 0x119;
934
935# 2311
936extern volatile unsigned char SRCON0 @ 0x11A;
937
938asm("SRCON0 equ 011Ah");
939
940
941typedef union {
942struct {
943unsigned SRPR :1;
944unsigned SRPS :1;
945unsigned SRNQEN :1;
946unsigned SRQEN :1;
947unsigned SRCLK0 :1;
948unsigned SRCLK1 :1;
949unsigned SRCLK2 :1;
950unsigned SRLEN :1;
951};
952struct {
953unsigned :4;
954unsigned SRCLK :3;
955};
956} SRCON0bits_t;
957extern volatile SRCON0bits_t SRCON0bits @ 0x11A;
958
959# 2381
960extern volatile unsigned char SRCON1 @ 0x11B;
961
962asm("SRCON1 equ 011Bh");
963
964
965typedef union {
966struct {
967unsigned SRRC1E :1;
968unsigned :1;
969unsigned SRRCKE :1;
970unsigned SRRPE :1;
971unsigned SRSC1E :1;
972unsigned :1;
973unsigned SRSCKE :1;
974unsigned SRSPE :1;
975};
976} SRCON1bits_t;
977extern volatile SRCON1bits_t SRCON1bits @ 0x11B;
978
979# 2432
980extern volatile unsigned char APFCON @ 0x11D;
981
982asm("APFCON equ 011Dh");
983
984
985extern volatile unsigned char APFCON0 @ 0x11D;
986
987asm("APFCON0 equ 011Dh");
988
989
990typedef union {
991struct {
992unsigned CCP1SEL :1;
993unsigned P1BSEL :1;
994unsigned TXCKSEL :1;
995unsigned T1GSEL :1;
996unsigned :1;
997unsigned SSSEL :1;
998unsigned SDOSEL :1;
999unsigned RXDTSEL :1;
1000};
1001struct {
1002unsigned :5;
1003unsigned SS1SEL :1;
1004unsigned SDO1SEL :1;
1005};
1006} APFCONbits_t;
1007extern volatile APFCONbits_t APFCONbits @ 0x11D;
1008
1009# 2507
1010typedef union {
1011struct {
1012unsigned CCP1SEL :1;
1013unsigned P1BSEL :1;
1014unsigned TXCKSEL :1;
1015unsigned T1GSEL :1;
1016unsigned :1;
1017unsigned SSSEL :1;
1018unsigned SDOSEL :1;
1019unsigned RXDTSEL :1;
1020};
1021struct {
1022unsigned :5;
1023unsigned SS1SEL :1;
1024unsigned SDO1SEL :1;
1025};
1026} APFCON0bits_t;
1027extern volatile APFCON0bits_t APFCON0bits @ 0x11D;
1028
1029# 2573
1030extern volatile unsigned char ANSELA @ 0x18C;
1031
1032asm("ANSELA equ 018Ch");
1033
1034
1035typedef union {
1036struct {
1037unsigned ANSA0 :1;
1038unsigned ANSA1 :1;
1039unsigned ANSA2 :1;
1040unsigned :1;
1041unsigned ANSA4 :1;
1042};
1043struct {
1044unsigned ANSELA :5;
1045};
1046} ANSELAbits_t;
1047extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
1048
1049# 2619
1050extern volatile unsigned short EEADR @ 0x191;
1051
1052asm("EEADR equ 0191h");
1053
1054
1055
1056extern volatile unsigned char EEADRL @ 0x191;
1057
1058asm("EEADRL equ 0191h");
1059
1060
1061typedef union {
1062struct {
1063unsigned EEADRL :8;
1064};
1065} EEADRLbits_t;
1066extern volatile EEADRLbits_t EEADRLbits @ 0x191;
1067
1068# 2644
1069extern volatile unsigned char EEADRH @ 0x192;
1070
1071asm("EEADRH equ 0192h");
1072
1073
1074typedef union {
1075struct {
1076unsigned EEADRH :7;
1077};
1078} EEADRHbits_t;
1079extern volatile EEADRHbits_t EEADRHbits @ 0x192;
1080
1081# 2663
1082extern volatile unsigned short EEDAT @ 0x193;
1083
1084asm("EEDAT equ 0193h");
1085
1086
1087
1088extern volatile unsigned char EEDATL @ 0x193;
1089
1090asm("EEDATL equ 0193h");
1091
1092
1093extern volatile unsigned char EEDATA @ 0x193;
1094
1095asm("EEDATA equ 0193h");
1096
1097
1098typedef union {
1099struct {
1100unsigned EEDATL :8;
1101};
1102} EEDATLbits_t;
1103extern volatile EEDATLbits_t EEDATLbits @ 0x193;
1104
1105# 2692
1106typedef union {
1107struct {
1108unsigned EEDATL :8;
1109};
1110} EEDATAbits_t;
1111extern volatile EEDATAbits_t EEDATAbits @ 0x193;
1112
1113# 2706
1114extern volatile unsigned char EEDATH @ 0x194;
1115
1116asm("EEDATH equ 0194h");
1117
1118
1119typedef union {
1120struct {
1121unsigned EEDATH :6;
1122};
1123} EEDATHbits_t;
1124extern volatile EEDATHbits_t EEDATHbits @ 0x194;
1125
1126# 2725
1127extern volatile unsigned char EECON1 @ 0x195;
1128
1129asm("EECON1 equ 0195h");
1130
1131
1132typedef union {
1133struct {
1134unsigned RD :1;
1135unsigned WR :1;
1136unsigned WREN :1;
1137unsigned WRERR :1;
1138unsigned FREE :1;
1139unsigned LWLO :1;
1140unsigned CFGS :1;
1141unsigned EEPGD :1;
1142};
1143} EECON1bits_t;
1144extern volatile EECON1bits_t EECON1bits @ 0x195;
1145
1146# 2786
1147extern volatile unsigned char EECON2 @ 0x196;
1148
1149asm("EECON2 equ 0196h");
1150
1151
1152typedef union {
1153struct {
1154unsigned EECON2 :8;
1155};
1156} EECON2bits_t;
1157extern volatile EECON2bits_t EECON2bits @ 0x196;
1158
1159# 2805
1160extern volatile unsigned char RCREG @ 0x199;
1161
1162asm("RCREG equ 0199h");
1163
1164
1165typedef union {
1166struct {
1167unsigned RCREG :8;
1168};
1169} RCREGbits_t;
1170extern volatile RCREGbits_t RCREGbits @ 0x199;
1171
1172# 2824
1173extern volatile unsigned char TXREG @ 0x19A;
1174
1175asm("TXREG equ 019Ah");
1176
1177
1178typedef union {
1179struct {
1180unsigned TXREG :8;
1181};
1182} TXREGbits_t;
1183extern volatile TXREGbits_t TXREGbits @ 0x19A;
1184
1185# 2843
1186extern volatile unsigned char SPBRGL @ 0x19B;
1187
1188asm("SPBRGL equ 019Bh");
1189
1190
1191extern volatile unsigned char SPBRG @ 0x19B;
1192
1193asm("SPBRG equ 019Bh");
1194
1195
1196typedef union {
1197struct {
1198unsigned SPBRGL :8;
1199};
1200} SPBRGLbits_t;
1201extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
1202
1203# 2866
1204typedef union {
1205struct {
1206unsigned SPBRGL :8;
1207};
1208} SPBRGbits_t;
1209extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
1210
1211# 2880
1212extern volatile unsigned char SPBRGH @ 0x19C;
1213
1214asm("SPBRGH equ 019Ch");
1215
1216
1217typedef union {
1218struct {
1219unsigned SPBRGH :8;
1220};
1221} SPBRGHbits_t;
1222extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
1223
1224# 2899
1225extern volatile unsigned char RCSTA @ 0x19D;
1226
1227asm("RCSTA equ 019Dh");
1228
1229
1230typedef union {
1231struct {
1232unsigned RX9D :1;
1233unsigned OERR :1;
1234unsigned FERR :1;
1235unsigned ADDEN :1;
1236unsigned CREN :1;
1237unsigned SREN :1;
1238unsigned RX9 :1;
1239unsigned SPEN :1;
1240};
1241} RCSTAbits_t;
1242extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
1243
1244# 2960
1245extern volatile unsigned char TXSTA @ 0x19E;
1246
1247asm("TXSTA equ 019Eh");
1248
1249
1250typedef union {
1251struct {
1252unsigned TX9D :1;
1253unsigned TRMT :1;
1254unsigned BRGH :1;
1255unsigned SENDB :1;
1256unsigned SYNC :1;
1257unsigned TXEN :1;
1258unsigned TX9 :1;
1259unsigned CSRC :1;
1260};
1261} TXSTAbits_t;
1262extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
1263
1264# 3021
1265extern volatile unsigned char BAUDCON @ 0x19F;
1266
1267asm("BAUDCON equ 019Fh");
1268
1269
1270typedef union {
1271struct {
1272unsigned ABDEN :1;
1273unsigned WUE :1;
1274unsigned :1;
1275unsigned BRG16 :1;
1276unsigned SCKP :1;
1277unsigned :1;
1278unsigned RCIDL :1;
1279unsigned ABDOVF :1;
1280};
1281} BAUDCONbits_t;
1282extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
1283
1284# 3072
1285extern volatile unsigned char WPUA @ 0x20C;
1286
1287asm("WPUA equ 020Ch");
1288
1289
1290typedef union {
1291struct {
1292unsigned WPUA0 :1;
1293unsigned WPUA1 :1;
1294unsigned WPUA2 :1;
1295unsigned WPUA3 :1;
1296unsigned WPUA4 :1;
1297unsigned WPUA5 :1;
1298};
1299struct {
1300unsigned WPUA :6;
1301};
1302} WPUAbits_t;
1303extern volatile WPUAbits_t WPUAbits @ 0x20C;
1304
1305# 3129
1306extern volatile unsigned char SSP1BUF @ 0x211;
1307
1308asm("SSP1BUF equ 0211h");
1309
1310
1311extern volatile unsigned char SSPBUF @ 0x211;
1312
1313asm("SSPBUF equ 0211h");
1314
1315
1316typedef union {
1317struct {
1318unsigned SSPBUF :8;
1319};
1320} SSP1BUFbits_t;
1321extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
1322
1323# 3152
1324typedef union {
1325struct {
1326unsigned SSPBUF :8;
1327};
1328} SSPBUFbits_t;
1329extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
1330
1331# 3166
1332extern volatile unsigned char SSP1ADD @ 0x212;
1333
1334asm("SSP1ADD equ 0212h");
1335
1336
1337extern volatile unsigned char SSPADD @ 0x212;
1338
1339asm("SSPADD equ 0212h");
1340
1341
1342typedef union {
1343struct {
1344unsigned SSPADD :8;
1345};
1346} SSP1ADDbits_t;
1347extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
1348
1349# 3189
1350typedef union {
1351struct {
1352unsigned SSPADD :8;
1353};
1354} SSPADDbits_t;
1355extern volatile SSPADDbits_t SSPADDbits @ 0x212;
1356
1357# 3203
1358extern volatile unsigned char SSP1MSK @ 0x213;
1359
1360asm("SSP1MSK equ 0213h");
1361
1362
1363extern volatile unsigned char SSPMSK @ 0x213;
1364
1365asm("SSPMSK equ 0213h");
1366
1367
1368typedef union {
1369struct {
1370unsigned SSPMSK :8;
1371};
1372} SSP1MSKbits_t;
1373extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
1374
1375# 3226
1376typedef union {
1377struct {
1378unsigned SSPMSK :8;
1379};
1380} SSPMSKbits_t;
1381extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
1382
1383# 3240
1384extern volatile unsigned char SSP1STAT @ 0x214;
1385
1386asm("SSP1STAT equ 0214h");
1387
1388
1389extern volatile unsigned char SSPSTAT @ 0x214;
1390
1391asm("SSPSTAT equ 0214h");
1392
1393
1394typedef union {
1395struct {
1396unsigned BF :1;
1397unsigned UA :1;
1398unsigned R_nW :1;
1399unsigned S :1;
1400unsigned P :1;
1401unsigned D_nA :1;
1402unsigned CKE :1;
1403unsigned SMP :1;
1404};
1405} SSP1STATbits_t;
1406extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
1407
1408# 3305
1409typedef union {
1410struct {
1411unsigned BF :1;
1412unsigned UA :1;
1413unsigned R_nW :1;
1414unsigned S :1;
1415unsigned P :1;
1416unsigned D_nA :1;
1417unsigned CKE :1;
1418unsigned SMP :1;
1419};
1420} SSPSTATbits_t;
1421extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
1422
1423# 3361
1424extern volatile unsigned char SSP1CON1 @ 0x215;
1425
1426asm("SSP1CON1 equ 0215h");
1427
1428
1429extern volatile unsigned char SSPCON1 @ 0x215;
1430
1431asm("SSPCON1 equ 0215h");
1432
1433extern volatile unsigned char SSPCON @ 0x215;
1434
1435asm("SSPCON equ 0215h");
1436
1437
1438typedef union {
1439struct {
1440unsigned SSPM0 :1;
1441unsigned SSPM1 :1;
1442unsigned SSPM2 :1;
1443unsigned SSPM3 :1;
1444unsigned CKP :1;
1445unsigned SSPEN :1;
1446unsigned SSPOV :1;
1447unsigned WCOL :1;
1448};
1449struct {
1450unsigned SSPM :4;
1451};
1452} SSP1CON1bits_t;
1453extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
1454
1455# 3438
1456typedef union {
1457struct {
1458unsigned SSPM0 :1;
1459unsigned SSPM1 :1;
1460unsigned SSPM2 :1;
1461unsigned SSPM3 :1;
1462unsigned CKP :1;
1463unsigned SSPEN :1;
1464unsigned SSPOV :1;
1465unsigned WCOL :1;
1466};
1467struct {
1468unsigned SSPM :4;
1469};
1470} SSPCON1bits_t;
1471extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
1472
1473# 3500
1474typedef union {
1475struct {
1476unsigned SSPM0 :1;
1477unsigned SSPM1 :1;
1478unsigned SSPM2 :1;
1479unsigned SSPM3 :1;
1480unsigned CKP :1;
1481unsigned SSPEN :1;
1482unsigned SSPOV :1;
1483unsigned WCOL :1;
1484};
1485struct {
1486unsigned SSPM :4;
1487};
1488} SSPCONbits_t;
1489extern volatile SSPCONbits_t SSPCONbits @ 0x215;
1490
1491# 3564
1492extern volatile unsigned char SSP1CON2 @ 0x216;
1493
1494asm("SSP1CON2 equ 0216h");
1495
1496
1497extern volatile unsigned char SSPCON2 @ 0x216;
1498
1499asm("SSPCON2 equ 0216h");
1500
1501
1502typedef union {
1503struct {
1504unsigned SEN :1;
1505unsigned RSEN :1;
1506unsigned PEN :1;
1507unsigned RCEN :1;
1508unsigned ACKEN :1;
1509unsigned ACKDT :1;
1510unsigned ACKSTAT :1;
1511unsigned GCEN :1;
1512};
1513} SSP1CON2bits_t;
1514extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
1515
1516# 3629
1517typedef union {
1518struct {
1519unsigned SEN :1;
1520unsigned RSEN :1;
1521unsigned PEN :1;
1522unsigned RCEN :1;
1523unsigned ACKEN :1;
1524unsigned ACKDT :1;
1525unsigned ACKSTAT :1;
1526unsigned GCEN :1;
1527};
1528} SSPCON2bits_t;
1529extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
1530
1531# 3685
1532extern volatile unsigned char SSP1CON3 @ 0x217;
1533
1534asm("SSP1CON3 equ 0217h");
1535
1536
1537extern volatile unsigned char SSPCON3 @ 0x217;
1538
1539asm("SSPCON3 equ 0217h");
1540
1541
1542typedef union {
1543struct {
1544unsigned DHEN :1;
1545unsigned AHEN :1;
1546unsigned SBCDE :1;
1547unsigned SDAHT :1;
1548unsigned BOEN :1;
1549unsigned SCIE :1;
1550unsigned PCIE :1;
1551unsigned ACKTIM :1;
1552};
1553} SSP1CON3bits_t;
1554extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
1555
1556# 3750
1557typedef union {
1558struct {
1559unsigned DHEN :1;
1560unsigned AHEN :1;
1561unsigned SBCDE :1;
1562unsigned SDAHT :1;
1563unsigned BOEN :1;
1564unsigned SCIE :1;
1565unsigned PCIE :1;
1566unsigned ACKTIM :1;
1567};
1568} SSPCON3bits_t;
1569extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
1570
1571# 3806
1572extern volatile unsigned char CCPR1L @ 0x291;
1573
1574asm("CCPR1L equ 0291h");
1575
1576
1577typedef union {
1578struct {
1579unsigned CCPR1L :8;
1580};
1581} CCPR1Lbits_t;
1582extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
1583
1584# 3825
1585extern volatile unsigned char CCPR1H @ 0x292;
1586
1587asm("CCPR1H equ 0292h");
1588
1589
1590typedef union {
1591struct {
1592unsigned CCPR1H :8;
1593};
1594} CCPR1Hbits_t;
1595extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
1596
1597# 3844
1598extern volatile unsigned char CCP1CON @ 0x293;
1599
1600asm("CCP1CON equ 0293h");
1601
1602
1603typedef union {
1604struct {
1605unsigned CCP1M0 :1;
1606unsigned CCP1M1 :1;
1607unsigned CCP1M2 :1;
1608unsigned CCP1M3 :1;
1609unsigned DC1B0 :1;
1610unsigned DC1B1 :1;
1611unsigned P1M0 :1;
1612unsigned P1M1 :1;
1613};
1614struct {
1615unsigned CCP1M :4;
1616unsigned DC1B :2;
1617unsigned P1M :2;
1618};
1619} CCP1CONbits_t;
1620extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
1621
1622# 3925
1623extern volatile unsigned char PWM1CON @ 0x294;
1624
1625asm("PWM1CON equ 0294h");
1626
1627
1628typedef union {
1629struct {
1630unsigned P1DC0 :1;
1631unsigned P1DC1 :1;
1632unsigned P1DC2 :1;
1633unsigned P1DC3 :1;
1634unsigned P1DC4 :1;
1635unsigned P1DC5 :1;
1636unsigned P1DC6 :1;
1637unsigned P1RSEN :1;
1638};
1639struct {
1640unsigned P1DC :7;
1641};
1642} PWM1CONbits_t;
1643extern volatile PWM1CONbits_t PWM1CONbits @ 0x294;
1644
1645# 3994
1646extern volatile unsigned char CCP1AS @ 0x295;
1647
1648asm("CCP1AS equ 0295h");
1649
1650
1651extern volatile unsigned char ECCP1AS @ 0x295;
1652
1653asm("ECCP1AS equ 0295h");
1654
1655
1656typedef union {
1657struct {
1658unsigned PSS1BD0 :1;
1659unsigned PSS1BD1 :1;
1660unsigned PSS1AC0 :1;
1661unsigned PSS1AC1 :1;
1662unsigned CCP1AS0 :1;
1663unsigned CCP1AS1 :1;
1664unsigned CCP1AS2 :1;
1665unsigned CCP1ASE :1;
1666};
1667struct {
1668unsigned PSS1BD :2;
1669unsigned PSS1AC :2;
1670unsigned CCP1AS :3;
1671};
1672} CCP1ASbits_t;
1673extern volatile CCP1ASbits_t CCP1ASbits @ 0x295;
1674
1675# 4079
1676typedef union {
1677struct {
1678unsigned PSS1BD0 :1;
1679unsigned PSS1BD1 :1;
1680unsigned PSS1AC0 :1;
1681unsigned PSS1AC1 :1;
1682unsigned CCP1AS0 :1;
1683unsigned CCP1AS1 :1;
1684unsigned CCP1AS2 :1;
1685unsigned CCP1ASE :1;
1686};
1687struct {
1688unsigned PSS1BD :2;
1689unsigned PSS1AC :2;
1690unsigned CCP1AS :3;
1691};
1692} ECCP1ASbits_t;
1693extern volatile ECCP1ASbits_t ECCP1ASbits @ 0x295;
1694
1695# 4155
1696extern volatile unsigned char PSTR1CON @ 0x296;
1697
1698asm("PSTR1CON equ 0296h");
1699
1700
1701typedef union {
1702struct {
1703unsigned STR1A :1;
1704unsigned STR1B :1;
1705unsigned STR1C :1;
1706unsigned STR1D :1;
1707unsigned STR1SYNC :1;
1708};
1709} PSTR1CONbits_t;
1710extern volatile PSTR1CONbits_t PSTR1CONbits @ 0x296;
1711
1712# 4198
1713extern volatile unsigned char IOCAP @ 0x391;
1714
1715asm("IOCAP equ 0391h");
1716
1717
1718typedef union {
1719struct {
1720unsigned IOCAP0 :1;
1721unsigned IOCAP1 :1;
1722unsigned IOCAP2 :1;
1723unsigned IOCAP3 :1;
1724unsigned IOCAP4 :1;
1725unsigned IOCAP5 :1;
1726};
1727struct {
1728unsigned IOCAP :6;
1729};
1730} IOCAPbits_t;
1731extern volatile IOCAPbits_t IOCAPbits @ 0x391;
1732
1733# 4255
1734extern volatile unsigned char IOCAN @ 0x392;
1735
1736asm("IOCAN equ 0392h");
1737
1738
1739typedef union {
1740struct {
1741unsigned IOCAN0 :1;
1742unsigned IOCAN1 :1;
1743unsigned IOCAN2 :1;
1744unsigned IOCAN3 :1;
1745unsigned IOCAN4 :1;
1746unsigned IOCAN5 :1;
1747};
1748struct {
1749unsigned IOCAN :6;
1750};
1751} IOCANbits_t;
1752extern volatile IOCANbits_t IOCANbits @ 0x392;
1753
1754# 4312
1755extern volatile unsigned char IOCAF @ 0x393;
1756
1757asm("IOCAF equ 0393h");
1758
1759
1760typedef union {
1761struct {
1762unsigned IOCAF0 :1;
1763unsigned IOCAF1 :1;
1764unsigned IOCAF2 :1;
1765unsigned IOCAF3 :1;
1766unsigned IOCAF4 :1;
1767unsigned IOCAF5 :1;
1768};
1769struct {
1770unsigned IOCAF :6;
1771};
1772} IOCAFbits_t;
1773extern volatile IOCAFbits_t IOCAFbits @ 0x393;
1774
1775# 4369
1776extern volatile unsigned char CLKRCON @ 0x39A;
1777
1778asm("CLKRCON equ 039Ah");
1779
1780
1781typedef union {
1782struct {
1783unsigned CLKRDIV0 :1;
1784unsigned CLKRDIV1 :1;
1785unsigned CLKRDIV2 :1;
1786unsigned CLKRDC0 :1;
1787unsigned CLKRDC1 :1;
1788unsigned CLKRSLR :1;
1789unsigned CLKROE :1;
1790unsigned CLKREN :1;
1791};
1792struct {
1793unsigned CLKRDIV :3;
1794unsigned CLKRDC :2;
1795};
1796} CLKRCONbits_t;
1797extern volatile CLKRCONbits_t CLKRCONbits @ 0x39A;
1798
1799# 4444
1800extern volatile unsigned char MDCON @ 0x39C;
1801
1802asm("MDCON equ 039Ch");
1803
1804
1805typedef union {
1806struct {
1807unsigned MDBIT :1;
1808unsigned :2;
1809unsigned MDOUT :1;
1810unsigned MDOPOL :1;
1811unsigned MDSLR :1;
1812unsigned MDOE :1;
1813unsigned MDEN :1;
1814};
1815} MDCONbits_t;
1816extern volatile MDCONbits_t MDCONbits @ 0x39C;
1817
1818# 4494
1819extern volatile unsigned char MDSRC @ 0x39D;
1820
1821asm("MDSRC equ 039Dh");
1822
1823
1824typedef union {
1825struct {
1826unsigned MDMS0 :1;
1827unsigned MDMS1 :1;
1828unsigned MDMS2 :1;
1829unsigned MDMS3 :1;
1830unsigned :3;
1831unsigned MDMSODIS :1;
1832};
1833struct {
1834unsigned MDMS :4;
1835};
1836} MDSRCbits_t;
1837extern volatile MDSRCbits_t MDSRCbits @ 0x39D;
1838
1839# 4546
1840extern volatile unsigned char MDCARL @ 0x39E;
1841
1842asm("MDCARL equ 039Eh");
1843
1844
1845typedef union {
1846struct {
1847unsigned MDCL0 :1;
1848unsigned MDCL1 :1;
1849unsigned MDCL2 :1;
1850unsigned MDCL3 :1;
1851unsigned :1;
1852unsigned MDCLSYNC :1;
1853unsigned MDCLPOL :1;
1854unsigned MDCLODIS :1;
1855};
1856struct {
1857unsigned MDCL :4;
1858};
1859} MDCARLbits_t;
1860extern volatile MDCARLbits_t MDCARLbits @ 0x39E;
1861
1862# 4610
1863extern volatile unsigned char MDCARH @ 0x39F;
1864
1865asm("MDCARH equ 039Fh");
1866
1867
1868typedef union {
1869struct {
1870unsigned MDCH0 :1;
1871unsigned MDCH1 :1;
1872unsigned MDCH2 :1;
1873unsigned MDCH3 :1;
1874unsigned :1;
1875unsigned MDCHSYNC :1;
1876unsigned MDCHPOL :1;
1877unsigned MDCHODIS :1;
1878};
1879struct {
1880unsigned MDCH :4;
1881};
1882} MDCARHbits_t;
1883extern volatile MDCARHbits_t MDCARHbits @ 0x39F;
1884
1885# 4674
1886extern volatile unsigned char STATUS_SHAD @ 0xFE4;
1887
1888asm("STATUS_SHAD equ 0FE4h");
1889
1890
1891typedef union {
1892struct {
1893unsigned C_SHAD :1;
1894unsigned DC_SHAD :1;
1895unsigned Z_SHAD :1;
1896};
1897} STATUS_SHADbits_t;
1898extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
1899
1900# 4705
1901extern volatile unsigned char WREG_SHAD @ 0xFE5;
1902
1903asm("WREG_SHAD equ 0FE5h");
1904
1905
1906typedef union {
1907struct {
1908unsigned WREG_SHAD :8;
1909};
1910} WREG_SHADbits_t;
1911extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
1912
1913# 4724
1914extern volatile unsigned char BSR_SHAD @ 0xFE6;
1915
1916asm("BSR_SHAD equ 0FE6h");
1917
1918
1919typedef union {
1920struct {
1921unsigned BSR_SHAD :5;
1922};
1923} BSR_SHADbits_t;
1924extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
1925
1926# 4743
1927extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
1928
1929asm("PCLATH_SHAD equ 0FE7h");
1930
1931
1932typedef union {
1933struct {
1934unsigned PCLATH_SHAD :7;
1935};
1936} PCLATH_SHADbits_t;
1937extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
1938
1939# 4762
1940extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
1941
1942asm("FSR0L_SHAD equ 0FE8h");
1943
1944
1945typedef union {
1946struct {
1947unsigned FSR0L_SHAD :8;
1948};
1949} FSR0L_SHADbits_t;
1950extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
1951
1952# 4781
1953extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
1954
1955asm("FSR0H_SHAD equ 0FE9h");
1956
1957
1958typedef union {
1959struct {
1960unsigned FSR0H_SHAD :8;
1961};
1962} FSR0H_SHADbits_t;
1963extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
1964
1965# 4800
1966extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
1967
1968asm("FSR1L_SHAD equ 0FEAh");
1969
1970
1971typedef union {
1972struct {
1973unsigned FSR1L_SHAD :8;
1974};
1975} FSR1L_SHADbits_t;
1976extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
1977
1978# 4819
1979extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
1980
1981asm("FSR1H_SHAD equ 0FEBh");
1982
1983
1984typedef union {
1985struct {
1986unsigned FSR1H_SHAD :8;
1987};
1988} FSR1H_SHADbits_t;
1989extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
1990
1991# 4838
1992extern volatile unsigned char STKPTR @ 0xFED;
1993
1994asm("STKPTR equ 0FEDh");
1995
1996
1997typedef union {
1998struct {
1999unsigned STKPTR :5;
2000};
2001} STKPTRbits_t;
2002extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
2003
2004# 4857
2005extern volatile unsigned char TOSL @ 0xFEE;
2006
2007asm("TOSL equ 0FEEh");
2008
2009
2010typedef union {
2011struct {
2012unsigned TOSL :8;
2013};
2014} TOSLbits_t;
2015extern volatile TOSLbits_t TOSLbits @ 0xFEE;
2016
2017# 4876
2018extern volatile unsigned char TOSH @ 0xFEF;
2019
2020asm("TOSH equ 0FEFh");
2021
2022
2023typedef union {
2024struct {
2025unsigned TOSH :7;
2026};
2027} TOSHbits_t;
2028extern volatile TOSHbits_t TOSHbits @ 0xFEF;
2029
2030# 4901
2031extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
2032
2033extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
2034
2035extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
2036
2037extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
2038
2039extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
2040
2041extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
2042
2043extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 4;
2044
2045extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 5;
2046
2047extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
2048
2049extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
2050
2051extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
2052
2053extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
2054
2055extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
2056
2057extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
2058
2059extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
2060
2061extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
2062
2063extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
2064
2065extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
2066
2067extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
2068
2069extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
2070
2071extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
2072
2073extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
2074
2075extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
2076
2077extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 4;
2078
2079extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
2080
2081extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
2082
2083extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
2084
2085extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
2086
2087extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
2088
2089extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
2090
2091extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
2092
2093extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
2094
2095extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
2096
2097extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
2098
2099extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
2100
2101extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
2102
2103extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
2104
2105extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
2106
2107extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
2108
2109extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
2110
2111extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
2112
2113extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
2114
2115extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
2116
2117extern volatile __bit C1IN0N @ (((unsigned) &PORTA)*8) + 1;
2118
2119extern volatile __bit C1IN1N @ (((unsigned) &PORTA)*8) + 4;
2120
2121extern volatile __bit C1INP @ (((unsigned) &PORTA)*8) + 0;
2122
2123extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
2124
2125extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
2126
2127extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
2128
2129extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
2130
2131extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
2132
2133extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
2134
2135extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
2136
2137extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
2138
2139extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
2140
2141extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
2142
2143extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
2144
2145extern volatile __bit CCP1AS0 @ (((unsigned) &CCP1AS)*8) + 4;
2146
2147extern volatile __bit CCP1AS1 @ (((unsigned) &CCP1AS)*8) + 5;
2148
2149extern volatile __bit CCP1AS2 @ (((unsigned) &CCP1AS)*8) + 6;
2150
2151extern volatile __bit CCP1ASE @ (((unsigned) &CCP1AS)*8) + 7;
2152
2153extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
2154
2155extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
2156
2157extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
2158
2159extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
2160
2161extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
2162
2163extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
2164
2165extern volatile __bit CCP1SEL @ (((unsigned) &APFCON)*8) + 0;
2166
2167extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
2168
2169extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
2170
2171extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;
2172
2173extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
2174
2175extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
2176
2177extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
2178
2179extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
2180
2181extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
2182
2183extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
2184
2185extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
2186
2187extern volatile __bit CLKIN @ (((unsigned) &PORTA)*8) + 5;
2188
2189extern volatile __bit CLKOUT @ (((unsigned) &PORTA)*8) + 4;
2190
2191extern volatile __bit CLKR @ (((unsigned) &PORTA)*8) + 4;
2192
2193extern volatile __bit CLKRDC0 @ (((unsigned) &CLKRCON)*8) + 3;
2194
2195extern volatile __bit CLKRDC1 @ (((unsigned) &CLKRCON)*8) + 4;
2196
2197extern volatile __bit CLKRDIV0 @ (((unsigned) &CLKRCON)*8) + 0;
2198
2199extern volatile __bit CLKRDIV1 @ (((unsigned) &CLKRCON)*8) + 1;
2200
2201extern volatile __bit CLKRDIV2 @ (((unsigned) &CLKRCON)*8) + 2;
2202
2203extern volatile __bit CLKREN @ (((unsigned) &CLKRCON)*8) + 7;
2204
2205extern volatile __bit CLKROE @ (((unsigned) &CLKRCON)*8) + 6;
2206
2207extern volatile __bit CLKRSLR @ (((unsigned) &CLKRCON)*8) + 5;
2208
2209extern volatile __bit CPS0 @ (((unsigned) &PORTA)*8) + 0;
2210
2211extern volatile __bit CPS1 @ (((unsigned) &PORTA)*8) + 1;
2212
2213extern volatile __bit CPS2 @ (((unsigned) &PORTA)*8) + 2;
2214
2215extern volatile __bit CPS3 @ (((unsigned) &PORTA)*8) + 4;
2216
2217extern volatile __bit CPSCH0 @ (((unsigned) &CPSCON1)*8) + 0;
2218
2219extern volatile __bit CPSCH1 @ (((unsigned) &CPSCON1)*8) + 1;
2220
2221extern volatile __bit CPSON @ (((unsigned) &CPSCON0)*8) + 7;
2222
2223extern volatile __bit CPSOUT @ (((unsigned) &CPSCON0)*8) + 1;
2224
2225extern volatile __bit CPSRM @ (((unsigned) &CPSCON0)*8) + 6;
2226
2227extern volatile __bit CPSRNG0 @ (((unsigned) &CPSCON0)*8) + 2;
2228
2229extern volatile __bit CPSRNG1 @ (((unsigned) &CPSCON0)*8) + 3;
2230
2231extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
2232
2233extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
2234
2235extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
2236
2237extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
2238
2239extern volatile __bit DACLPS @ (((unsigned) &DACCON0)*8) + 6;
2240
2241extern volatile __bit DACOE @ (((unsigned) &DACCON0)*8) + 5;
2242
2243extern volatile __bit DACOUT @ (((unsigned) &PORTA)*8) + 0;
2244
2245extern volatile __bit DACPSS0 @ (((unsigned) &DACCON0)*8) + 2;
2246
2247extern volatile __bit DACPSS1 @ (((unsigned) &DACCON0)*8) + 3;
2248
2249extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
2250
2251extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
2252
2253extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
2254
2255extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
2256
2257extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
2258
2259extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
2260
2261extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
2262
2263extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
2264
2265extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
2266
2267extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
2268
2269extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
2270
2271extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;
2272
2273extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;
2274
2275extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
2276
2277extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
2278
2279extern volatile __bit FLT0 @ (((unsigned) &PORTA)*8) + 2;
2280
2281extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
2282
2283extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
2284
2285extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
2286
2287extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
2288
2289extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
2290
2291extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
2292
2293extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
2294
2295extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
2296
2297extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
2298
2299extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
2300
2301extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
2302
2303extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
2304
2305extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
2306
2307extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
2308
2309extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
2310
2311extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
2312
2313extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
2314
2315extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
2316
2317extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
2318
2319extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
2320
2321extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
2322
2323extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
2324
2325extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
2326
2327extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
2328
2329extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
2330
2331extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
2332
2333extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
2334
2335extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
2336
2337extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
2338
2339extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
2340
2341extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
2342
2343extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
2344
2345extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
2346
2347extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
2348
2349extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
2350
2351extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
2352
2353extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
2354
2355extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
2356
2357extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
2358
2359extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
2360
2361extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
2362
2363extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
2364
2365extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
2366
2367extern volatile __bit LWLO @ (((unsigned) &EECON1)*8) + 5;
2368
2369extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
2370
2371extern volatile __bit MDBIT @ (((unsigned) &MDCON)*8) + 0;
2372
2373extern volatile __bit MDCH0 @ (((unsigned) &MDCARH)*8) + 0;
2374
2375extern volatile __bit MDCH1 @ (((unsigned) &MDCARH)*8) + 1;
2376
2377extern volatile __bit MDCH2 @ (((unsigned) &MDCARH)*8) + 2;
2378
2379extern volatile __bit MDCH3 @ (((unsigned) &MDCARH)*8) + 3;
2380
2381extern volatile __bit MDCHODIS @ (((unsigned) &MDCARH)*8) + 7;
2382
2383extern volatile __bit MDCHPOL @ (((unsigned) &MDCARH)*8) + 6;
2384
2385extern volatile __bit MDCHSYNC @ (((unsigned) &MDCARH)*8) + 5;
2386
2387extern volatile __bit MDCIN1 @ (((unsigned) &PORTA)*8) + 2;
2388
2389extern volatile __bit MDCIN2 @ (((unsigned) &PORTA)*8) + 4;
2390
2391extern volatile __bit MDCL0 @ (((unsigned) &MDCARL)*8) + 0;
2392
2393extern volatile __bit MDCL1 @ (((unsigned) &MDCARL)*8) + 1;
2394
2395extern volatile __bit MDCL2 @ (((unsigned) &MDCARL)*8) + 2;
2396
2397extern volatile __bit MDCL3 @ (((unsigned) &MDCARL)*8) + 3;
2398
2399extern volatile __bit MDCLODIS @ (((unsigned) &MDCARL)*8) + 7;
2400
2401extern volatile __bit MDCLPOL @ (((unsigned) &MDCARL)*8) + 6;
2402
2403extern volatile __bit MDCLSYNC @ (((unsigned) &MDCARL)*8) + 5;
2404
2405extern volatile __bit MDEN @ (((unsigned) &MDCON)*8) + 7;
2406
2407extern volatile __bit MDMIN @ (((unsigned) &PORTA)*8) + 1;
2408
2409extern volatile __bit MDMS0 @ (((unsigned) &MDSRC)*8) + 0;
2410
2411extern volatile __bit MDMS1 @ (((unsigned) &MDSRC)*8) + 1;
2412
2413extern volatile __bit MDMS2 @ (((unsigned) &MDSRC)*8) + 2;
2414
2415extern volatile __bit MDMS3 @ (((unsigned) &MDSRC)*8) + 3;
2416
2417extern volatile __bit MDMSODIS @ (((unsigned) &MDSRC)*8) + 7;
2418
2419extern volatile __bit MDOE @ (((unsigned) &MDCON)*8) + 6;
2420
2421extern volatile __bit MDOPOL @ (((unsigned) &MDCON)*8) + 4;
2422
2423extern volatile __bit MDSLR @ (((unsigned) &MDCON)*8) + 5;
2424
2425extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
2426
2427extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
2428
2429extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 5;
2430
2431extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 4;
2432
2433extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
2434
2435extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
2436
2437extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
2438
2439extern volatile __bit P1BSEL @ (((unsigned) &APFCON)*8) + 1;
2440
2441extern volatile __bit P1DC0 @ (((unsigned) &PWM1CON)*8) + 0;
2442
2443extern volatile __bit P1DC1 @ (((unsigned) &PWM1CON)*8) + 1;
2444
2445extern volatile __bit P1DC2 @ (((unsigned) &PWM1CON)*8) + 2;
2446
2447extern volatile __bit P1DC3 @ (((unsigned) &PWM1CON)*8) + 3;
2448
2449extern volatile __bit P1DC4 @ (((unsigned) &PWM1CON)*8) + 4;
2450
2451extern volatile __bit P1DC5 @ (((unsigned) &PWM1CON)*8) + 5;
2452
2453extern volatile __bit P1DC6 @ (((unsigned) &PWM1CON)*8) + 6;
2454
2455extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
2456
2457extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
2458
2459extern volatile __bit P1RSEN @ (((unsigned) &PWM1CON)*8) + 7;
2460
2461extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
2462
2463extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
2464
2465extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
2466
2467extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
2468
2469extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
2470
2471extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
2472
2473extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
2474
2475extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
2476
2477extern volatile __bit PSS1AC0 @ (((unsigned) &CCP1AS)*8) + 2;
2478
2479extern volatile __bit PSS1AC1 @ (((unsigned) &CCP1AS)*8) + 3;
2480
2481extern volatile __bit PSS1BD0 @ (((unsigned) &CCP1AS)*8) + 0;
2482
2483extern volatile __bit PSS1BD1 @ (((unsigned) &CCP1AS)*8) + 1;
2484
2485extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
2486
2487extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
2488
2489extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
2490
2491extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
2492
2493extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
2494
2495extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
2496
2497extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
2498
2499extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
2500
2501extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
2502
2503extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
2504
2505extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;
2506
2507extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
2508
2509extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
2510
2511extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
2512
2513extern volatile __bit RXDTSEL @ (((unsigned) &APFCON)*8) + 7;
2514
2515extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
2516
2517extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
2518
2519extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
2520
2521extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
2522
2523extern volatile __bit SCK @ (((unsigned) &PORTA)*8) + 1;
2524
2525extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
2526
2527extern volatile __bit SCL @ (((unsigned) &PORTA)*8) + 1;
2528
2529extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
2530
2531extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
2532
2533extern volatile __bit SDA @ (((unsigned) &PORTA)*8) + 2;
2534
2535extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
2536
2537extern volatile __bit SDI @ (((unsigned) &PORTA)*8) + 2;
2538
2539extern volatile __bit SDO1SEL @ (((unsigned) &APFCON)*8) + 6;
2540
2541extern volatile __bit SDOSEL @ (((unsigned) &APFCON)*8) + 6;
2542
2543extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
2544
2545extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
2546
2547extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
2548
2549extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
2550
2551extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
2552
2553extern volatile __bit SRCLK0 @ (((unsigned) &SRCON0)*8) + 4;
2554
2555extern volatile __bit SRCLK1 @ (((unsigned) &SRCON0)*8) + 5;
2556
2557extern volatile __bit SRCLK2 @ (((unsigned) &SRCON0)*8) + 6;
2558
2559extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
2560
2561extern volatile __bit SRI @ (((unsigned) &PORTA)*8) + 1;
2562
2563extern volatile __bit SRLEN @ (((unsigned) &SRCON0)*8) + 7;
2564
2565extern volatile __bit SRNQ @ (((unsigned) &PORTA)*8) + 5;
2566
2567extern volatile __bit SRNQEN @ (((unsigned) &SRCON0)*8) + 2;
2568
2569extern volatile __bit SRPR @ (((unsigned) &SRCON0)*8) + 0;
2570
2571extern volatile __bit SRPS @ (((unsigned) &SRCON0)*8) + 1;
2572
2573extern volatile __bit SRQ @ (((unsigned) &PORTA)*8) + 2;
2574
2575extern volatile __bit SRQEN @ (((unsigned) &SRCON0)*8) + 3;
2576
2577extern volatile __bit SRRC1E @ (((unsigned) &SRCON1)*8) + 0;
2578
2579extern volatile __bit SRRCKE @ (((unsigned) &SRCON1)*8) + 2;
2580
2581extern volatile __bit SRRPE @ (((unsigned) &SRCON1)*8) + 3;
2582
2583extern volatile __bit SRSC1E @ (((unsigned) &SRCON1)*8) + 4;
2584
2585extern volatile __bit SRSCKE @ (((unsigned) &SRCON1)*8) + 6;
2586
2587extern volatile __bit SRSPE @ (((unsigned) &SRCON1)*8) + 7;
2588
2589extern volatile __bit SS1SEL @ (((unsigned) &APFCON)*8) + 5;
2590
2591extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
2592
2593extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
2594
2595extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
2596
2597extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
2598
2599extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
2600
2601extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
2602
2603extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
2604
2605extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
2606
2607extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 5;
2608
2609extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
2610
2611extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
2612
2613extern volatile __bit STR1A @ (((unsigned) &PSTR1CON)*8) + 0;
2614
2615extern volatile __bit STR1B @ (((unsigned) &PSTR1CON)*8) + 1;
2616
2617extern volatile __bit STR1C @ (((unsigned) &PSTR1CON)*8) + 2;
2618
2619extern volatile __bit STR1D @ (((unsigned) &PSTR1CON)*8) + 3;
2620
2621extern volatile __bit STR1SYNC @ (((unsigned) &PSTR1CON)*8) + 4;
2622
2623extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
2624
2625extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
2626
2627extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 2;
2628
2629extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2630
2631extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
2632
2633extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
2634
2635extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2636
2637extern volatile __bit T0XCS @ (((unsigned) &CPSCON0)*8) + 0;
2638
2639extern volatile __bit T1CKI @ (((unsigned) &PORTA)*8) + 5;
2640
2641extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
2642
2643extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
2644
2645extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
2646
2647extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
2648
2649extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
2650
2651extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
2652
2653extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
2654
2655extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
2656
2657extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
2658
2659extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
2660
2661extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
2662
2663extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
2664
2665extern volatile __bit T1OSCR @ (((unsigned) &OSCSTAT)*8) + 7;
2666
2667extern volatile __bit T1OSI @ (((unsigned) &PORTA)*8) + 5;
2668
2669extern volatile __bit T1OSO @ (((unsigned) &PORTA)*8) + 4;
2670
2671extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
2672
2673extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
2674
2675extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
2676
2677extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
2678
2679extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
2680
2681extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
2682
2683extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2684
2685extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
2686
2687extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
2688
2689extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2690
2691extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
2692
2693extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
2694
2695extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
2696
2697extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
2698
2699extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
2700
2701extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
2702
2703extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
2704
2705extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
2706
2707extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
2708
2709extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
2710
2711extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
2712
2713extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
2714
2715extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
2716
2717extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
2718
2719extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
2720
2721extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
2722
2723extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
2724
2725extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
2726
2727extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
2728
2729extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
2730
2731extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
2732
2733extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
2734
2735extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
2736
2737extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
2738
2739extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
2740
2741extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
2742
2743extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
2744
2745extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
2746
2747extern volatile __bit TXCKSEL @ (((unsigned) &APFCON)*8) + 2;
2748
2749extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
2750
2751extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
2752
2753extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
2754
2755extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
2756
2757extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
2758
2759extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
2760
2761extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
2762
2763extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
2764
2765extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
2766
2767extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
2768
2769extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
2770
2771extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
2772
2773extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
2774
2775extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
2776
2777extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
2778
2779extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
2780
2781extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
2782
2783extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
2784
2785extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
2786
2787extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
2788
2789extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
2790
2791extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
2792
2793extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
2794
2795extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
2796
2797extern volatile __bit nMCLR @ (((unsigned) &PORTA)*8) + 3;
2798
2799extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
2800
2801extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
2802
2803extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
2804
2805extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
2806
2807extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
2808
2809extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
2810
2811extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
2812
2813
2814# 27 "/opt/microchip/xc8/v1.12/include/pic.h"
2815#pragma intrinsic(_nop)
2816extern void _nop(void);
2817
2818# 77
2819extern unsigned int flash_read(unsigned short addr);
2820
2821# 41 "/opt/microchip/xc8/v1.12/include/eeprom_routines.h"
2822extern void eeprom_write(unsigned char addr, unsigned char value);
2823extern unsigned char eeprom_read(unsigned char addr);
2824extern void eecpymem(volatile unsigned char *to, __eeprom unsigned char *from, unsigned char size);
2825extern void memcpyee(__eeprom unsigned char *to, const unsigned char *from, unsigned char size);
2826
2827
2828# 150 "/opt/microchip/xc8/v1.12/include/pic.h"
2829#pragma intrinsic(_delay)
2830extern void _delay(unsigned long);
2831
2832
2833# 37 "configuration_bits.c"
2834#pragma config FOSC = INTOSC
2835#pragma config WDTE = SWDTEN
2836#pragma config PWRTE = OFF
2837#pragma config MCLRE = OFF
2838#pragma config CP = OFF
2839#pragma config CPD = OFF
2840#pragma config BOREN = ON
2841#pragma config CLKOUTEN = OFF
2842#pragma config IESO = OFF
2843#pragma config FCMEN = ON
2844
2845
2846#pragma config WRT = OFF
2847#pragma config PLLEN = ON
2848#pragma config STVREN = ON
2849#pragma config BORV = LO
2850#pragma config LVP = ON
2851
1-Wire to USB Bridge