Fixes to make sure it builds for both chips
[bootloader] / mybootload.X / cpuselect.inc
CommitLineData
6ac84411
JM
1#ifdef __16F1455
2
3#include "p16f1455.inc"
4
5; CONFIG1
6 __config _CONFIG1, 0xFCC
7;; __CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_SWDTEN & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
8; CONFIG2
9 __config _CONFIG2, 0x16CF
10; __CONFIG _CONFIG2, _WRT_OFF & _CPUDIV_NOCLKDIV & _USBLSCLK_48MHz & _PLLMULT_3x & _PLLEN_DISABLED & _STVREN_ON & _BORV_LO & _LPBOR_ON & _LVP_OFF
11
12
13#define max_flash 0x2000
14#define row_size 32
15#define SERIAL_PORT PORTC
16#undefine SERIAL_ANSEL
17#define SERIAL_RXPIN RC5
18#define OSC_4MHZ b'00110100'
19
20#endif
21#ifdef __12F1840
22
23#include "p12f1840.inc"
24#define max_flash 0x1000
25#define row_size 32
26; CONFIG1
27 __config _CONFIG1, 0xFFEC
28; __CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_SWDTEN & _PWRTE_OFF & _MCLRE_ON & _CP_OFF & _CPD_OFF & _BOREN_ON & _CLKOUTEN_OFF & _IESO_ON & _FCMEN_ON
29; CONFIG2
30 __config _CONFIG2, 0xDEFF
31; __CONFIG _CONFIG2, _WRT_OFF & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LVP_OFF
32
33#define SERIAL_PORT PORTA
34#define SERIAL_ANSEL ANSELA
35#define SERIAL_RXPIN RA1
36#define OSC_4MHZ b'01101000'
37
38
39#endif
40
41#ifndef PMADRL
42; register names are different
43#define PMADRL EEADRL
44#define PMADRH EEADRH
45#define PMDATH EEDATH
46#define PMDATL EEDATL
47#define PMCON1 EECON1
48#define PMCON2 EECON2
49#endif