Fixes to make sure it builds for both chips

[bootloader] / mybootload.X / cpuselect.inc

diff --git a/mybootload.X/cpuselect.inc b/mybootload.X/cpuselect.inc
new file mode 100644 (file)
index 0000000..de74cd1
--- /dev/null
+++ b/mybootload.X/cpuselect.inc
@@ -0,0 +1,49 @@
+#ifdef __16F1455
+
+#include "p16f1455.inc"
+
+; CONFIG1
+ __config _CONFIG1, 0xFCC
+;; __CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_SWDTEN & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
+; CONFIG2
+ __config _CONFIG2, 0x16CF
+; __CONFIG _CONFIG2, _WRT_OFF & _CPUDIV_NOCLKDIV & _USBLSCLK_48MHz & _PLLMULT_3x & _PLLEN_DISABLED & _STVREN_ON & _BORV_LO & _LPBOR_ON & _LVP_OFF
+
+
+#define max_flash       0x2000
+#define row_size        32
+#define SERIAL_PORT     PORTC
+#undefine SERIAL_ANSEL
+#define SERIAL_RXPIN    RC5
+#define OSC_4MHZ        b'00110100'
+
+#endif
+#ifdef __12F1840
+
+#include "p12f1840.inc"
+#define max_flash 0x1000
+#define row_size  32
+; CONFIG1
+ __config _CONFIG1, 0xFFEC
+; __CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_SWDTEN & _PWRTE_OFF & _MCLRE_ON & _CP_OFF & _CPD_OFF & _BOREN_ON & _CLKOUTEN_OFF & _IESO_ON & _FCMEN_ON
+; CONFIG2
+ __config _CONFIG2, 0xDEFF
+; __CONFIG _CONFIG2, _WRT_OFF & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LVP_OFF
+
+#define SERIAL_PORT     PORTA
+#define SERIAL_ANSEL    ANSELA
+#define SERIAL_RXPIN    RA1
+#define OSC_4MHZ        b'01101000'
+
+
+#endif
+
+#ifndef PMADRL
+; register names are different
+#define PMADRL          EEADRL
+#define PMADRH          EEADRH
+#define PMDATH          EEDATH
+#define PMDATL          EEDATL
+#define PMCON1          EECON1
+#define PMCON2          EECON2
+#endif
\ No newline at end of file