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Initial import of onewire-to-usb bridge
[onewire] / build / XC8_PIC12F609 / production / configuration_bits.pre
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CommitLineData
1
2# 1 "configuration_bits.c"
3
4# 44 "/opt/microchip/xc8/v1.12/include/pic12f1840.h"
5extern volatile unsigned char INDF0 @ 0x000;
6
7asm("INDF0 equ 00h");
8
9
10typedef union {
11struct {
12unsigned INDF0 :8;
13};
14} INDF0bits_t;
15extern volatile INDF0bits_t INDF0bits @ 0x000;
16
17# 63
18extern volatile unsigned char INDF1 @ 0x001;
19
20asm("INDF1 equ 01h");
21
22
23typedef union {
24struct {
25unsigned INDF1 :8;
26};
27} INDF1bits_t;
28extern volatile INDF1bits_t INDF1bits @ 0x001;
29
30# 82
31extern volatile unsigned char PCL @ 0x002;
32
33asm("PCL equ 02h");
34
35
36typedef union {
37struct {
38unsigned PCL :8;
39};
40} PCLbits_t;
41extern volatile PCLbits_t PCLbits @ 0x002;
42
43# 101
44extern volatile unsigned char STATUS @ 0x003;
45
46asm("STATUS equ 03h");
47
48
49typedef union {
50struct {
51unsigned C :1;
52unsigned DC :1;
53unsigned Z :1;
54unsigned nPD :1;
55unsigned nTO :1;
56};
57struct {
58unsigned CARRY :1;
59};
60struct {
61unsigned :2;
62unsigned ZERO :1;
63};
64} STATUSbits_t;
65extern volatile STATUSbits_t STATUSbits @ 0x003;
66
67# 161
68extern volatile unsigned short FSR0 @ 0x004;
69
70
71extern volatile unsigned char FSR0L @ 0x004;
72
73asm("FSR0L equ 04h");
74
75
76typedef union {
77struct {
78unsigned FSR0L :8;
79};
80} FSR0Lbits_t;
81extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
82
83# 183
84extern volatile unsigned char FSR0H @ 0x005;
85
86asm("FSR0H equ 05h");
87
88
89typedef union {
90struct {
91unsigned FSR0H :8;
92};
93} FSR0Hbits_t;
94extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
95
96# 202
97extern volatile unsigned short FSR1 @ 0x006;
98
99
100extern volatile unsigned char FSR1L @ 0x006;
101
102asm("FSR1L equ 06h");
103
104
105typedef union {
106struct {
107unsigned FSR1L :8;
108};
109} FSR1Lbits_t;
110extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
111
112# 224
113extern volatile unsigned char FSR1H @ 0x007;
114
115asm("FSR1H equ 07h");
116
117
118typedef union {
119struct {
120unsigned FSR1H :8;
121};
122} FSR1Hbits_t;
123extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
124
125# 243
126extern volatile unsigned char BSR @ 0x008;
127
128asm("BSR equ 08h");
129
130
131typedef union {
132struct {
133unsigned BSR0 :1;
134unsigned BSR1 :1;
135unsigned BSR2 :1;
136unsigned BSR3 :1;
137unsigned BSR4 :1;
138};
139struct {
140unsigned BSR :5;
141};
142} BSRbits_t;
143extern volatile BSRbits_t BSRbits @ 0x008;
144
145# 294
146extern volatile unsigned char WREG @ 0x009;
147
148asm("WREG equ 09h");
149
150
151typedef union {
152struct {
153unsigned WREG0 :8;
154};
155} WREGbits_t;
156extern volatile WREGbits_t WREGbits @ 0x009;
157
158# 313
159extern volatile unsigned char PCLATH @ 0x00A;
160
161asm("PCLATH equ 0Ah");
162
163
164typedef union {
165struct {
166unsigned PCLATH :7;
167};
168} PCLATHbits_t;
169extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
170
171# 332
172extern volatile unsigned char INTCON @ 0x00B;
173
174asm("INTCON equ 0Bh");
175
176
177typedef union {
178struct {
179unsigned IOCIF :1;
180unsigned INTF :1;
181unsigned TMR0IF :1;
182unsigned IOCIE :1;
183unsigned INTE :1;
184unsigned TMR0IE :1;
185unsigned PEIE :1;
186unsigned GIE :1;
187};
188struct {
189unsigned :2;
190unsigned T0IF :1;
191unsigned :2;
192unsigned T0IE :1;
193};
194} INTCONbits_t;
195extern volatile INTCONbits_t INTCONbits @ 0x00B;
196
197# 409
198extern volatile unsigned char PORTA @ 0x00C;
199
200asm("PORTA equ 0Ch");
201
202
203typedef union {
204struct {
205unsigned RA0 :1;
206unsigned RA1 :1;
207unsigned RA2 :1;
208unsigned RA3 :1;
209unsigned RA4 :1;
210unsigned RA5 :1;
211};
212} PORTAbits_t;
213extern volatile PORTAbits_t PORTAbits @ 0x00C;
214
215# 458
216extern volatile unsigned char PIR1 @ 0x011;
217
218asm("PIR1 equ 011h");
219
220
221typedef union {
222struct {
223unsigned TMR1IF :1;
224unsigned TMR2IF :1;
225unsigned CCP1IF :1;
226unsigned SSP1IF :1;
227unsigned TXIF :1;
228unsigned RCIF :1;
229unsigned ADIF :1;
230unsigned TMR1GIF :1;
231};
232} PIR1bits_t;
233extern volatile PIR1bits_t PIR1bits @ 0x011;
234
235# 519
236extern volatile unsigned char PIR2 @ 0x012;
237
238asm("PIR2 equ 012h");
239
240
241typedef union {
242struct {
243unsigned :3;
244unsigned BCL1IF :1;
245unsigned EEIF :1;
246unsigned C1IF :1;
247unsigned :1;
248unsigned OSFIF :1;
249};
250} PIR2bits_t;
251extern volatile PIR2bits_t PIR2bits @ 0x012;
252
253# 558
254extern volatile unsigned char TMR0 @ 0x015;
255
256asm("TMR0 equ 015h");
257
258
259typedef union {
260struct {
261unsigned TMR0 :8;
262};
263} TMR0bits_t;
264extern volatile TMR0bits_t TMR0bits @ 0x015;
265
266# 577
267extern volatile unsigned short TMR1 @ 0x016;
268
269asm("TMR1 equ 016h");
270
271
272
273extern volatile unsigned char TMR1L @ 0x016;
274
275asm("TMR1L equ 016h");
276
277
278typedef union {
279struct {
280unsigned TMR1L :8;
281};
282} TMR1Lbits_t;
283extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
284
285# 602
286extern volatile unsigned char TMR1H @ 0x017;
287
288asm("TMR1H equ 017h");
289
290
291typedef union {
292struct {
293unsigned TMR1H :8;
294};
295} TMR1Hbits_t;
296extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
297
298# 621
299extern volatile unsigned char T1CON @ 0x018;
300
301asm("T1CON equ 018h");
302
303
304typedef union {
305struct {
306unsigned TMR1ON :1;
307unsigned :1;
308unsigned nT1SYNC :1;
309unsigned T1OSCEN :1;
310unsigned T1CKPS0 :1;
311unsigned T1CKPS1 :1;
312unsigned TMR1CS0 :1;
313unsigned TMR1CS1 :1;
314};
315struct {
316unsigned :4;
317unsigned T1CKPS :2;
318unsigned TMR1CS :2;
319};
320} T1CONbits_t;
321extern volatile T1CONbits_t T1CONbits @ 0x018;
322
323# 692
324extern volatile unsigned char T1GCON @ 0x019;
325
326asm("T1GCON equ 019h");
327
328
329typedef union {
330struct {
331unsigned T1GSS0 :1;
332unsigned T1GSS1 :1;
333unsigned T1GVAL :1;
334unsigned T1GGO_nDONE :1;
335unsigned T1GSPM :1;
336unsigned T1GTM :1;
337unsigned T1GPOL :1;
338unsigned TMR1GE :1;
339};
340struct {
341unsigned T1GSS :2;
342unsigned :1;
343unsigned T1GGO :1;
344};
345} T1GCONbits_t;
346extern volatile T1GCONbits_t T1GCONbits @ 0x019;
347
348# 768
349extern volatile unsigned char TMR2 @ 0x01A;
350
351asm("TMR2 equ 01Ah");
352
353
354typedef union {
355struct {
356unsigned TMR2 :8;
357};
358} TMR2bits_t;
359extern volatile TMR2bits_t TMR2bits @ 0x01A;
360
361# 787
362extern volatile unsigned char PR2 @ 0x01B;
363
364asm("PR2 equ 01Bh");
365
366
367typedef union {
368struct {
369unsigned PR2 :8;
370};
371} PR2bits_t;
372extern volatile PR2bits_t PR2bits @ 0x01B;
373
374# 806
375extern volatile unsigned char T2CON @ 0x01C;
376
377asm("T2CON equ 01Ch");
378
379
380typedef union {
381struct {
382unsigned T2CKPS0 :1;
383unsigned T2CKPS1 :1;
384unsigned TMR2ON :1;
385unsigned T2OUTPS0 :1;
386unsigned T2OUTPS1 :1;
387unsigned T2OUTPS2 :1;
388unsigned T2OUTPS3 :1;
389};
390struct {
391unsigned T2CKPS :2;
392unsigned :1;
393unsigned T2OUTPS :4;
394};
395} T2CONbits_t;
396extern volatile T2CONbits_t T2CONbits @ 0x01C;
397
398# 876
399extern volatile unsigned char CPSCON0 @ 0x01E;
400
401asm("CPSCON0 equ 01Eh");
402
403
404typedef union {
405struct {
406unsigned T0XCS :1;
407unsigned CPSOUT :1;
408unsigned CPSRNG0 :1;
409unsigned CPSRNG1 :1;
410unsigned :2;
411unsigned CPSRM :1;
412unsigned CPSON :1;
413};
414struct {
415unsigned :2;
416unsigned CPSRNG :2;
417};
418} CPSCON0bits_t;
419extern volatile CPSCON0bits_t CPSCON0bits @ 0x01E;
420
421# 935
422extern volatile unsigned char CPSCON1 @ 0x01F;
423
424asm("CPSCON1 equ 01Fh");
425
426
427typedef union {
428struct {
429unsigned CPSCH0 :1;
430unsigned CPSCH1 :1;
431};
432struct {
433unsigned CPSCH :2;
434};
435} CPSCON1bits_t;
436extern volatile CPSCON1bits_t CPSCON1bits @ 0x01F;
437
438# 968
439extern volatile unsigned char TRISA @ 0x08C;
440
441asm("TRISA equ 08Ch");
442
443
444typedef union {
445struct {
446unsigned TRISA0 :1;
447unsigned TRISA1 :1;
448unsigned TRISA2 :1;
449unsigned TRISA3 :1;
450unsigned TRISA4 :1;
451unsigned TRISA5 :1;
452};
453} TRISAbits_t;
454extern volatile TRISAbits_t TRISAbits @ 0x08C;
455
456# 1017
457extern volatile unsigned char PIE1 @ 0x091;
458
459asm("PIE1 equ 091h");
460
461
462typedef union {
463struct {
464unsigned TMR1IE :1;
465unsigned TMR2IE :1;
466unsigned CCP1IE :1;
467unsigned SSP1IE :1;
468unsigned TXIE :1;
469unsigned RCIE :1;
470unsigned ADIE :1;
471unsigned TMR1GIE :1;
472};
473} PIE1bits_t;
474extern volatile PIE1bits_t PIE1bits @ 0x091;
475
476# 1078
477extern volatile unsigned char PIE2 @ 0x092;
478
479asm("PIE2 equ 092h");
480
481
482typedef union {
483struct {
484unsigned :3;
485unsigned BCL1IE :1;
486unsigned EEIE :1;
487unsigned C1IE :1;
488unsigned :1;
489unsigned OSFIE :1;
490};
491} PIE2bits_t;
492extern volatile PIE2bits_t PIE2bits @ 0x092;
493
494# 1117
495extern volatile unsigned char OPTION_REG @ 0x095;
496
497asm("OPTION_REG equ 095h");
498
499
500typedef union {
501struct {
502unsigned PS0 :1;
503unsigned PS1 :1;
504unsigned PS2 :1;
505unsigned PSA :1;
506unsigned TMR0SE :1;
507unsigned TMR0CS :1;
508unsigned INTEDG :1;
509unsigned nWPUEN :1;
510};
511struct {
512unsigned PS :3;
513unsigned :1;
514unsigned T0SE :1;
515unsigned T0CS :1;
516};
517} OPTION_REGbits_t;
518extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
519
520# 1199
521extern volatile unsigned char PCON @ 0x096;
522
523asm("PCON equ 096h");
524
525
526typedef union {
527struct {
528unsigned nBOR :1;
529unsigned nPOR :1;
530unsigned nRI :1;
531unsigned nRMCLR :1;
532unsigned :2;
533unsigned STKUNF :1;
534unsigned STKOVF :1;
535};
536} PCONbits_t;
537extern volatile PCONbits_t PCONbits @ 0x096;
538
539# 1249
540extern volatile unsigned char WDTCON @ 0x097;
541
542asm("WDTCON equ 097h");
543
544
545typedef union {
546struct {
547unsigned SWDTEN :1;
548unsigned WDTPS0 :1;
549unsigned WDTPS1 :1;
550unsigned WDTPS2 :1;
551unsigned WDTPS3 :1;
552unsigned WDTPS4 :1;
553};
554struct {
555unsigned :1;
556unsigned WDTPS :5;
557};
558} WDTCONbits_t;
559extern volatile WDTCONbits_t WDTCONbits @ 0x097;
560
561# 1307
562extern volatile unsigned char OSCTUNE @ 0x098;
563
564asm("OSCTUNE equ 098h");
565
566
567typedef union {
568struct {
569unsigned TUN0 :1;
570unsigned TUN1 :1;
571unsigned TUN2 :1;
572unsigned TUN3 :1;
573unsigned TUN4 :1;
574unsigned TUN5 :1;
575};
576struct {
577unsigned TUN :6;
578};
579} OSCTUNEbits_t;
580extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
581
582# 1364
583extern volatile unsigned char OSCCON @ 0x099;
584
585asm("OSCCON equ 099h");
586
587
588typedef union {
589struct {
590unsigned SCS0 :1;
591unsigned SCS1 :1;
592unsigned :1;
593unsigned IRCF0 :1;
594unsigned IRCF1 :1;
595unsigned IRCF2 :1;
596unsigned IRCF3 :1;
597unsigned SPLLEN :1;
598};
599struct {
600unsigned SCS :2;
601unsigned :1;
602unsigned IRCF :4;
603};
604} OSCCONbits_t;
605extern volatile OSCCONbits_t OSCCONbits @ 0x099;
606
607# 1435
608extern volatile unsigned char OSCSTAT @ 0x09A;
609
610asm("OSCSTAT equ 09Ah");
611
612
613typedef union {
614struct {
615unsigned HFIOFS :1;
616unsigned LFIOFR :1;
617unsigned MFIOFR :1;
618unsigned HFIOFL :1;
619unsigned HFIOFR :1;
620unsigned OSTS :1;
621unsigned PLLR :1;
622unsigned T1OSCR :1;
623};
624} OSCSTATbits_t;
625extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
626
627# 1496
628extern volatile unsigned short ADRES @ 0x09B;
629
630asm("ADRES equ 09Bh");
631
632
633
634extern volatile unsigned char ADRESL @ 0x09B;
635
636asm("ADRESL equ 09Bh");
637
638
639typedef union {
640struct {
641unsigned ADRESL :8;
642};
643} ADRESLbits_t;
644extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
645
646# 1521
647extern volatile unsigned char ADRESH @ 0x09C;
648
649asm("ADRESH equ 09Ch");
650
651
652typedef union {
653struct {
654unsigned ADRESH :8;
655};
656} ADRESHbits_t;
657extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
658
659# 1540
660extern volatile unsigned char ADCON0 @ 0x09D;
661
662asm("ADCON0 equ 09Dh");
663
664
665typedef union {
666struct {
667unsigned ADON :1;
668unsigned GO_nDONE :1;
669unsigned CHS0 :1;
670unsigned CHS1 :1;
671unsigned CHS2 :1;
672unsigned CHS3 :1;
673unsigned CHS4 :1;
674};
675struct {
676unsigned :1;
677unsigned ADGO :1;
678unsigned CHS :5;
679};
680struct {
681unsigned :1;
682unsigned GO :1;
683};
684} ADCON0bits_t;
685extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
686
687# 1619
688extern volatile unsigned char ADCON1 @ 0x09E;
689
690asm("ADCON1 equ 09Eh");
691
692
693typedef union {
694struct {
695unsigned ADPREF0 :1;
696unsigned ADPREF1 :1;
697unsigned :2;
698unsigned ADCS0 :1;
699unsigned ADCS1 :1;
700unsigned ADCS2 :1;
701unsigned ADFM :1;
702};
703struct {
704unsigned ADPREF :2;
705unsigned :2;
706unsigned ADCS :3;
707};
708} ADCON1bits_t;
709extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
710
711# 1684
712extern volatile unsigned char LATA @ 0x10C;
713
714asm("LATA equ 010Ch");
715
716
717typedef union {
718struct {
719unsigned LATA0 :1;
720unsigned LATA1 :1;
721unsigned LATA2 :1;
722unsigned :1;
723unsigned LATA4 :1;
724unsigned LATA5 :1;
725};
726} LATAbits_t;
727extern volatile LATAbits_t LATAbits @ 0x10C;
728
729# 1728
730extern volatile unsigned char CM1CON0 @ 0x111;
731
732asm("CM1CON0 equ 0111h");
733
734
735typedef union {
736struct {
737unsigned C1SYNC :1;
738unsigned C1HYS :1;
739unsigned C1SP :1;
740unsigned :1;
741unsigned C1POL :1;
742unsigned C1OE :1;
743unsigned C1OUT :1;
744unsigned C1ON :1;
745};
746} CM1CON0bits_t;
747extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
748
749# 1784
750extern volatile unsigned char CM1CON1 @ 0x112;
751
752asm("CM1CON1 equ 0112h");
753
754
755typedef union {
756struct {
757unsigned C1NCH :1;
758unsigned :3;
759unsigned C1PCH0 :1;
760unsigned C1PCH1 :1;
761unsigned C1INTN :1;
762unsigned C1INTP :1;
763};
764struct {
765unsigned C1NCH0 :1;
766unsigned :3;
767unsigned C1PCH :2;
768};
769} CM1CON1bits_t;
770extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
771
772# 1843
773extern volatile unsigned char CMOUT @ 0x115;
774
775asm("CMOUT equ 0115h");
776
777
778typedef union {
779struct {
780unsigned MC1OUT :1;
781};
782} CMOUTbits_t;
783extern volatile CMOUTbits_t CMOUTbits @ 0x115;
784
785# 1862
786extern volatile unsigned char BORCON @ 0x116;
787
788asm("BORCON equ 0116h");
789
790
791typedef union {
792struct {
793unsigned BORRDY :1;
794unsigned :5;
795unsigned BORFS :1;
796unsigned SBOREN :1;
797};
798} BORCONbits_t;
799extern volatile BORCONbits_t BORCONbits @ 0x116;
800
801# 1894
802extern volatile unsigned char FVRCON @ 0x117;
803
804asm("FVRCON equ 0117h");
805
806
807typedef union {
808struct {
809unsigned ADFVR0 :1;
810unsigned ADFVR1 :1;
811unsigned CDAFVR0 :1;
812unsigned CDAFVR1 :1;
813unsigned TSRNG :1;
814unsigned TSEN :1;
815unsigned FVRRDY :1;
816unsigned FVREN :1;
817};
818struct {
819unsigned ADFVR :2;
820unsigned CDAFVR :2;
821};
822} FVRCONbits_t;
823extern volatile FVRCONbits_t FVRCONbits @ 0x117;
824
825# 1969
826extern volatile unsigned char DACCON0 @ 0x118;
827
828asm("DACCON0 equ 0118h");
829
830
831typedef union {
832struct {
833unsigned :2;
834unsigned DACPSS0 :1;
835unsigned DACPSS1 :1;
836unsigned :1;
837unsigned DACOE :1;
838unsigned DACLPS :1;
839unsigned DACEN :1;
840};
841struct {
842unsigned :2;
843unsigned DACPSS :2;
844};
845} DACCON0bits_t;
846extern volatile DACCON0bits_t DACCON0bits @ 0x118;
847
848# 2023
849extern volatile unsigned char DACCON1 @ 0x119;
850
851asm("DACCON1 equ 0119h");
852
853
854typedef union {
855struct {
856unsigned DACR0 :1;
857unsigned DACR1 :1;
858unsigned DACR2 :1;
859unsigned DACR3 :1;
860unsigned DACR4 :1;
861};
862struct {
863unsigned DACR :5;
864};
865} DACCON1bits_t;
866extern volatile DACCON1bits_t DACCON1bits @ 0x119;
867
868# 2074
869extern volatile unsigned char SRCON0 @ 0x11A;
870
871asm("SRCON0 equ 011Ah");
872
873
874typedef union {
875struct {
876unsigned SRPR :1;
877unsigned SRPS :1;
878unsigned SRNQEN :1;
879unsigned SRQEN :1;
880unsigned SRCLK0 :1;
881unsigned SRCLK1 :1;
882unsigned SRCLK2 :1;
883unsigned SRLEN :1;
884};
885struct {
886unsigned :4;
887unsigned SRCLK :3;
888};
889} SRCON0bits_t;
890extern volatile SRCON0bits_t SRCON0bits @ 0x11A;
891
892# 2144
893extern volatile unsigned char SRCON1 @ 0x11B;
894
895asm("SRCON1 equ 011Bh");
896
897
898typedef union {
899struct {
900unsigned SRRC1E :1;
901unsigned :1;
902unsigned SRRCKE :1;
903unsigned SRRPE :1;
904unsigned SRSC1E :1;
905unsigned :1;
906unsigned SRSCKE :1;
907unsigned SRSPE :1;
908};
909} SRCON1bits_t;
910extern volatile SRCON1bits_t SRCON1bits @ 0x11B;
911
912# 2195
913extern volatile unsigned char APFCON @ 0x11D;
914
915asm("APFCON equ 011Dh");
916
917
918extern volatile unsigned char APFCON0 @ 0x11D;
919
920asm("APFCON0 equ 011Dh");
921
922
923typedef union {
924struct {
925unsigned CCP1SEL :1;
926unsigned P1BSEL :1;
927unsigned TXCKSEL :1;
928unsigned T1GSEL :1;
929unsigned :1;
930unsigned SSSEL :1;
931unsigned SDOSEL :1;
932unsigned RXDTSEL :1;
933};
934struct {
935unsigned :5;
936unsigned SS1SEL :1;
937unsigned SDO1SEL :1;
938};
939} APFCONbits_t;
940extern volatile APFCONbits_t APFCONbits @ 0x11D;
941
942# 2270
943typedef union {
944struct {
945unsigned CCP1SEL :1;
946unsigned P1BSEL :1;
947unsigned TXCKSEL :1;
948unsigned T1GSEL :1;
949unsigned :1;
950unsigned SSSEL :1;
951unsigned SDOSEL :1;
952unsigned RXDTSEL :1;
953};
954struct {
955unsigned :5;
956unsigned SS1SEL :1;
957unsigned SDO1SEL :1;
958};
959} APFCON0bits_t;
960extern volatile APFCON0bits_t APFCON0bits @ 0x11D;
961
962# 2336
963extern volatile unsigned char ANSELA @ 0x18C;
964
965asm("ANSELA equ 018Ch");
966
967
968typedef union {
969struct {
970unsigned ANSA0 :1;
971unsigned ANSA1 :1;
972unsigned ANSA2 :1;
973unsigned :1;
974unsigned ANSA4 :1;
975};
976struct {
977unsigned ANSELA :5;
978};
979} ANSELAbits_t;
980extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
981
982# 2382
983extern volatile unsigned short EEADR @ 0x191;
984
985asm("EEADR equ 0191h");
986
987
988
989extern volatile unsigned char EEADRL @ 0x191;
990
991asm("EEADRL equ 0191h");
992
993
994typedef union {
995struct {
996unsigned EEADRL :8;
997};
998} EEADRLbits_t;
999extern volatile EEADRLbits_t EEADRLbits @ 0x191;
1000
1001# 2407
1002extern volatile unsigned char EEADRH @ 0x192;
1003
1004asm("EEADRH equ 0192h");
1005
1006
1007typedef union {
1008struct {
1009unsigned EEADRH :7;
1010};
1011} EEADRHbits_t;
1012extern volatile EEADRHbits_t EEADRHbits @ 0x192;
1013
1014# 2426
1015extern volatile unsigned short EEDAT @ 0x193;
1016
1017asm("EEDAT equ 0193h");
1018
1019
1020
1021extern volatile unsigned char EEDATL @ 0x193;
1022
1023asm("EEDATL equ 0193h");
1024
1025
1026extern volatile unsigned char EEDATA @ 0x193;
1027
1028asm("EEDATA equ 0193h");
1029
1030
1031typedef union {
1032struct {
1033unsigned EEDATL :8;
1034};
1035} EEDATLbits_t;
1036extern volatile EEDATLbits_t EEDATLbits @ 0x193;
1037
1038# 2455
1039typedef union {
1040struct {
1041unsigned EEDATL :8;
1042};
1043} EEDATAbits_t;
1044extern volatile EEDATAbits_t EEDATAbits @ 0x193;
1045
1046# 2469
1047extern volatile unsigned char EEDATH @ 0x194;
1048
1049asm("EEDATH equ 0194h");
1050
1051
1052typedef union {
1053struct {
1054unsigned EEDATH :6;
1055};
1056} EEDATHbits_t;
1057extern volatile EEDATHbits_t EEDATHbits @ 0x194;
1058
1059# 2488
1060extern volatile unsigned char EECON1 @ 0x195;
1061
1062asm("EECON1 equ 0195h");
1063
1064
1065typedef union {
1066struct {
1067unsigned RD :1;
1068unsigned WR :1;
1069unsigned WREN :1;
1070unsigned WRERR :1;
1071unsigned FREE :1;
1072unsigned LWLO :1;
1073unsigned CFGS :1;
1074unsigned EEPGD :1;
1075};
1076} EECON1bits_t;
1077extern volatile EECON1bits_t EECON1bits @ 0x195;
1078
1079# 2549
1080extern volatile unsigned char EECON2 @ 0x196;
1081
1082asm("EECON2 equ 0196h");
1083
1084
1085typedef union {
1086struct {
1087unsigned EECON2 :8;
1088};
1089} EECON2bits_t;
1090extern volatile EECON2bits_t EECON2bits @ 0x196;
1091
1092# 2568
1093extern volatile unsigned char VREGCON @ 0x197;
1094
1095asm("VREGCON equ 0197h");
1096
1097
1098typedef union {
1099struct {
1100unsigned VREGPM0 :1;
1101unsigned VREGPM1 :1;
1102};
1103struct {
1104unsigned VREGPM :2;
1105};
1106} VREGCONbits_t;
1107extern volatile VREGCONbits_t VREGCONbits @ 0x197;
1108
1109# 2601
1110extern volatile unsigned char RCREG @ 0x199;
1111
1112asm("RCREG equ 0199h");
1113
1114
1115typedef union {
1116struct {
1117unsigned RCREG :8;
1118};
1119} RCREGbits_t;
1120extern volatile RCREGbits_t RCREGbits @ 0x199;
1121
1122# 2620
1123extern volatile unsigned char TXREG @ 0x19A;
1124
1125asm("TXREG equ 019Ah");
1126
1127
1128typedef union {
1129struct {
1130unsigned TXREG :8;
1131};
1132} TXREGbits_t;
1133extern volatile TXREGbits_t TXREGbits @ 0x19A;
1134
1135# 2639
1136extern volatile unsigned char SPBRGL @ 0x19B;
1137
1138asm("SPBRGL equ 019Bh");
1139
1140
1141extern volatile unsigned char SPBRG @ 0x19B;
1142
1143asm("SPBRG equ 019Bh");
1144
1145
1146typedef union {
1147struct {
1148unsigned SPBRGL :8;
1149};
1150} SPBRGLbits_t;
1151extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
1152
1153# 2662
1154typedef union {
1155struct {
1156unsigned SPBRGL :8;
1157};
1158} SPBRGbits_t;
1159extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
1160
1161# 2676
1162extern volatile unsigned char SPBRGH @ 0x19C;
1163
1164asm("SPBRGH equ 019Ch");
1165
1166
1167typedef union {
1168struct {
1169unsigned SPBRGH :8;
1170};
1171} SPBRGHbits_t;
1172extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
1173
1174# 2695
1175extern volatile unsigned char RCSTA @ 0x19D;
1176
1177asm("RCSTA equ 019Dh");
1178
1179
1180typedef union {
1181struct {
1182unsigned RX9D :1;
1183unsigned OERR :1;
1184unsigned FERR :1;
1185unsigned ADDEN :1;
1186unsigned CREN :1;
1187unsigned SREN :1;
1188unsigned RX9 :1;
1189unsigned SPEN :1;
1190};
1191} RCSTAbits_t;
1192extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
1193
1194# 2756
1195extern volatile unsigned char TXSTA @ 0x19E;
1196
1197asm("TXSTA equ 019Eh");
1198
1199
1200typedef union {
1201struct {
1202unsigned TX9D :1;
1203unsigned TRMT :1;
1204unsigned BRGH :1;
1205unsigned SENDB :1;
1206unsigned SYNC :1;
1207unsigned TXEN :1;
1208unsigned TX9 :1;
1209unsigned CSRC :1;
1210};
1211} TXSTAbits_t;
1212extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
1213
1214# 2817
1215extern volatile unsigned char BAUDCON @ 0x19F;
1216
1217asm("BAUDCON equ 019Fh");
1218
1219
1220typedef union {
1221struct {
1222unsigned ABDEN :1;
1223unsigned WUE :1;
1224unsigned :1;
1225unsigned BRG16 :1;
1226unsigned SCKP :1;
1227unsigned :1;
1228unsigned RCIDL :1;
1229unsigned ABDOVF :1;
1230};
1231} BAUDCONbits_t;
1232extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
1233
1234# 2868
1235extern volatile unsigned char WPUA @ 0x20C;
1236
1237asm("WPUA equ 020Ch");
1238
1239
1240typedef union {
1241struct {
1242unsigned WPUA0 :1;
1243unsigned WPUA1 :1;
1244unsigned WPUA2 :1;
1245unsigned WPUA3 :1;
1246unsigned WPUA4 :1;
1247unsigned WPUA5 :1;
1248};
1249struct {
1250unsigned WPUA :6;
1251};
1252} WPUAbits_t;
1253extern volatile WPUAbits_t WPUAbits @ 0x20C;
1254
1255# 2925
1256extern volatile unsigned char SSP1BUF @ 0x211;
1257
1258asm("SSP1BUF equ 0211h");
1259
1260
1261extern volatile unsigned char SSPBUF @ 0x211;
1262
1263asm("SSPBUF equ 0211h");
1264
1265
1266typedef union {
1267struct {
1268unsigned SSPBUF :8;
1269};
1270} SSP1BUFbits_t;
1271extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
1272
1273# 2948
1274typedef union {
1275struct {
1276unsigned SSPBUF :8;
1277};
1278} SSPBUFbits_t;
1279extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
1280
1281# 2962
1282extern volatile unsigned char SSP1ADD @ 0x212;
1283
1284asm("SSP1ADD equ 0212h");
1285
1286
1287extern volatile unsigned char SSPADD @ 0x212;
1288
1289asm("SSPADD equ 0212h");
1290
1291
1292typedef union {
1293struct {
1294unsigned SSPADD :8;
1295};
1296} SSP1ADDbits_t;
1297extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
1298
1299# 2985
1300typedef union {
1301struct {
1302unsigned SSPADD :8;
1303};
1304} SSPADDbits_t;
1305extern volatile SSPADDbits_t SSPADDbits @ 0x212;
1306
1307# 2999
1308extern volatile unsigned char SSP1MSK @ 0x213;
1309
1310asm("SSP1MSK equ 0213h");
1311
1312
1313extern volatile unsigned char SSPMSK @ 0x213;
1314
1315asm("SSPMSK equ 0213h");
1316
1317
1318typedef union {
1319struct {
1320unsigned SSPMSK :8;
1321};
1322} SSP1MSKbits_t;
1323extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
1324
1325# 3022
1326typedef union {
1327struct {
1328unsigned SSPMSK :8;
1329};
1330} SSPMSKbits_t;
1331extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
1332
1333# 3036
1334extern volatile unsigned char SSP1STAT @ 0x214;
1335
1336asm("SSP1STAT equ 0214h");
1337
1338
1339extern volatile unsigned char SSPSTAT @ 0x214;
1340
1341asm("SSPSTAT equ 0214h");
1342
1343
1344typedef union {
1345struct {
1346unsigned BF :1;
1347unsigned UA :1;
1348unsigned R_nW :1;
1349unsigned S :1;
1350unsigned P :1;
1351unsigned D_nA :1;
1352unsigned CKE :1;
1353unsigned SMP :1;
1354};
1355} SSP1STATbits_t;
1356extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
1357
1358# 3101
1359typedef union {
1360struct {
1361unsigned BF :1;
1362unsigned UA :1;
1363unsigned R_nW :1;
1364unsigned S :1;
1365unsigned P :1;
1366unsigned D_nA :1;
1367unsigned CKE :1;
1368unsigned SMP :1;
1369};
1370} SSPSTATbits_t;
1371extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
1372
1373# 3157
1374extern volatile unsigned char SSP1CON1 @ 0x215;
1375
1376asm("SSP1CON1 equ 0215h");
1377
1378
1379extern volatile unsigned char SSPCON1 @ 0x215;
1380
1381asm("SSPCON1 equ 0215h");
1382
1383extern volatile unsigned char SSPCON @ 0x215;
1384
1385asm("SSPCON equ 0215h");
1386
1387
1388typedef union {
1389struct {
1390unsigned SSPM0 :1;
1391unsigned SSPM1 :1;
1392unsigned SSPM2 :1;
1393unsigned SSPM3 :1;
1394unsigned CKP :1;
1395unsigned SSPEN :1;
1396unsigned SSPOV :1;
1397unsigned WCOL :1;
1398};
1399struct {
1400unsigned SSPM :4;
1401};
1402} SSP1CON1bits_t;
1403extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
1404
1405# 3234
1406typedef union {
1407struct {
1408unsigned SSPM0 :1;
1409unsigned SSPM1 :1;
1410unsigned SSPM2 :1;
1411unsigned SSPM3 :1;
1412unsigned CKP :1;
1413unsigned SSPEN :1;
1414unsigned SSPOV :1;
1415unsigned WCOL :1;
1416};
1417struct {
1418unsigned SSPM :4;
1419};
1420} SSPCON1bits_t;
1421extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
1422
1423# 3296
1424typedef union {
1425struct {
1426unsigned SSPM0 :1;
1427unsigned SSPM1 :1;
1428unsigned SSPM2 :1;
1429unsigned SSPM3 :1;
1430unsigned CKP :1;
1431unsigned SSPEN :1;
1432unsigned SSPOV :1;
1433unsigned WCOL :1;
1434};
1435struct {
1436unsigned SSPM :4;
1437};
1438} SSPCONbits_t;
1439extern volatile SSPCONbits_t SSPCONbits @ 0x215;
1440
1441# 3360
1442extern volatile unsigned char SSP1CON2 @ 0x216;
1443
1444asm("SSP1CON2 equ 0216h");
1445
1446
1447extern volatile unsigned char SSPCON2 @ 0x216;
1448
1449asm("SSPCON2 equ 0216h");
1450
1451
1452typedef union {
1453struct {
1454unsigned SEN :1;
1455unsigned RSEN :1;
1456unsigned PEN :1;
1457unsigned RCEN :1;
1458unsigned ACKEN :1;
1459unsigned ACKDT :1;
1460unsigned ACKSTAT :1;
1461unsigned GCEN :1;
1462};
1463} SSP1CON2bits_t;
1464extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
1465
1466# 3425
1467typedef union {
1468struct {
1469unsigned SEN :1;
1470unsigned RSEN :1;
1471unsigned PEN :1;
1472unsigned RCEN :1;
1473unsigned ACKEN :1;
1474unsigned ACKDT :1;
1475unsigned ACKSTAT :1;
1476unsigned GCEN :1;
1477};
1478} SSPCON2bits_t;
1479extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
1480
1481# 3481
1482extern volatile unsigned char SSP1CON3 @ 0x217;
1483
1484asm("SSP1CON3 equ 0217h");
1485
1486
1487extern volatile unsigned char SSPCON3 @ 0x217;
1488
1489asm("SSPCON3 equ 0217h");
1490
1491
1492typedef union {
1493struct {
1494unsigned DHEN :1;
1495unsigned AHEN :1;
1496unsigned SBCDE :1;
1497unsigned SDAHT :1;
1498unsigned BOEN :1;
1499unsigned SCIE :1;
1500unsigned PCIE :1;
1501unsigned ACKTIM :1;
1502};
1503} SSP1CON3bits_t;
1504extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
1505
1506# 3546
1507typedef union {
1508struct {
1509unsigned DHEN :1;
1510unsigned AHEN :1;
1511unsigned SBCDE :1;
1512unsigned SDAHT :1;
1513unsigned BOEN :1;
1514unsigned SCIE :1;
1515unsigned PCIE :1;
1516unsigned ACKTIM :1;
1517};
1518} SSPCON3bits_t;
1519extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
1520
1521# 3602
1522extern volatile unsigned char CCPR1L @ 0x291;
1523
1524asm("CCPR1L equ 0291h");
1525
1526
1527typedef union {
1528struct {
1529unsigned CCPR1L :8;
1530};
1531} CCPR1Lbits_t;
1532extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
1533
1534# 3621
1535extern volatile unsigned char CCPR1H @ 0x292;
1536
1537asm("CCPR1H equ 0292h");
1538
1539
1540typedef union {
1541struct {
1542unsigned CCPR1H :8;
1543};
1544} CCPR1Hbits_t;
1545extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
1546
1547# 3640
1548extern volatile unsigned char CCP1CON @ 0x293;
1549
1550asm("CCP1CON equ 0293h");
1551
1552
1553typedef union {
1554struct {
1555unsigned CCP1M0 :1;
1556unsigned CCP1M1 :1;
1557unsigned CCP1M2 :1;
1558unsigned CCP1M3 :1;
1559unsigned DC1B0 :1;
1560unsigned DC1B1 :1;
1561unsigned P1M0 :1;
1562unsigned P1M1 :1;
1563};
1564struct {
1565unsigned CCP1M :4;
1566unsigned DC1B :2;
1567unsigned P1M :2;
1568};
1569} CCP1CONbits_t;
1570extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
1571
1572# 3721
1573extern volatile unsigned char PWM1CON @ 0x294;
1574
1575asm("PWM1CON equ 0294h");
1576
1577
1578typedef union {
1579struct {
1580unsigned P1DC0 :1;
1581unsigned P1DC1 :1;
1582unsigned P1DC2 :1;
1583unsigned P1DC3 :1;
1584unsigned P1DC4 :1;
1585unsigned P1DC5 :1;
1586unsigned P1DC6 :1;
1587unsigned P1RSEN :1;
1588};
1589struct {
1590unsigned P1DC :7;
1591};
1592} PWM1CONbits_t;
1593extern volatile PWM1CONbits_t PWM1CONbits @ 0x294;
1594
1595# 3790
1596extern volatile unsigned char CCP1AS @ 0x295;
1597
1598asm("CCP1AS equ 0295h");
1599
1600
1601extern volatile unsigned char ECCP1AS @ 0x295;
1602
1603asm("ECCP1AS equ 0295h");
1604
1605
1606typedef union {
1607struct {
1608unsigned PSS1BD0 :1;
1609unsigned PSS1BD1 :1;
1610unsigned PSS1AC0 :1;
1611unsigned PSS1AC1 :1;
1612unsigned CCP1AS0 :1;
1613unsigned CCP1AS1 :1;
1614unsigned CCP1AS2 :1;
1615unsigned CCP1ASE :1;
1616};
1617struct {
1618unsigned PSS1BD :2;
1619unsigned PSS1AC :2;
1620unsigned CCP1AS :3;
1621};
1622} CCP1ASbits_t;
1623extern volatile CCP1ASbits_t CCP1ASbits @ 0x295;
1624
1625# 3875
1626typedef union {
1627struct {
1628unsigned PSS1BD0 :1;
1629unsigned PSS1BD1 :1;
1630unsigned PSS1AC0 :1;
1631unsigned PSS1AC1 :1;
1632unsigned CCP1AS0 :1;
1633unsigned CCP1AS1 :1;
1634unsigned CCP1AS2 :1;
1635unsigned CCP1ASE :1;
1636};
1637struct {
1638unsigned PSS1BD :2;
1639unsigned PSS1AC :2;
1640unsigned CCP1AS :3;
1641};
1642} ECCP1ASbits_t;
1643extern volatile ECCP1ASbits_t ECCP1ASbits @ 0x295;
1644
1645# 3951
1646extern volatile unsigned char PSTR1CON @ 0x296;
1647
1648asm("PSTR1CON equ 0296h");
1649
1650
1651typedef union {
1652struct {
1653unsigned STR1A :1;
1654unsigned STR1B :1;
1655unsigned :1;
1656unsigned :1;
1657unsigned STR1SYNC :1;
1658};
1659} PSTR1CONbits_t;
1660extern volatile PSTR1CONbits_t PSTR1CONbits @ 0x296;
1661
1662# 3984
1663extern volatile unsigned char IOCAP @ 0x391;
1664
1665asm("IOCAP equ 0391h");
1666
1667
1668typedef union {
1669struct {
1670unsigned IOCAP0 :1;
1671unsigned IOCAP1 :1;
1672unsigned IOCAP2 :1;
1673unsigned IOCAP3 :1;
1674unsigned IOCAP4 :1;
1675unsigned IOCAP5 :1;
1676};
1677struct {
1678unsigned IOCAP :6;
1679};
1680} IOCAPbits_t;
1681extern volatile IOCAPbits_t IOCAPbits @ 0x391;
1682
1683# 4041
1684extern volatile unsigned char IOCAN @ 0x392;
1685
1686asm("IOCAN equ 0392h");
1687
1688
1689typedef union {
1690struct {
1691unsigned IOCAN0 :1;
1692unsigned IOCAN1 :1;
1693unsigned IOCAN2 :1;
1694unsigned IOCAN3 :1;
1695unsigned IOCAN4 :1;
1696unsigned IOCAN5 :1;
1697};
1698struct {
1699unsigned IOCAN :6;
1700};
1701} IOCANbits_t;
1702extern volatile IOCANbits_t IOCANbits @ 0x392;
1703
1704# 4098
1705extern volatile unsigned char IOCAF @ 0x393;
1706
1707asm("IOCAF equ 0393h");
1708
1709
1710typedef union {
1711struct {
1712unsigned IOCAF0 :1;
1713unsigned IOCAF1 :1;
1714unsigned IOCAF2 :1;
1715unsigned IOCAF3 :1;
1716unsigned IOCAF4 :1;
1717unsigned IOCAF5 :1;
1718};
1719struct {
1720unsigned IOCAF :6;
1721};
1722} IOCAFbits_t;
1723extern volatile IOCAFbits_t IOCAFbits @ 0x393;
1724
1725# 4155
1726extern volatile unsigned char CLKRCON @ 0x39A;
1727
1728asm("CLKRCON equ 039Ah");
1729
1730
1731typedef union {
1732struct {
1733unsigned CLKRDIV0 :1;
1734unsigned CLKRDIV1 :1;
1735unsigned CLKRDIV2 :1;
1736unsigned CLKRDC0 :1;
1737unsigned CLKRDC1 :1;
1738unsigned CLKRSLR :1;
1739unsigned CLKROE :1;
1740unsigned CLKREN :1;
1741};
1742struct {
1743unsigned CLKRDIV :3;
1744unsigned CLKRDC :2;
1745};
1746} CLKRCONbits_t;
1747extern volatile CLKRCONbits_t CLKRCONbits @ 0x39A;
1748
1749# 4230
1750extern volatile unsigned char MDCON @ 0x39C;
1751
1752asm("MDCON equ 039Ch");
1753
1754
1755typedef union {
1756struct {
1757unsigned MDBIT :1;
1758unsigned :2;
1759unsigned MDOUT :1;
1760unsigned MDOPOL :1;
1761unsigned MDSLR :1;
1762unsigned MDOE :1;
1763unsigned MDEN :1;
1764};
1765} MDCONbits_t;
1766extern volatile MDCONbits_t MDCONbits @ 0x39C;
1767
1768# 4280
1769extern volatile unsigned char MDSRC @ 0x39D;
1770
1771asm("MDSRC equ 039Dh");
1772
1773
1774typedef union {
1775struct {
1776unsigned MDMS0 :1;
1777unsigned MDMS1 :1;
1778unsigned MDMS2 :1;
1779unsigned MDMS3 :1;
1780unsigned :3;
1781unsigned MDMSODIS :1;
1782};
1783struct {
1784unsigned MDMS :4;
1785};
1786} MDSRCbits_t;
1787extern volatile MDSRCbits_t MDSRCbits @ 0x39D;
1788
1789# 4332
1790extern volatile unsigned char MDCARL @ 0x39E;
1791
1792asm("MDCARL equ 039Eh");
1793
1794
1795typedef union {
1796struct {
1797unsigned MDCL0 :1;
1798unsigned MDCL1 :1;
1799unsigned MDCL2 :1;
1800unsigned MDCL3 :1;
1801unsigned :1;
1802unsigned MDCLSYNC :1;
1803unsigned MDCLPOL :1;
1804unsigned MDCLODIS :1;
1805};
1806struct {
1807unsigned MDCL :4;
1808};
1809} MDCARLbits_t;
1810extern volatile MDCARLbits_t MDCARLbits @ 0x39E;
1811
1812# 4396
1813extern volatile unsigned char MDCARH @ 0x39F;
1814
1815asm("MDCARH equ 039Fh");
1816
1817
1818typedef union {
1819struct {
1820unsigned MDCH0 :1;
1821unsigned MDCH1 :1;
1822unsigned MDCH2 :1;
1823unsigned MDCH3 :1;
1824unsigned :1;
1825unsigned MDCHSYNC :1;
1826unsigned MDCHPOL :1;
1827unsigned MDCHODIS :1;
1828};
1829struct {
1830unsigned MDCH :4;
1831};
1832} MDCARHbits_t;
1833extern volatile MDCARHbits_t MDCARHbits @ 0x39F;
1834
1835# 4460
1836extern volatile unsigned char STATUS_SHAD @ 0xFE4;
1837
1838asm("STATUS_SHAD equ 0FE4h");
1839
1840
1841typedef union {
1842struct {
1843unsigned C_SHAD :1;
1844unsigned DC_SHAD :1;
1845unsigned Z_SHAD :1;
1846};
1847} STATUS_SHADbits_t;
1848extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
1849
1850# 4491
1851extern volatile unsigned char WREG_SHAD @ 0xFE5;
1852
1853asm("WREG_SHAD equ 0FE5h");
1854
1855
1856typedef union {
1857struct {
1858unsigned WREG_SHAD :8;
1859};
1860} WREG_SHADbits_t;
1861extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
1862
1863# 4510
1864extern volatile unsigned char BSR_SHAD @ 0xFE6;
1865
1866asm("BSR_SHAD equ 0FE6h");
1867
1868
1869typedef union {
1870struct {
1871unsigned BSR_SHAD :5;
1872};
1873} BSR_SHADbits_t;
1874extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
1875
1876# 4529
1877extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
1878
1879asm("PCLATH_SHAD equ 0FE7h");
1880
1881
1882typedef union {
1883struct {
1884unsigned PCLATH_SHAD :7;
1885};
1886} PCLATH_SHADbits_t;
1887extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
1888
1889# 4548
1890extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
1891
1892asm("FSR0L_SHAD equ 0FE8h");
1893
1894
1895typedef union {
1896struct {
1897unsigned FSR0L_SHAD :8;
1898};
1899} FSR0L_SHADbits_t;
1900extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
1901
1902# 4567
1903extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
1904
1905asm("FSR0H_SHAD equ 0FE9h");
1906
1907
1908typedef union {
1909struct {
1910unsigned FSR0H_SHAD :8;
1911};
1912} FSR0H_SHADbits_t;
1913extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
1914
1915# 4586
1916extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
1917
1918asm("FSR1L_SHAD equ 0FEAh");
1919
1920
1921typedef union {
1922struct {
1923unsigned FSR1L_SHAD :8;
1924};
1925} FSR1L_SHADbits_t;
1926extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
1927
1928# 4605
1929extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
1930
1931asm("FSR1H_SHAD equ 0FEBh");
1932
1933
1934typedef union {
1935struct {
1936unsigned FSR1H_SHAD :8;
1937};
1938} FSR1H_SHADbits_t;
1939extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
1940
1941# 4624
1942extern volatile unsigned char STKPTR @ 0xFED;
1943
1944asm("STKPTR equ 0FEDh");
1945
1946
1947typedef union {
1948struct {
1949unsigned STKPTR :5;
1950};
1951} STKPTRbits_t;
1952extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
1953
1954# 4643
1955extern volatile unsigned char TOSL @ 0xFEE;
1956
1957asm("TOSL equ 0FEEh");
1958
1959
1960typedef union {
1961struct {
1962unsigned TOSL :8;
1963};
1964} TOSLbits_t;
1965extern volatile TOSLbits_t TOSLbits @ 0xFEE;
1966
1967# 4662
1968extern volatile unsigned char TOSH @ 0xFEF;
1969
1970asm("TOSH equ 0FEFh");
1971
1972
1973typedef union {
1974struct {
1975unsigned TOSH :7;
1976};
1977} TOSHbits_t;
1978extern volatile TOSHbits_t TOSHbits @ 0xFEF;
1979
1980# 4687
1981extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
1982
1983extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
1984
1985extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
1986
1987extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
1988
1989extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
1990
1991extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
1992
1993extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 4;
1994
1995extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 5;
1996
1997extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
1998
1999extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
2000
2001extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
2002
2003extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
2004
2005extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
2006
2007extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
2008
2009extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
2010
2011extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
2012
2013extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
2014
2015extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
2016
2017extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
2018
2019extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
2020
2021extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
2022
2023extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
2024
2025extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
2026
2027extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
2028
2029extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
2030
2031extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
2032
2033extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
2034
2035extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
2036
2037extern volatile __bit BORFS @ (((unsigned) &BORCON)*8) + 6;
2038
2039extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
2040
2041extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
2042
2043extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
2044
2045extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
2046
2047extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
2048
2049extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
2050
2051extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
2052
2053extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
2054
2055extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
2056
2057extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
2058
2059extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
2060
2061extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
2062
2063extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
2064
2065extern volatile __bit C1NCH @ (((unsigned) &CM1CON1)*8) + 0;
2066
2067extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
2068
2069extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
2070
2071extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
2072
2073extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 6;
2074
2075extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
2076
2077extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
2078
2079extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
2080
2081extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
2082
2083extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
2084
2085extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
2086
2087extern volatile __bit CCP1AS0 @ (((unsigned) &CCP1AS)*8) + 4;
2088
2089extern volatile __bit CCP1AS1 @ (((unsigned) &CCP1AS)*8) + 5;
2090
2091extern volatile __bit CCP1AS2 @ (((unsigned) &CCP1AS)*8) + 6;
2092
2093extern volatile __bit CCP1ASE @ (((unsigned) &CCP1AS)*8) + 7;
2094
2095extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
2096
2097extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
2098
2099extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
2100
2101extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
2102
2103extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
2104
2105extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
2106
2107extern volatile __bit CCP1SEL @ (((unsigned) &APFCON)*8) + 0;
2108
2109extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
2110
2111extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
2112
2113extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;
2114
2115extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
2116
2117extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
2118
2119extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
2120
2121extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
2122
2123extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
2124
2125extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
2126
2127extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
2128
2129extern volatile __bit CLKRDC0 @ (((unsigned) &CLKRCON)*8) + 3;
2130
2131extern volatile __bit CLKRDC1 @ (((unsigned) &CLKRCON)*8) + 4;
2132
2133extern volatile __bit CLKRDIV0 @ (((unsigned) &CLKRCON)*8) + 0;
2134
2135extern volatile __bit CLKRDIV1 @ (((unsigned) &CLKRCON)*8) + 1;
2136
2137extern volatile __bit CLKRDIV2 @ (((unsigned) &CLKRCON)*8) + 2;
2138
2139extern volatile __bit CLKREN @ (((unsigned) &CLKRCON)*8) + 7;
2140
2141extern volatile __bit CLKROE @ (((unsigned) &CLKRCON)*8) + 6;
2142
2143extern volatile __bit CLKRSLR @ (((unsigned) &CLKRCON)*8) + 5;
2144
2145extern volatile __bit CPSCH0 @ (((unsigned) &CPSCON1)*8) + 0;
2146
2147extern volatile __bit CPSCH1 @ (((unsigned) &CPSCON1)*8) + 1;
2148
2149extern volatile __bit CPSON @ (((unsigned) &CPSCON0)*8) + 7;
2150
2151extern volatile __bit CPSOUT @ (((unsigned) &CPSCON0)*8) + 1;
2152
2153extern volatile __bit CPSRM @ (((unsigned) &CPSCON0)*8) + 6;
2154
2155extern volatile __bit CPSRNG0 @ (((unsigned) &CPSCON0)*8) + 2;
2156
2157extern volatile __bit CPSRNG1 @ (((unsigned) &CPSCON0)*8) + 3;
2158
2159extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
2160
2161extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
2162
2163extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
2164
2165extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
2166
2167extern volatile __bit DACLPS @ (((unsigned) &DACCON0)*8) + 6;
2168
2169extern volatile __bit DACOE @ (((unsigned) &DACCON0)*8) + 5;
2170
2171extern volatile __bit DACPSS0 @ (((unsigned) &DACCON0)*8) + 2;
2172
2173extern volatile __bit DACPSS1 @ (((unsigned) &DACCON0)*8) + 3;
2174
2175extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
2176
2177extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
2178
2179extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
2180
2181extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
2182
2183extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
2184
2185extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
2186
2187extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
2188
2189extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
2190
2191extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
2192
2193extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
2194
2195extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
2196
2197extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;
2198
2199extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;
2200
2201extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
2202
2203extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
2204
2205extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
2206
2207extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
2208
2209extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
2210
2211extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
2212
2213extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
2214
2215extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
2216
2217extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
2218
2219extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
2220
2221extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
2222
2223extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
2224
2225extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
2226
2227extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
2228
2229extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
2230
2231extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
2232
2233extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
2234
2235extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
2236
2237extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
2238
2239extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
2240
2241extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
2242
2243extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
2244
2245extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
2246
2247extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
2248
2249extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
2250
2251extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
2252
2253extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
2254
2255extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
2256
2257extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
2258
2259extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
2260
2261extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
2262
2263extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
2264
2265extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
2266
2267extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
2268
2269extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
2270
2271extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
2272
2273extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
2274
2275extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
2276
2277extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
2278
2279extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
2280
2281extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
2282
2283extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
2284
2285extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
2286
2287extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
2288
2289extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
2290
2291extern volatile __bit LWLO @ (((unsigned) &EECON1)*8) + 5;
2292
2293extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
2294
2295extern volatile __bit MDBIT @ (((unsigned) &MDCON)*8) + 0;
2296
2297extern volatile __bit MDCH0 @ (((unsigned) &MDCARH)*8) + 0;
2298
2299extern volatile __bit MDCH1 @ (((unsigned) &MDCARH)*8) + 1;
2300
2301extern volatile __bit MDCH2 @ (((unsigned) &MDCARH)*8) + 2;
2302
2303extern volatile __bit MDCH3 @ (((unsigned) &MDCARH)*8) + 3;
2304
2305extern volatile __bit MDCHODIS @ (((unsigned) &MDCARH)*8) + 7;
2306
2307extern volatile __bit MDCHPOL @ (((unsigned) &MDCARH)*8) + 6;
2308
2309extern volatile __bit MDCHSYNC @ (((unsigned) &MDCARH)*8) + 5;
2310
2311extern volatile __bit MDCL0 @ (((unsigned) &MDCARL)*8) + 0;
2312
2313extern volatile __bit MDCL1 @ (((unsigned) &MDCARL)*8) + 1;
2314
2315extern volatile __bit MDCL2 @ (((unsigned) &MDCARL)*8) + 2;
2316
2317extern volatile __bit MDCL3 @ (((unsigned) &MDCARL)*8) + 3;
2318
2319extern volatile __bit MDCLODIS @ (((unsigned) &MDCARL)*8) + 7;
2320
2321extern volatile __bit MDCLPOL @ (((unsigned) &MDCARL)*8) + 6;
2322
2323extern volatile __bit MDCLSYNC @ (((unsigned) &MDCARL)*8) + 5;
2324
2325extern volatile __bit MDEN @ (((unsigned) &MDCON)*8) + 7;
2326
2327extern volatile __bit MDMS0 @ (((unsigned) &MDSRC)*8) + 0;
2328
2329extern volatile __bit MDMS1 @ (((unsigned) &MDSRC)*8) + 1;
2330
2331extern volatile __bit MDMS2 @ (((unsigned) &MDSRC)*8) + 2;
2332
2333extern volatile __bit MDMS3 @ (((unsigned) &MDSRC)*8) + 3;
2334
2335extern volatile __bit MDMSODIS @ (((unsigned) &MDSRC)*8) + 7;
2336
2337extern volatile __bit MDOE @ (((unsigned) &MDCON)*8) + 6;
2338
2339extern volatile __bit MDOPOL @ (((unsigned) &MDCON)*8) + 4;
2340
2341extern volatile __bit MDOUT @ (((unsigned) &MDCON)*8) + 3;
2342
2343extern volatile __bit MDSLR @ (((unsigned) &MDCON)*8) + 5;
2344
2345extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
2346
2347extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
2348
2349extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
2350
2351extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
2352
2353extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
2354
2355extern volatile __bit P1BSEL @ (((unsigned) &APFCON)*8) + 1;
2356
2357extern volatile __bit P1DC0 @ (((unsigned) &PWM1CON)*8) + 0;
2358
2359extern volatile __bit P1DC1 @ (((unsigned) &PWM1CON)*8) + 1;
2360
2361extern volatile __bit P1DC2 @ (((unsigned) &PWM1CON)*8) + 2;
2362
2363extern volatile __bit P1DC3 @ (((unsigned) &PWM1CON)*8) + 3;
2364
2365extern volatile __bit P1DC4 @ (((unsigned) &PWM1CON)*8) + 4;
2366
2367extern volatile __bit P1DC5 @ (((unsigned) &PWM1CON)*8) + 5;
2368
2369extern volatile __bit P1DC6 @ (((unsigned) &PWM1CON)*8) + 6;
2370
2371extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
2372
2373extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
2374
2375extern volatile __bit P1RSEN @ (((unsigned) &PWM1CON)*8) + 7;
2376
2377extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
2378
2379extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
2380
2381extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
2382
2383extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
2384
2385extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
2386
2387extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
2388
2389extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
2390
2391extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
2392
2393extern volatile __bit PSS1AC0 @ (((unsigned) &CCP1AS)*8) + 2;
2394
2395extern volatile __bit PSS1AC1 @ (((unsigned) &CCP1AS)*8) + 3;
2396
2397extern volatile __bit PSS1BD0 @ (((unsigned) &CCP1AS)*8) + 0;
2398
2399extern volatile __bit PSS1BD1 @ (((unsigned) &CCP1AS)*8) + 1;
2400
2401extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
2402
2403extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
2404
2405extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
2406
2407extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
2408
2409extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
2410
2411extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
2412
2413extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
2414
2415extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
2416
2417extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
2418
2419extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
2420
2421extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;
2422
2423extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
2424
2425extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
2426
2427extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
2428
2429extern volatile __bit RXDTSEL @ (((unsigned) &APFCON)*8) + 7;
2430
2431extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
2432
2433extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
2434
2435extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
2436
2437extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
2438
2439extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
2440
2441extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
2442
2443extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
2444
2445extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
2446
2447extern volatile __bit SDO1SEL @ (((unsigned) &APFCON)*8) + 6;
2448
2449extern volatile __bit SDOSEL @ (((unsigned) &APFCON)*8) + 6;
2450
2451extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
2452
2453extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
2454
2455extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
2456
2457extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
2458
2459extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
2460
2461extern volatile __bit SRCLK0 @ (((unsigned) &SRCON0)*8) + 4;
2462
2463extern volatile __bit SRCLK1 @ (((unsigned) &SRCON0)*8) + 5;
2464
2465extern volatile __bit SRCLK2 @ (((unsigned) &SRCON0)*8) + 6;
2466
2467extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
2468
2469extern volatile __bit SRLEN @ (((unsigned) &SRCON0)*8) + 7;
2470
2471extern volatile __bit SRNQEN @ (((unsigned) &SRCON0)*8) + 2;
2472
2473extern volatile __bit SRPR @ (((unsigned) &SRCON0)*8) + 0;
2474
2475extern volatile __bit SRPS @ (((unsigned) &SRCON0)*8) + 1;
2476
2477extern volatile __bit SRQEN @ (((unsigned) &SRCON0)*8) + 3;
2478
2479extern volatile __bit SRRC1E @ (((unsigned) &SRCON1)*8) + 0;
2480
2481extern volatile __bit SRRCKE @ (((unsigned) &SRCON1)*8) + 2;
2482
2483extern volatile __bit SRRPE @ (((unsigned) &SRCON1)*8) + 3;
2484
2485extern volatile __bit SRSC1E @ (((unsigned) &SRCON1)*8) + 4;
2486
2487extern volatile __bit SRSCKE @ (((unsigned) &SRCON1)*8) + 6;
2488
2489extern volatile __bit SRSPE @ (((unsigned) &SRCON1)*8) + 7;
2490
2491extern volatile __bit SS1SEL @ (((unsigned) &APFCON)*8) + 5;
2492
2493extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
2494
2495extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
2496
2497extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
2498
2499extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
2500
2501extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
2502
2503extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
2504
2505extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
2506
2507extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
2508
2509extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 5;
2510
2511extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
2512
2513extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
2514
2515extern volatile __bit STR1A @ (((unsigned) &PSTR1CON)*8) + 0;
2516
2517extern volatile __bit STR1B @ (((unsigned) &PSTR1CON)*8) + 1;
2518
2519extern volatile __bit STR1SYNC @ (((unsigned) &PSTR1CON)*8) + 4;
2520
2521extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
2522
2523extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
2524
2525extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2526
2527extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
2528
2529extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
2530
2531extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2532
2533extern volatile __bit T0XCS @ (((unsigned) &CPSCON0)*8) + 0;
2534
2535extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
2536
2537extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
2538
2539extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
2540
2541extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
2542
2543extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
2544
2545extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
2546
2547extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
2548
2549extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
2550
2551extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
2552
2553extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
2554
2555extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
2556
2557extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
2558
2559extern volatile __bit T1OSCR @ (((unsigned) &OSCSTAT)*8) + 7;
2560
2561extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
2562
2563extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
2564
2565extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
2566
2567extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
2568
2569extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
2570
2571extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
2572
2573extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
2574
2575extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
2576
2577extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
2578
2579extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
2580
2581extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
2582
2583extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
2584
2585extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
2586
2587extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
2588
2589extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
2590
2591extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
2592
2593extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
2594
2595extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
2596
2597extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
2598
2599extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
2600
2601extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
2602
2603extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
2604
2605extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
2606
2607extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
2608
2609extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
2610
2611extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
2612
2613extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
2614
2615extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
2616
2617extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
2618
2619extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
2620
2621extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
2622
2623extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
2624
2625extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
2626
2627extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
2628
2629extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
2630
2631extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
2632
2633extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
2634
2635extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
2636
2637extern volatile __bit TXCKSEL @ (((unsigned) &APFCON)*8) + 2;
2638
2639extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
2640
2641extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
2642
2643extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
2644
2645extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
2646
2647extern volatile __bit VREGPM0 @ (((unsigned) &VREGCON)*8) + 0;
2648
2649extern volatile __bit VREGPM1 @ (((unsigned) &VREGCON)*8) + 1;
2650
2651extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
2652
2653extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
2654
2655extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
2656
2657extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
2658
2659extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
2660
2661extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
2662
2663extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
2664
2665extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
2666
2667extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
2668
2669extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
2670
2671extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
2672
2673extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
2674
2675extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
2676
2677extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
2678
2679extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
2680
2681extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
2682
2683extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
2684
2685extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
2686
2687extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
2688
2689extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
2690
2691extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
2692
2693extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
2694
2695extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
2696
2697extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
2698
2699extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
2700
2701extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
2702
2703
2704# 27 "/opt/microchip/xc8/v1.12/include/pic.h"
2705#pragma intrinsic(_nop)
2706extern void _nop(void);
2707
2708# 77
2709extern unsigned int flash_read(unsigned short addr);
2710
2711# 41 "/opt/microchip/xc8/v1.12/include/eeprom_routines.h"
2712extern void eeprom_write(unsigned char addr, unsigned char value);
2713extern unsigned char eeprom_read(unsigned char addr);
2714extern void eecpymem(volatile unsigned char *to, __eeprom unsigned char *from, unsigned char size);
2715extern void memcpyee(__eeprom unsigned char *to, const unsigned char *from, unsigned char size);
2716
2717
2718# 150 "/opt/microchip/xc8/v1.12/include/pic.h"
2719#pragma intrinsic(_delay)
2720extern void _delay(unsigned long);
2721
2722
2723# 37 "configuration_bits.c"
2724#pragma config FOSC = INTOSC
2725#pragma config WDTE = OFF
2726#pragma config PWRTE = OFF
2727#pragma config MCLRE = OFF
2728#pragma config CP = OFF
2729#pragma config CPD = OFF
2730#pragma config BOREN = ON
2731#pragma config CLKOUTEN = OFF
2732#pragma config IESO = OFF
2733#pragma config FCMEN = ON
2734
2735
2736#pragma config WRT = OFF
2737#pragma config PLLEN = ON
2738#pragma config STVREN = ON
2739#pragma config BORV = LO
2740#pragma config LVP = ON
2741
1-Wire to USB Bridge